1461129339-66ce53ee-400e-473e-bc95-7656f5c17781

1. A method for reclaiming checkpoints out-of-order in a system comprising:
a) using a computer, creating at least one checkpoint, each checkpoint having an initial state using system resources and holding the checkpoint state;
b) identifying completion of all instructions associated with the at least one checkpoint;
c) upon completion of all instructions associated with the at least one checkpoint, reassigning all the instructions associated with the at least one checkpoint to a previous older checkpoint;
d) reclaiming the checkpoint resources once all instructions associated with the checkpoint are reassigned to the previous older checkpoint; and
e) freeing the system resources associated with the at least one checkpoint.
2. The method as recited in claim 1 wherein the at least one checkpoint is created when the instruction that is fetched is a conditional branch.
3. The method as recited in claim 2 wherein creating at least one checkpoint further comprises creating a plurality of checkpoints and wherein the plurality of checkpoints are created at every conditional branch irrespective of a predetermined confidence level at every conditional branch.
4. The method as recited in claim 2 wherein a solution frees checkpoint resources as soon as the conditional branch instruction having caused the checkpoint to be created is resolved.
5. The method as recited in claim 1, further comprising checkpoint hardware and physical registers pinned to the checkpoint.
6. The method as recited in claim 3 further comprising tracking a number of unresolved branches associated with the checkpoint.
7. The method as recited in claim 6 wherein as each of the instructions is completed, the checkpoint is informed and the checkpoint decrementing its count of incomplete instructions.
8. The method as recited in claim 7 wherein when no further incomplete instructions are left, reclaiming the checkpoint.
9. The method as recited in claim 1 further comprising assigning an instruction to a checkpoint comprising incrementing the checkpoint count of a number of incomplete instructions corresponding to the checkpoint.
10. The method as recited in claim 9, wherein when the instruction is a conditional branch, it increments a count of incomplete conditional branches in the checkpoint, wherein when completed, it informs the corresponding checkpoint about the completion.
11. The method as recited in claim 8, wherein the checkpoint reclamation freezes hardware resources associated with the checkpoint, enabling a reuse of the resources of the system.
12. The method as recited in claim 11 wherein the checkpoint reclaiming occurs after ensuring that the older checkpoint exists.
13. The method as recited in claim 1 wherein said checkpoint further comprises a counter for determining a count of incomplete instructions associated with the checkpoint.
14. The method as recited in claim 13 wherein the counter increments its count when a new instruction is dispatched and assigned to the checkpoint, and decrements its count when an instruction associated with the checkpoint is completed, enabling the checkpoint and detects when all the instructions associated with the checkpoint are complete.
15. The method as recited in claim 12, further comprising reclaiming the checkpoint when all the instructions associated with the checkpoint are complete.
16. The method as recited in claim 12, wherein the reclaiming the checkpoint is achieved in an order different from its creation order.
17. The method as recited in claim 1 wherein subsequent to reassigning all the instructions associated with the at least one checkpoint to the previous older checkpoint, further comprising committing all the instructions in program order.
18. A method for reclaiming checkpoints out-of-order in a system comprising:
a) using a computer, creating at least one checkpoint, each checkpoint having an initial state using system resources and holding the checkpoint state;
b) identifying completion of instructions associated with the at least one checkpoint, at least one of the instructions being for a conditional branch;
c) upon completion of the at least one conditional branch instruction associated with the at least one checkpoint, reassigning all the instructions associated with the at least one checkpoint to a previous older checkpoint even if some instructions are incomplete so long as the at least one conditional branch instruction is complete; and
d) reclaiming the checkpoint resources once all instructions associated with the checkpoint are reassigned to the previous older checkpoint; and
e) freeing the system resources associated with the at least one checkpoint.
19. The method as recited in claim 18 further comprising tracking a number of unresolved branches associated with the at least one checkpoint wherein when the number of unresolved branches associated with the at least one checkpoint is reduced to zero, the checkpoint resources are reclaimed even if a count of incomplete instructions has not reached zero.
20. The method as recited in claim 18 wherein the at least one checkpoint further comprises a first counter for determining a count of incomplete instructions associated with the at least one checkpoint and a second counter reaches zero when all the conditional branch instructions associated to the checkpoint are complete and which occurs before the first counter reaches zero, wherein the reassigning all the instructions associated with the at least one checkpoint to a previous older checkpoint occurs when the second counter reaches zero.
21. The method as recited in claim 18 wherein creating at least one checkpoint further comprises creating a plurality of checkpoints and wherein the plurality of checkpoints are created at every conditional branch irrespective of a predetermined confidence level of every conditional branch.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An animal trap, comprising:
a first jaw segment having a first transverse portion transverse to a longitudinal axis of the first jaw segment, formed at a first proximal end of the first jaw segment and a spring loop disposed at a first distal end of the first jaw segment;
a second jaw segment having a second transverse portion transverse to the longitudinal axis of the first jaw segment, disposed at a second proximal end of the second jaw segment and also having a third transverse portion transverse to the longitudinal axis of the first jaw segment, disposed at a second distal end of the second jaw segment, the second jaw segment being rotatably coupled to the first proximal end;
a spring axially mounted on the longitudinal axis of the first jaw segment and secured by the spring loop, the spring providing a rotating force;
a pan hinged on the third transverse portion at the second distal end, a plane in which the pan lies being disposed substantially perpendicular to the longitudinal axis of the first jaw segment; and
a trip wire having a distal end rotatably mounted on the first transverse portion and a proximal end restrained by the pan, the trip wire being released when pressure is applied to the pan causing the first jaw segment and the second jaw segment to close together.
2. The animal trap recited in claim 1, wherein the first jaw segment, the second jaw segment, the spring, the pan, and the trip wire are formed from substantially similar material.
3. The animal trap recited in claim 2, wherein the substantially similar material is stainless steel.
4. The animal trap recited in claim 1, wherein the second jaw segment is rotatably coupled to the first jaw segment by forming a loop in the second jaw segment around the longitudinal axis of the first jaw segment.
5. The animal trap recited in claim 1, wherein the spring is coiled around the longitudinal axis of the first jaw segment.
6. The animal trap recited in claim 1, wherein the first jaw segment rotates towards the second jaw segment when the trip wire is released.
7. The animal trap recited in claim 1, wherein the pan is formed from a wire.
8. The animal trap recited in claim 7, wherein the pan includes a plurality of curves in the wire, wherein each of the plurality of curves is substantially co-planar to the plane.
9. The animal trap recited in claim 1, wherein a retrieval wire is coupled to the spring loop.

1461129328-58d925b9-c125-4ca8-becb-08bee8c7127a

1. An apparatus comprising:
an encoder configured to receive data, wherein the encoder is configured to puncture the received data;
one or more memory arrays configured to store the punctured data; and
a decoder configured to decode the punctured data.
2. The apparatus of claim 1, wherein the encoder further comprises a puncturable code encoder and a puncturing circuit.
3. The apparatus of claim 2, wherein the puncturable code encoder comprises a convolutional encoder.
4. The apparatus of claim 3, further comprising:
a block code encoder configured to block encode the data, wherein the convolutional encoder is configured to convolutionally encode the block encoded data; and
a block code decoder configured to further decode the decoded punctured data.
5. The apparatus of claim 4, wherein the puncturable code decoder comprises a Viterbi decoder.
6. The apparatus of claim 1, wherein the apparatus comprises a NAND flash memory device.
7. The apparatus of claim 1, further comprising a control circuit, wherein the control circuit is configured to select a code rate used by the encoder.
8. The apparatus of claim 7, further comprising a control circuit, wherein the code rate is at least partially selected by a marginal condition.
9. The apparatus of claim 7, further comprising a control circuit, wherein the code rate is selected at least partly in response to a data type for the received data.
10. The apparatus of claim 1, wherein a first code rate is allocated to at least one block of the one or more memory arrays and wherein a second code rate is allocated to at least a second block.
11. The apparatus of claim 1, wherein the one or more memory arrays comprise multiple-level memory cells configured to store the punctured data within the multiple levels of the memory cells.
12. The apparatus of claim 1, wherein the encoder is configured to generate a convolutional code with a code rate of \xbc from the received data, and is further configured to puncture the convolutional code to generate the punctured data with the punctured data having a selectable code rate of \u2153 to \xbd.
13. The apparatus of claim 1, further comprising a control circuit, wherein the control circuit is configured to store reference information in an unpunctured form in the one or more memory arrays, wherein the reference information indicates a puncturing level of the punctured data.
14. A method for storing data in a non-volatile memory device having one or more memory arrays, the method comprising:
receiving data intended for storage in the one or more memory arrays;
encoding the data to generate punctured data; and
storing the punctured data in the one or more memory arrays.
15. The method of claim 14, further comprising convolutionally encoding and puncturing the received data to generate the punctured data.
16. The method of claim 15, further comprising encoding the data with a block code prior to convolutionally encoding the data.
17. The method of claim 14, further comprising puncturing at least a portion of convolutional-coded data with a puncture pattern to generate the punctured data having a first code rate and puncturing at least a second portion of convolutional-coded data with a second puncture pattern to generate the punctured data having a second code rate, wherein the data punctured with the puncture pattern is stored in a first portion of the one or more memory arrays and the data punctured with the second puncture pattern is stored in a second portion of the one or more memory arrays.
18. The method of claim 14, further comprising selecting between the first code rate and the second code rate at least partly in response to a data type for the received data
19. The method of claim 14, wherein encoding comprises:
generating a convolutional code with a code rate of \xbc; and
puncturing the convolutional code to generate the punctured data with the punctured data having a selectable code rate of \u2153 to \xbd.
20. The method of claim 14, further comprising storing reference information in an unpunctured form in the one or more memory arrays, wherein the reference information indicates a puncturing level of the punctured data.
21. A method of retrieving punctured data stored in a non-volatile memory device having one or more memory arrays, the method comprising:
retrieving the punctured data from the one or more memory arrays of the memory device; and
decoding the punctured data according to a puncture pattern associated with the punctured data.
22. The method of claim 21, wherein decoding comprises Viterbi decoding.
23. The method of claim 21, further comprising:
retrieving reference information in an unpunctured form from the one or more memory arrays, wherein the reference information indicates a puncturing level of the punctured data; and
selecting the puncture pattern according to the reference information.
24. A method of determining a code rate for a block of memory space in a non-volatile solid-state memory device, the method comprising:
determining whether a marginal condition exists for at least a portion of a block of data of the memory device; and
decreasing a code rate used with the block if the marginal condition exists.
25. The method of claim 24, wherein decreasing comprises reducing an amount of puncturing.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A field emission display device comprising:
a cathode plate;
a resistive buffer formed on the cathode plate;
a plurality of electron emitters arranged on the resistive buffer, each of the electron emitters comprising a first part in contact with the resistive buffer; and
an anode plate spaced from the electron emitters thereby defining an interspace region therebetween;
wherein the resistive buffer and at least portions of the first parts are made of silicon nitride, and the combined resistive buffer and the first parts comprises at least one gradient distribution of electrical resistivity such that highest electrical resistivity is nearest the cathode plate and lowest electrical resistivity is nearest the anode plate.
2. The field emission display device as described in claim 1, wherein each electron emitter further comprises a second part formed from niobium, proximate to the first part.
3. The field emission display device as described in claim 1, wherein each of the first parts has a substantially rod-shaped microstructure with a diameter in the range from 5 to 50 nanometers.
4. The field emission display device as described in claim 3, wherein the substantially rod-shaped microstructure has a length in the range from 0.2 to 2.0 micrometers.
5. The field emission display device as described in claim 2, wherein the second part of each electron emitter has a substantially conical microstructure.
6. The field emission display device as described in claim 5, wherein the substantially conical microstructure comprises a top face distal from the resistive buffer, a diameter of the top face being in the range from 0.3 to 2.0 nanometers.
7. The field emission display device as described in claim 1, wherein the anode plate comprises a transparent electrode coated with phosphor.
8. The field emission display device as described in claim 7, wherein the transparent electrode comprises indium tin oxide.
9. The field emission display device as described in claim 1, wherein the cathode plate is formed on a first substrate comprising glass, and the anode plate is formed on a second substrate comprising glass.
10. The field emission display device as described in claim 9, wherein the first substrate further comprises a silicon thin film formed thereon for providing effective contact between the first substrate and the cathode plate.
11. A field emission display device comprising:
a cathode plate;
a resistive buffer formed on the cathode plate;
a plurality of electron emitters arranged on the resistive buffer, each of the electron emitters comprising a first part in contact with the resistive buffer; and
an anode plate spaced from the electron emitters thereby defining an interspace region therebetween;
wherein the resistive buffer and at least portions of the first parts are made of silicon nitride, and the resistive buffer comprises at least one gradient distribution of electrical resistivity such that highest electrical resistivity is nearest the cathode plate and lowest electrical resistivity is nearest the anode plate.
12. The field emission display device as described in claim 11, wherein each electron emitter further comprises a second part formed from niobium, proximate to the first part.
13. The field emission display device as described in claim 11, wherein each of the first parts has a substantially rod-shaped microstructure with a diameter in the range from 5 to 50 nanometers.
14. The field emission display device as described in claim 11, wherein the substantially rod-shaped microstructure has a length in the range from 0.2 to 2.0 micrometers.
15. The field emission display device as described in claim 12, wherein the second part has a substantially conical microstructure.
16. The field emission display device as described in claim 15, wherein the substantially conical microstructure comprises a top face distal from the resistive buffer, a diameter of the top face being in the range from 0.3 to 2.0 nanometers.
17. A field emission display device comprising:
a cathode plate;
an anode plate spaced from the cathode plate; and
a plurality of electron emitters positioned between the cathode plate and the anode plate, each of the electron emitters being a nano-tube comprising a rod-like first part proximate the cathode plate, and a conical second part adjoining the first part while spaced from the anode plate;
wherein the first part is made of silicon nitride having high electrical resistivity, and the second part is made of niobium having low electrical resistivity.
18. The field emission display device as described in claim 17, wherein the electron emitters are equally spaced from one another in a direction perpendicular to an extension direction of the electron emitters.
19. The field emission display device as described in claim 18, wherein no other structures are located between every two adjacent emitters.
20. The field emission display device as described in claim 17, wherein a buffer is in contact with the cathode plate, the electron emitters extend from said buffer, and said buffer is made of silicon nitride.