Author: claimsbot

What is claimed is:

1. A method for exposure processing of a semiconductor device in which a predetermined pattern is transferred onto a semiconductor device, comprising:
a step of reading, from a database, illumination parameters, photoresist parameters, circuit pattern information and aberration information of projection lenses used in a plurality of exposure devices, for carrying out the pattern transfer;
a step of performing optical development simulation based on the illumination parameters, photoresist parameters, circuit pattern information and the plurality of sets of aberration information, for carrying out the pattern transfer;
a step of calculating margins of exposure energy and focus as well as optimum values of exposure energy and focus offset; and
a step of carrying out the exposure process using, from the plurality of exposure devices, an exposure device for which the margins of exposure energy and focus satisfy a predetermined tolerance.
2. The method for exposure processing of a semiconductor device in accordance with claim 1, further comprising:
a step of calculating an assignment priority order of exposure devices using the margins of exposure energy and focus in the plurality of exposure devices calculated by the calculation step; and
an exposure device assignment step of selecting an exposure device used for the exposure processing based on the priority order of the exposure devices.
3. The method for exposure processing of a semiconductor device in accordance with claim 1,
wherein the exposure parameter calculation step determines, with an optical development simulator, ranges of exposure energy and focus in which variations of the transfer pattern are within a predetermined range, and takes their central values as the optimum values of exposure energy and focus offset.
4. The method for exposure processing of a semiconductor device in accordance with claim 2,
wherein the exposure device assignment step comprises:
(1) a step of calculating an assignment priority order for each exposure device, based on order conditions for the semiconductor device and on production progress information of a semiconductor fabrication line;
(2) a step of calculating an assignment priority order from margins of exposure energy and focus calculated in the exposure parameter calculation step; and
(3) a step of calculating an assignment priority order in a process using weighting functions set for the semiconductor device in accordance with the assignment priority orders of the exposure devices calculated in said steps (1) and (2).

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An implantable medical system configured to deliver electrical stimulation from within a lumen of a blood vessel within a patient to nerve tissue located adjacent to and outside of the blood vessel, the system comprising:
a generally cylindrical expandable and contractible lead member arranged within the blood vessel lumen relative to the nerve tissue; and
a plurality of electrodes connected to the lead member;
wherein the lead member is temporarily deployable for testing multiple combinations of the plurality of electrodes before deploying the lead member for chronic therapy of the patient.
2. The system of claim 1, wherein the electrodes are arranged on an exterior surface of the lead member in one or more columns substantially parallel to a longitudinal axis of the lead member.
3. The system of claim 1, wherein the electrodes are arranged on an exterior surface of the lead member in one or more columns oriented at an angle with respect to a longitudinal axis of the lead member.
4. The system of claim 1, wherein the lead member comprises a helical structure with the plurality of electrodes on the helical structure.
5. The system of claim 4, wherein the electrodes are arranged on an exterior of the helical structure in one or more columns generally parallel to a trajectory of the helical ribbon.
6. The system of claim 4, wherein the helical structure is expandable in a transverse direction relative to a longitudinal axis of the lead member by bringing two ends of the lead member closer to one another and contractible in the transverse direction by pulling the two ends of the lead member away from each other.
7. The system of claim 1, wherein the helical structure comprises one of a helical ribbon or an elongated substantially cylindrical helical structure.
8. The system of claim 1, wherein the lead member comprises a stent.
9. The system of claim 8, wherein the stent lead member comprises a mesh of material segments each of which is pivotally joined at either end to another segment at a vertex to form a plurality of polygons.
10. The system of claim 9, wherein the mesh stent lead member is expandable and contractible by rotation of the material segments with respect to each other at the plurality of vertices at which the segments are pivotally joined.
11. The system of claim 9, wherein the electrodes are arranged at a plurality of the vertices pivotally joining the material segments forming the mesh stent lead member.
12. The system of claim 8, wherein the stent lead member comprises a drug-eluting layer configured to interact with tissue of the blood vessel.
13. The system of claim 1 further comprising a catheter configured to hold the lead member in an at least partially contracted state.
14. The system of claim 13, wherein the catheter comprises a lumen in which the lead member is arranged and including one or more apertures arranged over one or more of the plurality of electrodes connected to the lead member.
15. The system of claim 1, wherein the nerve tissue comprises one of a vagus nerve, a hypoglossal nerve, a nerve plexus, nerve ganglia, or a vascular baroreceptors.
16. A method comprising:
arranging a generally cylindrical expandable and contractible lead member within a lumen of a blood vessel adjacent target nerve tissue;
temporarily deploying the cylindrical lead member within the lumen relative to the nerve tissue;
energizing one or more electrodes connected to the cylindrical lead member to deliver electrical stimulation from within the blood vessel lumen to the nerve tissue; and
chronically deploying the cylindrical lead member in an expanded state within the lumen relative to the nerve tissue.
17. The method of claim 16 further comprising determining an efficacy of the nerve tissue stimulation.
18. The method of claim 17 further comprising:
comparing the efficacy of the nerve tissue stimulation to a threshold efficacy; and
redeploying the cylindrical lead member within the lumen relative to the nerve tissue, if the efficacy of the nerve tissue stimulation does not meet or exceed the threshold efficacy.
19. The method of claim 18, wherein, if the efficacy of the nerve tissue stimulation does not meet or exceed the threshold efficacy, then further comprising:
energizing one or more electrodes connected to the redeployed cylindrical lead member to deliver electrical stimulation from within the blood vessel lumen to the nerve tissue; and
determining if an efficacy of the electrical stimulation delivered by the redeployed cylindrical lead member meets or exceeds the threshold efficacy.
20. The method of claim 16, wherein deploying the cylindrical lead member within the lumen relative to the nerve tissue comprises:
orienting the electrodes connected to the cylindrical lead member within the lumen relative to the nerve tissue; and
selecting one or more combinations of the plurality of electrodes to deliver electrical stimulation from within the blood vessel lumen to the nerve tissue.
21. The method of claim 20, wherein deploying the cylindrical lead member within the lumen relative to the nerve tissue further comprises expanding the cylindrical lead member.
22. The method of claim 16, wherein the nerve tissue comprises one of a vagus nerve, a hypoglossal nerve, a nerve plexus, nerve ganglia, or a vascular baroreceptor.

1. A method and system of wire bonding a semiconductor die to a lead, comprising the steps of:
attaching a first end of a first bonding wire to a semiconductor die with a ball bond;
attaching a second end of the first bonding wire to an interposer pad with a stitch bond;
attaching a first end of a second bonding wire, to the interposer pad with a ball bond; and
attaching the second end of the second bonding wire to the lead with a stitch bond.
2. The method and system of wire bonding a semiconductor die to a lead as recited in claim 1, wherein the first bonding wire and second bonding wire are made-of a gold-based material.
3. The method and system of wire bonding a semiconductor die to a lead as recited in claim 1, wherein the interposer pad has x-y dimensions of between approximately 58 micrometers to 88 micrometers along an x-axis and 88 micrometers along a y-axis.
4. The method and system of wire bonding a semiconductor die to a lead as recited in claim 1, for use in ball bond grid array packages.
5. A semiconductor device comprising:
a semiconductor die disposed on a substrate;
a plurality of interposer pads on said substrate;
a plurality of leads on the substrate;
a plurality of bonding wires attached to the semiconductor die with ball bonds and to the leads with stitch bonds, said wires attached to said interposer pads.
6. The semiconductor device as recited in claim 5, wherein the plurality of bonding wires are comprised of gold-based material.
7. The semiconductor device as recited in claim 5, wherein each of said bonding wires comprises a bonding wire between the semiconductor die and each interposer pad attached to a bonding pad on the semiconductor die with a ball bond and to said interposer pad with a stitch bond and a bonding wire between the interposer pad and the lead attached to the interposer pad with a ball bond and to each lead with a stitch bond.
8. The semiconductor device as recited in claim 5, wherein the interposer pads are dimensioned from 58 micrometers to 88 micrometers along an x-axis and from 88 to 125 micrometers along a y-axis.
9. The semiconductor device as recited in claim 5, wherein the semiconductor package comprises a ball grid array.
10. The semiconductor device as recited in claim 5 wherein an interposer pad electrically floats on the substrate.
11. A method of fabricating a semiconductor device, comprising:
attaching a semiconductor die to a substrate having a plurality of leads and a plurality of interposer pads arranged around said die;
coupling the die to the plurality of interposer pads with a first plurality of bonding wires ball bonded to said die and stitch bonded tosaid interposer pads; and
coupling the plurality of interposer pads to the plurality of leads with a second plurality of bonding wires ball bonded to said interposer pads and stitch bonded to said leads.
12. The method of fabricating a semiconductor device as recited in claim 11, wherein the plurality of interposer pads electrically float on the semiconductor package.
13. The method of fabricating a semiconductor device as recited in claim 11, wherein the plurality of interposer pads electrically float on the semiconductor package.
14. The method of fabricating a semiconductor device as recited in claim 11, wherein the placement of the interposer pads are operable to reduce wire sweep.
15. The method of fabricating a semiconductor device as recited in claim 11, wherein the semiconductor package comprises a ball grid array.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An electronic apparatus comprising a first connector configured to be electrically connected to a battery, the first connector comprising:
signal terminals separated from each other by a first distance;
a positive terminal separated from the signal terminals by a second distance greater than the first distance;
an insulative positioning pin between the signal terminals and the positive terminal, the positioning pin protruding farther from a housing than does the positive terminal; and
a negative terminal separated from the signal terminals by a third distance greater than the first distance, the signal terminals between the positioning pin and the negative terminal.
2. The electronic apparatus of claim 1, wherein the negative terminal protrudes farther from the housing than does the positive terminal.
3. The electronic apparatus of claim 1, wherein the negative terminal is shorter than the positioning pin.
4. The electronic apparatus of claim 1, wherein the positive terminal and the negative terminal are each thicker than one of the signal terminals.
5. The electronic apparatus of claim 1, wherein the housing comprises a flat portion and a recess portion, the recess portion in the flat portion at a position deviating from the positive terminal.
6. The electronic apparatus of claim 1, wherein the first connector comprises an attaching portion and a boss, the attaching portion in an end portion of the battery connector, the positive terminal between the attaching portion and the boss.
7. The electronic apparatus of claim 1, further comprising:
a second connector configured to engage with the first connector,
wherein the second connector comprises a first recess configured to receive the positioning pin, a second recess configured to receive one of the signal terminals, a third recess configured to receive the positive terminal, the first recess between the second recess and the third recess, and a fourth recess portion configured to receive the negative terminal.
8. The electronic apparatus of claim 7, wherein the second connector comprises a first wall between the first recess and the second recess, and a second wall thicker than the first wall between the first recess and the third recess.
9. The electronic apparatus of claim 7, further comprising:
a first casing configured to engage with the battery;
a first circuit board in the first casing, the first circuit board electrically connected to one of the first connector and the second connector; and
a second circuit board in the battery, the second circuit board electrically connected to the other of the first connector and the second connector.
10. The electronic apparatus of claim 9, wherein the battery comprises a second casing, engaging portions, and holders, the second casing comprising the second circuit board, the engaging portions in end portions of the second connector, the holders configured to support the engaging portions.
11. The electronic apparatus of claim 9, wherein the first connector and the second connector are configured to be connected to each other in a direction crossing a thickness direction of the first casing.
12. The electronic apparatus of claim 1, further comprising a display.
13. An electronic apparatus comprising a connector configured to be electrically connected to a battery, the connector comprising:
signal terminals separated from each other by a first distance;
a positive terminal separated from the signal terminals by a second distance greater than the first distance;

an insulative positioning pin between the signal terminals and the positive terminal; and
a negative terminal separated from the signal terminals by a third distance greater than the first distance, the signal terminals between the positioning pin and the negative terminal.