Author: claimsbot

What is claimed is:

1. A semiconductor memory device comprising:
a memory circuit having an array of regular memory cells and an array of redundancy memory cells;
a storage element for storing redundancy data formed by non-volatile elements adapted to store externally programmable data but not adapted to electrically rewrite the stored data;
a register for holding the redundancy data of said storage element when the semiconductor memory device is activated;
a redundancy determining circuit for comparing the data held in said register and an externally input address to determine the use or non-use of any of said redundancy memory cells; and
a redundancy data rewriting circuit for rewriting the redundancy data held in said register to a different redundancy data.
2. The semiconductor memory device according to claim 1, wherein said redundancy data rewriting circuit is controlled by a signal from a test circuit mounted on a semiconductor chip of said semiconductor memory device or a signal of a test circuit provided outside the semiconductor chip.
3. The semiconductor memory device according to claim 2, wherein said test circuit is a built-in type test circuit for self-generating a test pattern.
4. The semiconductor memory device according to claim 3, wherein said memory circuit has an X, Y two-dimensional address space and two-dimensional redundancy memory cells, and said built-in test circuit performs the sequence including the steps of:
changing the X addresses on the basis of a unit of redundancy, while fixing the Y address, and testing the X addresses of the unit of redundancy, while fixing the Y address to determine whether faulty memory cells are detected or not;
using the Y redundancy memory cells when the faulty memory cells are not relieved by using the X redundancy cells alone, while using the X redundancy memory cells when the faulty memory cells are relieved by using the X redundancy cells alone;
testing again said X addresses;
continuing the test and the relief operation until no faulty memory cells are detected;
performing the test and the relief operation to next and succeeding X addresses of the unit of redundancy after the elimination of faulty memory cells;
shifting the Y address and performing a similar test in the X direction; and
outputting a pass signal at the time of completion of the test of the last address of the unit of redundancy, while outputting a fail signal to end the test operation in the case of consuming all the redundancy cells before outputting a pass signal.
5. The semiconductor memory device according to claim 3, wherein said built-in type test circuit comprises:
a data generation circuit for generating a pattern of data to be written to said memory circuit;
an address generation circuit for generating an address pattern to specify an address of said memory circuit;
an expected value generation circuit for generating an expected value data relative to an output data of said memory circuit;
a data comparison circuit for comparing said output data and said expected value data; and
a redundancy allocation circuit for determining an allocation of said redundancy memory cells in response to an output of said data generation circuit and an output of said address generation circuit, said redundancy data rewriting circuit being controlled by an output of the redundancy allocation circuit.
6. The semiconductor memory device according to claim 5, wherein said built-in test circuit performs the sequence in which:
changing the addresses on the basis of a unit of redundancy, testing the addresses of the unit of redundancy to determine whether faulty memory cells are detected or not, and relieving the faulty memory cells by using the redundancy memory cells;
inputting redundant information to said register by means of said redundancy data rewriting circuit;
testing again said addresses;
continuing the test and the relief operation until no faulty memory cells are detected;
performing the test and the relief operation to next and succeeding addresses of the unit of redundancy after the elimination of faulty memory cells;
outputting a pass signal at the time of completion of the test to the last addresses of the unit of redundancy, while outputting a fail signal to end the test operation in the case of consuming all the redundancy cells before outputting a pass signal.
7. The semiconductor memory device according to claim 1, further comprising a redundancy data read circuit for reading the data held in said register to the outside.
8. The semiconductor memory device according to claim 7, wherein said redundancy data rewriting circuit is controlled by a signal from a test circuit mounted on a semiconductor chip of said semiconductor memory device or a signal of a test circuit provided outside the semiconductor chip.
9. The semiconductor memory device according to claim 8, wherein said test circuit is a built-in type test circuit for self-generating a test pattern.
10. The semiconductor memory device according to claim 9, wherein said memory circuit has an X, Y two-dimensional address space and two-dimensional redundancy memory cells, and said built-in test circuit performs the sequence including the steps of:
changing the X addresses on the basis of a unit of redundancy, while fixing the Y address, and testing the X addresses of the unit of redundancy, while fixing the Y address to determine whether faulty memory cells are detected or not;
using the Y redundancy memory cells when the faulty memory cells are not relieved by using the X redundancy cells alone, while using the X redundancy memory cells when the faulty memory cells are relieved by using the X redundancy cells alone;
testing again said X addresses;
continuing the test and the relief operation until no faulty memory cells are detected;
performing the test and the relief operation to next and succeeding X addresses of the unit of redundancy after the elimination of faulty memory cells;
shifting the Y address and performing a similar test in the X direction; and
outputting a pass signal at the time of completion of the test of the last address of the unit of redundancy, while outputting a fail signal to end the test operation in the case of consuming all the redundancy cells before outputting a pass signal.
11. The semiconductor memory device according to claim 9, wherein said built-in type test circuit comprises:
a data generation circuit for generating a pattern of data to be written to said memory circuit;
an address generation circuit for generating an address pattern to specify an address of said memory circuit;
an expected value generation circuit for generating an expected value data relative to an output data of said memory circuit;
a data comparison circuit for comparing said output data and said expected value data; and
a redundancy allocation circuit for determining an allocation of said redundancy memory cells in response to an output of said data generation circuit and an output of said address generation circuit, said redundancy data rewriting circuit being controlled by an output of the redundancy allocation circuit.
12. The semiconductor memory device according to claim 11, wherein said built-in test circuit performs the sequence in which:
changing the addresses on the basis of a unit of redundancy, testing the addresses of the unit of redundancy to determine whether faulty memory cells are detected or not, and relieving the faulty memory cells by using the redundancy memory cells;
inputting redundant information to said register by means of said redundancy data rewriting circuit;
testing again said addresses;
continuing the test and the relief operation until no faulty memory cells are detected;
performing the test and the relief operation to next and succeeding addresses of the unit of redundancy after the elimination of faulty memory cells;
outputting a pass signal at the time of completion of the test to the last addresses of the unit of redundancy, while outputting a fail signal to end the test operation in the case of consuming all the redundancy cells before outputting a pass signal.
13. A semiconductor memory device comprising:
a storage element adapted to program data and not adapted to electrically rewrite the stored data;
a transfer circuit for transferring the data stored in said storage element to a following-stage circuit;
a changing circuit in said transfer circuit and adapted to selectively change the data to be transferred.
14. The semiconductor memory device according to claim 13, wherein
said transfer circuit further comprises a data holding circuit for holding the data stored in said storage element; and
said changing circuit is adapted to destroy the data held in said data holding circuit and change to a different data.
15. The semiconductor memory device according to claim 13, wherein
said changing circuit is adapted to inactivate the transfer of the data stored in said storage element and change to a different data.
16. A method of testing a semiconductor memory device comprising an array of regular memory cells and an array of redundancy memory cells to be used for relief by means of a built-in type test circuit, said method comprising:
a step of performing a sequence of changing the addresses on the basis of a unit of redundancy, testing the addresses of the unit of redundancy to determine whether faulty memory cells are detected or not, and relieving the faulty memory cells by using the redundancy memory cells; inputting redundant information to said register; testing again said addresses; continuing the test and the relief operation until no faulty memory cells are detected; and performing the test and the relief operation to next and succeeding addresses of the unit of redundancy after the elimination of faulty memory cells; and
a step of outputting a pass signal at the time of completion of the test to the last addresses of the unit of redundancy, while outputting a fail signal to end the test operation in the case of consuming all the redundancy cells before outputting a pass signal.
17. A method of testing a semiconductor memory device comprising an X, Y two-dimensional address space and two-dimensional redundancy memory cells by means of a built-in type test circuit, said method performs the sequence including the steps of:
changing the X addresses on the basis of a unit of redundancy, while fixing the Y address, and testing the X addresses of the unit of redundancy, while fixing the Y address to determine whether faulty memory cells are detected or not;
using the Y redundancy memory cells when the faulty memory cells are not relieved by using the X redundancy cells alone, while using the X redundancy memory cells when the faulty memory cells are relieved by using the X redundancy cells alone;
testing again said X addresses;
continuing the test and the relief operation until no faulty memory cells are detected;
performing the test and the relief operation to next and succeeding x addresses of the unit of redundancy after the elimination of faulty memory cells;
shifting the Y address and performing a similar test in the X direction; and
outputting a pass signal at the time of completion of the test of the last address of the unit of redundancy, while outputting a fail signal to end the test operation in the case of consuming all the redundancy cells before outputting a pass signal.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A hydroprocessing catalyst for use in desulfurization, denitrogenation, dearomatization in the presence of hydrogen, and hydrocracking, comprising a carrier based on at least one refractory oxide, at least one metal of group VIII and at least one metal of group VIB of the Periodic Table of Elements, and at least one organic compound selected from C1-C4 dialkyl succinates;
wherein the at least one organic compound is present in an amount of at least 0.001 to 10 moles per mole of metals of groups VIB and VIII; and
wherein the hydroprocessing catalyst has been subjected to a thermal treatment at a temperature between 60\xb0 C. and 180\xb0 C. following an impregnation step during preparation of the hydroprocessing catalyst.
2. The catalyst as claimed in claim 1, wherein the at least one organic compound is dimethyl succinate.
3. A hydroprocessing catalyst for use in desulfurization, denitrogenation, dearomatization in the presence of hydrogen, and hydrocracking, comprising a carrier based on at least one refractory oxide, at least one metal of group VIII and at least one metal of group VIB of the Periodic Table of Elements, and at least one organic compound selected from C1-C4 dialkyl succinates;
wherein the at least one organic compound is present in an amount of from 0.001 to 10 moles per mole of metals of groups VIB and VIII; and
wherein the hydroprocessing catalyst has been subjected to a thermal treatment at a temperature between 60\xb0 C. and 180\xb0 C. following an impregnation step during preparation of the hydroprocessing catalyst.
4. The hydroprocessing catalyst for use in desulfurization according to claim 3, wherein the at least one organic compound is dimethyl succinate.
5. A hydroprocessing catalyst for use in desulfurization, denitrogenation, dearomatization in the presence of hydrogen, and hydrocracking, comprising a carrier based on at least one refractory oxide, at least one metal of group VIII and at least one metal of group VIB of the Periodic Table of Elements, and at least one organic compound selected from C1-C4 dialkyl succinates, and
wherein the at least one organic compound is present in an amount of from 0.001 to 10 moles per mole of metals of groups VIB and VIII; and
wherein the hydroprocessing catalyst has been subjected to a thermal treatment at a temperature between 60\xb0 C. and 180\xb0 C. following an impregnation step during preparation of the hydroprocessing catalyst.
6. The hydroprocessing catalyst for use in desulfurization according to claim 5, wherein the at least one organic compound is dimethyl succinate.
7. A method for preparing a hydroprocessing catalyst as claimed in claim 1, comprising:
an impregnation step of bringing a nonmodified catalyst into contact with at least one organic compound selected from C1-C4 dialkyl succinates, wherein the nonmodified catalyst comprises a carrier based on at least one refractory oxide, at least one metal of group VIII and at least one metal of group VIB; and
a step of subjecting the product of the impregnation step to a thermal treatment at a temperature between 60\xb0 C. and 180\xb0 C.
8. The method of preparation as claimed in claim 7, characterized in that the nonmodified catalyst is a regenerated catalyst.
9. The method of preparation as claimed in claim 7, characterized in that the impregnation step is followed by at least one maturation step carried out at a temperature of from 0 to 100\xb0 C. for a time between a few minutes and a few years.
10. The method of preparation as claimed in claim 7, characterized in that the nonmodified catalyst is brought into contact with the at least one organic compound in the presence of at least one of a solvent or an acid.
11. The method of preparation as claimed in claim 10, characterized in that the at least one organic compound is at least partially soluble in the solvent used.
12. The method of preparation as claimed in claim 10, characterized in that the solvent is selected from water, toluene, xylenes, ethylene glycol, diethylene glycol, triethylene glycol, glycerol, ethanol, tert-butanol, polyethylene glycol (PEG), white spirit and petroleum ether.
13. The method of preparation as claimed in claim 12, wherein the polyethylene glycol has a molecular weight from 118 to 1000.
14. The method of preparation as claimed in claim 13, wherein the polyethylene glycol is triethylene glycol.
15. The method of preparation as claimed in claim 7, characterized in that the nonmodified catalyst is brought into contact with the at least one organic compound ex situ outside the hydroprocessing reactor.
16. The method of preparation as claimed in claim 7, characterized in that the nonmodified catalyst is brought into contact with the at least one organic compound in the presence of hydrogen and at least one sulfurization agent in a hydroprocessing reactor.
17. The method of preparation as claimed in claim 16, wherein the sulfurization agent is selected from hydrogen sulfide, elemental sulfur, CS2, mercaptans, sulfides, polysulfides and hydrocarbon fractions with a boiling point of less than 400\xb0 C. containing sulfur compounds.
18. A method of using an activated hydroprocessing catalyst comprising
(i) a step of placing the hydroprocessing catalyst as claimed in claim 1 into contact with hydrogen and at least one sulfurization agent, and
(ii) a step of bringing the activated hydroprocessing catalyst obtained in step (i) into contact with hydrocarbons.
19. The method of using an activated hydroprocessing catalyst as claimed in claim 18, wherein the sulfurization agent is selected from hydrogen sulfide, elemental sulfur, CS2, mercaptans, sulfides, polysulfides and hydrocarbon fractions with a boiling point of less than 400\xb0 C. containing sulfur compounds.
20. The method of using an activated hydroprocessing catalyst as claimed in claim 19, characterized in that the sulfurization agent is dimethyl disulfide.
21. The method of using an activated hydroprocessing catalyst as claimed in claim 18, wherein the hydrocarbons are derived from petroleum fractions with a boiling point of between 40 and 560\xb0 C.
22. The method of using an activated hydroprocessing catalyst as claimed in claim 18, wherein the method is carried out during hydroprocessing or hydrocracking of the hydrocarbons.

1. A memory subsystem for controlling access to a system memory of a data processing system, the memory subsystem comprising:
error detection circuitry; and
control logic that:
detects whether or not at least one potentially transient condition is present that would prevent timely servicing of one or more memory access requests directed to the associated system memory;
in response to detecting at least one potentially transient condition that would prevent timely servicing of one or more memory access requests directed to the associated system memory, identifies a first read request affected by the at least one potentially transient condition, wherein the first read request specifies a target address; and
in response to identifying the read request, transmits, to a request source, dummy data and a data error indicator to indicate to the request source to issue a second read request for the target address.
2. The memory subsystem of claim 1, wherein the at least one potentially transient condition is an address error.
3. The memory subsystem of claim 1, wherein the at least one potentially transient condition is a memory refresh cycle.
4. The memory subsystem of claim 1, wherein the at least one potentially transient condition is a hang condition.
5. The memory subsystem of claim 1, wherein:
the memory subsystem transmits granules of the dummy data at intervals; and
the memory subsystem transmits the data error indicator with one of the granules other than a first granule.
6. The method of claim 1, wherein:
the first read request indicates posted error detection processing is enabled for the first request; and
the second read request indicates posted error detection processing is disabled for the second request.
7. A data processing system comprising:
the memory subsystem of claim 1; and
a processor core coupled to the memory subsystem, wherein the processor core is the request source.
8. The data processing system of claim 7, wherein the processor core includes:
an execution unit that speculatively finishes execution of one or more instructions that are dependent on the first read request prior to receipt of the data error indicator; and
completion logic that flushes the one or more instructions in response to the data error indicator.
9. A design structure tangibly embodied in a machine-readable storage device for designing, manufacturing, or testing an integrated circuit, the design structure comprising:
a memory subsystem of a data processing system, including:
error detection circuitry; and
control logic that:
detects whether or not at least one potentially transient condition is present that would prevent timely servicing of one or more memory access requests directed to the associated system memory;
in response to detecting at least one potentially transient condition that would prevent timely servicing of one or more memory access requests directed to the associated system memory, identifies a first read request affected by the at least one potentially transient condition, wherein the first read request specifies a target address; and
in response to identifying the read request, transmits, to a request source, dummy data and a data error indicator to indicate to the request source to issue a second read request for the target address.
10. The design structure of claim 9, wherein the design structure comprises a hardware description language (HDL) design structure.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A system for generating geofeed-based alerts, the system comprising:
one or more processors programmed by one or more computer program instructions to:
obtain an alert parameter that specifies a trend alert condition related to content that is aggregated from a plurality of social media content providers, wherein the trend alert condition when satisfied causes an alert to be generated, wherein the content is related to one or more geographically definable locations that is formatted individually for the plurality of social media content providers;
monitor at a plurality of times the content that is aggregated from the plurality of social media content providers;
determine that a first volume of the content was available at a first time, a second volume of the content greater than the first volume was available at a second time after the first time, and a third volume of the content greater than the first volume was available at a third time after the second time based on the monitoring;
determine that the trend alert condition has been satisfied based on the determination that the first volume of the content was available at the first time, the second volume of the content greater than the first volume was available at the second time after the first time, and the third volume of the content greater than the first volume was available at the third time after the second time;
generate a geofeed-based alert based on the determination; and
communicate a notification that includes the geofeed-based alert.
2. The system of claim 1, wherein the alert parameter comprises a subject matter alert parameter that specifies a subject matter alert condition, the one or more processors further programmed to:
determine that the content includes subject matter that satisfies the subject matter alert condition.
3. The system of claim 2, wherein the one or more processors are further programmed to:
determine whether a keyword specified by the subject matter alert parameter is included in the content.
4. The system of claim 1, wherein the alert parameter comprises a volume alert parameter that specifies a volume alert condition, the one or more processors further programmed to:
determine that the first volume, the second volume, or the third volume of the content exceeds a threshold volume and satisfies the volume alert condition.
5. The system of claim 4, wherein the one or more processors are further programmed to:
obtain the threshold volume from the volume alert parameter.
6. The system of claim 4, wherein the one or more processors are further programmed to:
automatically determine the threshold volume based on a historical volume of content.
7. The system of claim 1, wherein the alert parameter comprises a temporal alert parameter that specifies a temporal alert condition, the one or more processors further programmed to:
determine that the content is related to a time specified by the temporal alert parameter and satisfies the temporal alert condition.
8. The system of claim 1, wherein the one or more processors are further programmed to:
obtain a subscription to the geofeed-based alert; and
communicate the notification that includes the geofeed-based alert to one or more subscribers associated with the subscription.
9. A method for generating geofeed-based alerts, the method being implemented in a computer that includes one or more processors programmed by one or more computer program instructions, the method comprising:
obtaining, by the one or more processors programmed by the one or more computer program instructions, an alert parameter that specifies a trend alert condition related to content that is aggregated from a plurality of social media content providers, wherein the trend alert condition when satisfied causes an alert to be generated, wherein the content is related to one or more geographically definable locations that is formatted individually for the a plurality of social media or other content providers;
monitoring, by the one or more processors, at a plurality of times the content that is aggregated from the plurality of social media content providers;
determining, by the one or more processors, that a first volume of the content was available at a first time, a second volume of the content greater than the first volume was available at a second time after the first time, and a third volume of the content greater than the first volume was available at a third time after the second time based on the monitoring;
determining, by the one or more processors, that the trend alert condition has been satisfied based on the determination that the first volume of the content was available at the first time, the second volume of the content greater than the first volume was available at the second time after the first time, and the third volume of the content greater than the first volume is available at the third time after the second time;
generating, by the one or more processors, a geofeed-based alert based on the determination; and
communicating, by the one or more processors, a notification that includes the geofeed-based alert.
10. The method of claim 9, wherein the alert parameter comprises a subject matter alert parameter that specifies a subject matter alert condition, the method further comprising:
determining, by the one or more processors, that the content includes subject matter that satisfies the subject matter alert condition.
11. The method of claim 10, wherein determining that the content includes subject matter that satisfies the subject matter alert condition comprises:
determining, by the one or more processors, whether a keyword specified by the subject matter alert parameter is included in the content.
12. The method of claim 9, wherein the alert parameter comprises a volume alert parameter that specifies a volume alert condition, the method further comprising:
determining, by the one or more processors, that the first volume, the second volume, or the third volume of the content exceeds a threshold volume and satisfies the volume alert condition.
13. The method of claim 12, the method further comprising:
obtaining, by the one or more processors, the threshold volume from the volume alert parameter.
14. The method of claim 12, the method further comprising:
automatically determining, by the one or more processors, the threshold volume based on a historical volume of content.
15. The method of claim 9, wherein the alert parameter comprises a temporal alert parameter that specifies a temporal alert condition, the method further comprising:
determining, by the one or more processors, that the content is related to a time specified by the temporal alert parameter and satisfies the temporal alert condition.
16. The method of claim 9, the method further comprising:
obtaining, by the one or more processors, a subscription to the geofeed-based alert;
communicating, by the one or more processors, the notification that includes the geofeed-based alert to one or more subscribers associated with the subscription.
17. The system of claim 1, wherein the one or more processors are further programmed to:
determine a sentiment of users who created the content based on the determination that the trend alert condition has been satisfied.
18. The method of claim 9, the method further comprising:
determining, by the one or more processors, a sentiment of users who created the content based on determining that the trend alert condition has been satisfied.