Author: claimsbot

1. A motor vehicle comprising:
first and second drive units for can be operated jointly or individually to generate drive torque
a device for predefining a driver’s request, the device being a throttle grip to which a restoring force is applied or an accelerator pedal to which a restoring force is applied, the device being embodied so that a force level with an increased restoring force is present within an adjustment range of the device; and
a control unit for processing the driver’s request and for generating a control signal for actuating the drive units, the control unit being embodied so that, starting from a driving mode in which only the first drive unit is active for generating a positive drive torque, switching over occurs from first drive unit to the second drive unit or the second drive unit also is activated when the force level is exceeded, at least one feature that characterizes the force level being variable based on at least one of a plurality of peripheral conditions.
2. The motor vehicle of claim 1, wherein the force level can be positioned at different adjustment travel points within the adjustment range of the device, and the feature is the position of the force level.
3. The motor vehicle of claim 1, wherein a limiting value of a vehicle operating parameter is determined at least at one time, wherein information about events or status variables that characterize the individual peripheral conditions is included in calculating the limiting value and when the feature is changed taking into account the limiting value.
4. The motor vehicle of claim 1, wherein the peripheral conditions include at least one of a:
torque request by the driver,
kinetic state of the vehicle,
driving position,
travel resistance,
road profile or route profile or topography,
operating state of a brake system,
switched-on state of loads of a vehicle on-board power system andor rated power of switched-on loads, and
temperature of a high voltage battery.
5. The motor vehicle of claim 1, wherein the first drive unit is an electric machine, and the second drive unit is an internal combustion engine.
6. The motor vehicle of claim 1, characterized in that, above a value that represents a measure for the adjustment, the force level has a significantly more linear or flatter profile in a first section than in a following second section.
7. A motor vehicle comprising:
an electric machine and an internal combustion engine that can be operated jointly or individually to generate drive torque;
an accelerator pedal that can be adjusted angularly by a driver within an adjustment range to input a driver’s request and to which a restoring force is applied, the accelerator pedal being embodied so that a force level with an increased restoring force is present within the adjustment range of the accelerator pedal; and
a control unit for processing the driver’s request and for generating a control signal for actuating at least one of the electric machine and an internal combustion engine, the control unit being embodied so that, starting from a driving mode in which only the electric machine is active for generating a positive drive torque, switching over at least partly to the internal combustion engine occurs when the force level is exceeded, the control unit further being embodied to receive inputs relating to a plurality of peripheral conditions and to vary the force level based on at least one of the plurality of peripheral conditions.
8. The motor vehicle of claim 7, wherein the peripheral conditions include at least one of a:
torque request by the driver,
kinetic state of the vehicle,
driving position,
travel resistance,
road profile or route profile or topography,
operating state of the brake system,
switched-on state of loads of a vehicle on-board power system andor rated power of switched-on loads, and
temperature of a high voltage battery.
9. A method for operating a motor vehicle that has an electric machine and an internal combustion engine that can be operated jointly or individually to generate drive torque, the method comprising:
generating the driving torque by the electric machine;
measuring a plurality of peripheral conditions;
sensing an accelerator angle set by a driver;
varying a restoring force applied to the accelerator pedal based on the measured peripheral conditions; and
switching over at least partly to the internal combustion engine if a force level applied by the driver to the accelerator exceeds the restoring force.
10. The method of claim 9, wherein the step of measuring a plurality of peripheral conditions comprises measuring at least one of a:
torque request by the driver,
kinetic state of the vehicle,
driving position,
travel resistance,
road profile or route profile or topography,
operating state of the brake system,
switched-on state of loads of a vehicle on-board power system andor rated power of switched-on loads, and
temperature of a high voltage battery.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for forming a semiconductor device the method comprising:
providing a semiconductor substrate;
forming a stuck over the semiconductor substrate;
forming an insulating layer over the stack;
forming a spacer over the insulating layer;
forming a heavily doped region adjacent the spacer;
removing first spacer after forming the heavily doped region; and
after removing the spacer, implanting through the insulating layer and into the semiconductor substrate to form an extension region, wherein the heavily doped region and extension region are part of a current electrode.
2. The method of claim 1, wherein forming the insulating layer further comprises forming an insulating layer comprising nitrogen.
3. The method of claim 1, wherein forming the insulating layer further comprises forming a layer comprising silicon and nitrogen.
4. The method of claim 1, wherein forming the insulating layer further comprises forming a layer devoid of silicon dioxide.
5. The method of claim 1, wherein providing the semiconductor substrate further comprises providing a semiconductor substrate comprising silicon.
6. The method of claim 1, wherein forming the stack further comprises:
forming a dielectric over the semiconductor substrate; and
forming a gate electrode over the gate dielectric.
7. The method of claim 6, wherein forming the stack further comprises forming a capping layer over the gate electrode.
8. The method of claim 7, further comprising removing the capping layer after implanting.
9. The method of claim 1, wherein forming the insulating layer over the stack further comprises forming the insulating layer in contact with the semiconductor substrate.
10. The method of claim 9, wherein forming the insulating layer in contact with the semiconductor substrate further comprises forming a nitride layer in contact with the semiconductor substrate.
11. A method for forming a semiconductor device, the method comprising:
providing a semiconductor substrate;
forming a stack over the semiconductor substrate;
forming a first spacer over the insulating layer;
implanting into the semiconductor substrate to form a heavily doped region adjacent the first spacer;
removing the first spacer after forming the heavily doped region;
forming an insulating layer over the stack after removing the first spacer;
implanting through the insulating layer and into the semiconductor substrate to form an extension region, wherein the heavily doped region and extension region are part of a current electrode; and
forming a second spacer over the insulating layer.
12. The method of claim 1, wherein forming the heavily doped region adjacent the spacer further comprises forming a doped epitaxial region.
13. A method of forming a semiconductor device comprising:
providing a semiconductor substrate;
forming a stack over the semiconductor substrate;
forming an insulating layer over the stack and the semiconductor substrate;
implanting through the insulating layer and into the semiconductor substrate to form an extension region;
forming a first spacer over the semiconductor substrate; and
forming a heavily doped region adjacent the first spacer.
14. The method of claim 13, wherein forming the insulating layer further comprises forming a layer devoid of silicon dioxide.
15. The method of claim 13, wherein forming the first spacer is performed after forming the insulating layer.
16. The method of claim 15, comprising: removing the first spacer before implanting through the insulating layer; and forming a second spacer after implanting through the insulating layer; wherein forming the heavily doped region is performed before removing the first spacer.
17. The method of claim 13, wherein forming the first spacer is performed before forming the insulating layer.
18. The method of claim 17, further comprising:
removing the first spacer before forming the insulating layer; and
forming a second spacer after implanting; and wherein forming the heavily doped region is performed before forming the insulating layer.
19. The method of claim 13, wherein forming the insulating layer further comprises forming an insulating layer comprising nitrogen.
20. The method of claim 13, wherein forming the insulating layer further comprises forming a silicon nitride layer.
21. The method of claim 13, wherein providing the semiconductor substrate further comprises providing a semiconductor substrate comprising silicon.
22. The method of claim 13, wherein forming a stack further comprises:
forming a gate dielectric over the semiconductor substrate; and
forming a gate electrode over the gate dielectric.
23. The method of claim 18, wherein forming the stack further comprises forming a capping layer over the gate electrode.
24. The method of claim 23, further comprising removing the capping layer after implanting.
25. The method of claim 13, wherein forming the insulating layer over the stack further comprises forming the insulating layer in contact with the semiconductor substrate.
26. The method of claim 13, wherein forming the insulating layer in contact with the semiconductor substrate further comprises forming a nitride layer in contact with the semiconductor substrate.
27. A method of forming a semiconductor device, the method comprising:
providing a semiconductor substrate;
forming a stack over the semiconductor substrate;
forming an insulating layer over die stack and the semiconductor substrate;
implanting an extension region through the insulating layer and into the semiconductor substrate;
forming a spacer adjacent the stack and over the insulating layer;
removing a portion of the insulating layer over the semiconductor substrate; and
forming a heavily doped region within the semiconductor region and adjacent the spacer.
28. The method of claim 27, wherein forming the insulating layer further comprises forming a layer devoid of silicon dioxide.

1. A cooling apparatus for cooling a plurality of electronic devices mounted on a circuit board, comprising a plurality of thermal conductors mounted on the electronic devices and formed with thermal conductive fins, a housing formed with fins fitted with the fins of the thermal conductors, and cooling means mounted on the housing for removing heat from the electronic devices, wherein a plane heat pipe is formed in the housing.
2. A cooling apparatus for cooling a plurality of electronic devices mounted on a circuit board, comprising a plurality of thermal conductors mounted on the electronic devices and formed with heat conductive fins, a housing having fins fitted with the fins of the thermal conductors, a heat pipe embedded in a recess in an upper part of the housing, and cooling means mounted on the heat pipe, for removing heat from the electronic devices.
3. A cooling apparatus as set forth in claim 1, wherein the cooling means for removing heat from the electronic devices is a heat sink or a water cooling jacket.
4. A cooling apparatus as set forth in claim 2, wherein the cooling means for removing heat from the electronic devices is a heat sink or a water cooling jacket.
5. A cooling apparatus as set forth in claim 1, wherein a heat conductive medium is interposed between the electronic devices and the thermal conductors andor between the thermal conductive fins of the thermal conductors and the fins formed on the housing.
6. A cooling apparatus as set forth in claim 2, wherein a heat conductive medium is interposed between the electronic devices and the thermal conductors andor between the thermal conductive fins of the thermal conductors and the fins formed on the housing.
7. A cooling apparatus as set forth in claim 3, wherein a heat conductive medium is interposed between the electronic devices and the thermal conductors andor between the thermal conductive fins of the thermal conductors and the fins formed on the housing.
8. A cooling apparatus as set forth in claim 4, wherein a heat conductive medium is interposed between the electronic devices and the thermal conductors andor between the thermal conductive fins of the thermal conductors and the fins formed on the housing.
9. A cooling apparatus as set forth in claim 2, wherein the heat pipe embedded in the recess in the upper part of the housing is a plane heat-pipe.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. The electronic component comprising:
a first electrode conductor section formed of the non-photosensitive conductive paste on a surface connected with a principal surface, an end portion at the principal surface side being made taper shape; and
a second electrode conductor section having the photosensitive conductive paste exposed and developed on said principal surface;
wherein the end portion of the first electrode conductor section having a taper shape is overlapped at least a part of the second electrode conductor.
2. The electronic component according to claim 1, wherein the first electrode conductor section formed of said non-photosensitive conductive paste constitutes an end face electrode or a side face electrode on an end face or a side face of said component.
3. The electronic component according to claim 1, wherein said surface connecting with said principal surface has a taper connection face, and the second electrode conductor formed by said photosensitive conductive extends from said principal plane to said taper connection face to overlap each other.
4. An electronic component comprising:
a first electrode conductor section formed of said non-photosensitive conductive paste on a principal surface; and
a second electrode conductor having said photosensitive conductive paste exposed and developed, and being at least partly overlapped on said first electrode conductor,
wherein contours of the overlapped areas of both first and second electrode conductor sections being coincident.
5. The electronic component according to claim 4, wherein the contours of the overlapped areas of both electrode conductor sections are coincident and constitute the bumps.
6. An electronic component comprising:
a first electrode conductor section having said photosensitive conductive paste exposed and developed, by which an electrode area is defined; and
a second electrode conductor section formed of a non-photosensitive conductive paste, which is formed in the electrode area defined by said first electrode conductor section.
7. An electronic component comprising:
a dielectric block;
a first electrode conductor section having a photosensitive conductive paste exposed and developed on a principal surface of said dielectric block; and
an inner peripheral electrode conductor section formed of a non-photosensitive conductive paste on an inner peripheral face of a through hole that is opened through said principal surface,
wherein both electrode conductor sections are overlapped at least partly near an opening portion of said through hole on said principal plane to electrically conducts to make up a dielectric filter.
8. The electronic component according to any one of claims 1 to 7, wherein the electrode conductor section formed of said photosensitive conductive paste and the electrode conductor section formed of said non-photosensitive conductive paste are at least partly overlapped with each other and sintered.
9. A method for manufacturing an electronic component comprising: the steps of:
forming a first electrode conductor section of a non-photosensitive conductive pattern on a surface connected with a principal surface, an end portion at the principal surface side being made taper shape the other plane;
forming a second electrode conductor section having a photosensitive conductive paste exposed and developed on said principal surface;
wherein the end portion of the first electrode conductor section having a taper shape is overlapped at least a part of the second electrode conductor
10. The method for manufacturing the electronic component according to claim 9, said surface connecting with said principal surface has a taper connection face, and the second electrode conductor formed by said photosensitive conductive extends from said principal plane to said taper connection face to overlap each other.
11. A method for manufacturing the electronic component comprising the steps of:
forming a first electrode conductor section of a non-photosensitive conductive pattern on a principal surface;
forming a second electrode conductor section having a photosensitive conductive paste exposed and developed on said principal surface, the second electrode conductor section being at least partly overlapped on said first electrode conductor section;
patterning said first electrode conductor section of the non-photosensitive conductive paste using said second electrode conductor section as a mask.