Author: claimsbot

1. An image forming apparatus comprising:
an image forming unit including image forming unit elements, wherein the image forming elements include,
an image carrier having a surface on which a latent image can be formed,
a charging unit configured to receive a charging voltage and to charge the surface of the image carrier, a developer carrier configured to receive a development voltage and to form a developer image by adhering a developer on the latent image formed on the image carrier, and
a developer supplier configured to receive a supply voltage and to supply the developer to the developer carrier,

a fixing unit configured to fix the transferred developer image formed on a medium which has been transferred from the image carrier to the medium;
a voltage setting unit operable, when an unoperated time period, which is a time period from an end of an image forming operation to a start of a subsequent image forming operation, is equal to or greater than a threshold, to set a post unoperated period image formation preparation voltage which is different from a normal image formation voltage, according to the unoperated time period; and
a post unoperated period image formation preparation processor operable to perform an idling operation to rotate the image carrier for a predetermined idling time while applying the post unoperated period image formation preparation voltage to a given one or more of the image forming elements, wherein the post unoperated period image formation preparation processor is configured to set different idling time periods based on different unoperated periods.
2. The image forming apparatus of claim 1, wherein the post unoperated period image formation preparation processor sets the predetermined idling time period longer as the unoperated period becomes longer.
3. The image forming apparatus of claim 2, wherein the post unoperated period image formation preparation processor sets the predetermined idling time period longer by setting an increased rotation number of the image carrier.
4. The image forming apparatus of claim 1, further comprising a timer measuring the unoperated time period.
5. The image forming apparatus of claim 1, further comprising
a post unoperated period image formation processor operable to operate, after the idling operation ends, image formation process while applying a post unoperated period image formation voltage, which is different from a normal image formation voltage and the post unoperated period image formation preparation voltage, to the given one or more of the image forming elements.
6. The image forming apparatus of claim 1, wherein
the given one or more image forming elements is the charging unit; and
the voltage setting unit sets the post unoperated period image formation preparation voltage for the charging voltage.
7. The image forming apparatus of claim 1, wherein
the given one or more image forming elements is the developer supplier; and
the voltage setting unit sets the post unoperated period image formation preparation voltage for the supply voltage.
8. The image forming apparatus of claim 1, wherein the voltage setting unit sets the absolute value of the post idle period image formation preparation voltage greater than the absolute value of a normal voltage set value.
9. The image forming apparatus of claim 8, wherein the voltage setting unit sets the post unoperated period image formation preparation voltage for the supply voltage larger in absolute value as the unoperated period becomes longer.
10. The image forming apparatus of claim 1, wherein the voltage setting unit is configured to set different image formation preparation voltages based on different unoperated periods.
11. An image forming apparatus comprising:
an image forming unit including image forming unit elements, wherein the image forming elements include,
an image carrier having a surface on which a latent image can be formed
a charging unit configured to receive a charging voltage and to charge the surface of the image carrier,
a developer carrier configured to receive a development voltage and to form a developer image by adhering a developer on the latent image formed on the image carrier, and
a developer supplier configured to receive a supply voltage and to supply the developer to the developer carrier,

a fixing unit configured to fix the transferred developer image formed on a medium which has been transferred from the image carrier to the medium;
a voltage setting unit operable, when an unoperated time period, which is a time period from an end of an image forming operation to a start of a subsequent image forming operation, is equal to or greater than a threshold, to set a post unoperated period image formation preparation voltage which is different from a normal image formation voltage, according to the unoperated time period;
a post unoperated period image formation preparation processor operable to perform an idling operation to rotate the image carrier for a predetermined idling time while applying the post unoperated period image formation preparation voltage to a given one or more of the image forming elements;
a fixing unit temperature detection unit operable to detect a temperature of the fixing unit; and
an unoperated period estimation processor operable to estimate the unoperated time period based on the temperature of the fixing unit.
12. An image forming apparatus comprising:
an exposure unit operable to emit light:
an image forming unit including image forming unit elements, wherein the image forming elements include,
an image carrier having a surface on which a latent image can be formed by the exposure unit,
a charging unit configured to receive a charging voltage and to charge the surface of the image carrier,
a developer carrier configured to receive a development voltage and to form a developer image by adhering a developer on the latent image formed on the image carrier, and
a developer supplier configured to receive a supply voltage and to supply the developer to the developer carrier,

a transfer unit configured to transfer the developer image from the image carrier to a medium,
a fixing unit configured to fix the transferred developer image onto the medium;
a voltage setting unit operable, when an unoperated time period, which is a time period from an end of an image forming operation to a start of a subsequent image forming operation, is equal to or greater than a threshold, to set a post unoperated period image formation preparation voltage which is different from a normal image formation voltage, according to the unoperated time period, wherein the voltage setting unit is configured to set different image formation preparation voltages based on different unoperated periods; and
a post unoperated period image formation preparation processor operable to perform an idling operation to operate the image forming unit for a predetermined idling time while applying the post unoperated period image formation preparation voltage to a given one or more of the image forming elements, without forming the latent image on the surface of the image carrier by the exposure unit.
13. The image forming apparatus of claim 12, wherein the post unoperated period image formation preparation processor sets the predetermined idling time period longer as the unoperated time period becomes longer.
14. The image forming apparatus of claim 13, wherein the post unoperated period image formation preparation processor sets the predetermined idling time period longer by setting an increased rotation number of the image carrier.
15. The image forming apparatus of claim 12, further comprising
a timer measuring the unoperated time period.
16. The image forming apparatus of claim 12, further comprising
a fixing unit temperature detection unit operable to detect a temperature of the fixing unit; and
an unoperated period estimation processor operable to estimate the unoperated time period based on the temperature of the fixing unit.
17. The image forming apparatus of claim 12, further comprising
a post unoperated period image formation processor operable to operate, after the idling operation ends, image formation process while applying a post unoperated period image formation voltage, which is different from a normal image formation voltage and the post unoperated period image formation preparation voltage, to the given one or more of the image forming elements.
18. The image forming apparatus of claim 12, wherein
the given one or more image forming elements is the charging unit; and
the voltage setting unit sets the post unoperated period image formation preparation voltage for the charging voltage.
19. The image forming apparatus of claim 12, wherein
the given one or more image forming elements is the developer supplier; and
the voltage setting unit sets the post unoperated period image formation preparation voltage for the supply voltage.
20. The image forming apparatus of claim 12, wherein the voltage setting unit sets the absolute value of the post idle period image formation preparation voltage greater than the absolute value of a normal voltage set value.
21. The image forming apparatus of claim 20, wherein the voltage setting unit sets the post unoperated period image formation preparation voltage for the supply voltage larger in absolute value as the unoperated period becomes longer.
22. The image forming apparatus of claim 12, wherein the post unoperated period image formation preparation processor is configured to set different idling time periods based on different unoperated periods.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A display apparatus, comprising:
a light-emitting unit that includes a plurality of light-emitting devices of which emission colors are different from one another;
a display unit configured to display an image on a screen by modulating light from the light-emitting unit based on image data;
a first determination unit configured to determine, in a region of the screen that corresponds to the light-emitting unit, whether a ratio of a total number of first type pixels of which chroma level is less than a first chroma level, with respect to a total number of pixels in the region, is a first ratio or more;
a second determination unit configured to determine, in the region, whether a ratio of a total number of second type pixels of which chroma level is a second chroma level or more, with respect to the total number of pixels in the region, is a second ratio or more, when the determination result of the first determination unit is affirmative; and
a control unit configured to increase emission brightness of a target device, which is at least one of the plurality of light-emitting devices, based on the determination result of the second determination unit.
2. The display apparatus according to claim 1, further comprising:
a determination unit configured to determine an increase rate of emission brightness of each of the plurality of light-emitting devices based on the image data; and
a correction unit configured to correct an increase rate of the emission brightness of the target device to a greater value as the number of the second type pixels of which chroma level for the emission color of the target device is the second chroma level or more is greater, wherein
the control unit controls the emission brightness of the target device to be a value generated by correcting a predetermined reference value with the increase rate after the correction by the correction unit.
3. The display apparatus according to claim 2, further comprising:
a limiting unit configured to limit the increase rate after correction by the correction unit so that the emission brightness of the target device does not exceed an upper limit value, wherein
the control unit controls the emission brightness of the target device to be a value generated by correcting the predetermined reference value with the increase rate after limiting the increase rate by the limiting unit.
4. The display apparatus according to claim 3, further comprising:
a setting unit configured to set an upper limit value of the increase rate determined by the determination unit, wherein
the limiting unit limits the increase rate after the correction by the correction unit to a value not greater than B1B2 where B1 denotes an upper limit value of the emission brightness, and B2 denotes a value generated by correcting the predetermined reference value with the upper limit value that is set by the setting unit.
5. The display apparatus according to claim 4, further comprising:
a gradation number setting unit configured to set a lower limit value of a gradation number of the image data, wherein
the setting unit sets, as the upper limit value of the increase rate, a value that is smaller as the lower limit value set by the gradation number setting unit is greater.
6. The display apparatus according to claim 1, further comprising:
an image correction unit configured to correct the image data according to emission brightness of each of the plurality of light-emitting devices, wherein
the display unit modulates the light from the light-emitting unit based on the image data after the correction by the image correction unit.
7. The display apparatus according to claim 6, wherein
the color of the light emitted from the light-emitting unit is changed by increasing the emission brightness of the target device, and
the image correction unit corrects the image data so that a color gamut of the image displayed on the screen is expanded in a direction where the color of the light emitted from the light-emitting unit changes.
8. The display apparatus according to claim 6, wherein
the image data is image data in which a brightness gradation of a high brightness region is compressed, and the image correction unit increases a brightness value of the high brightness region of the image data.
9. The display apparatus according to claim 1, wherein
the light-emitting unit is provided in plurality,
for each of the light-emitting units, the first determination unit determines, in a region corresponding to the light-emitting unit, whether a ratio of a total number of first type pixels with respect to a total number of pixels in the region, is the first ratio or more, and
the second determination unit determines, in a region corresponding to the light-emitting unit for which the determination result of the first determination unit is affirmative, whether a ratio of a total number of second type pixels with respect to a total number of pixels in the region, is the second ratio or more.
10. The display apparatus according to claim 1, wherein
the second determination unit performs determination for each of the light-emitting devices, using a pixel of which chroma level for the emission color of the light-emitting device is the second chroma level or more, as the second type pixel, and
the control unit increases emission brightness of the light-emitting device for which the determination result of the second determination unit is affirmative.
11. The display apparatus according to claim 1, wherein
the first type pixel is a pixel for which the difference between the emission color of each of the plurality of light-emitting devices and a color of the pixel is a first threshold or greater, and
the second type pixel is a pixel for which the difference between the emission color of any of the plurality of light-emitting devices and a color of the pixel is a second threshold or less.
12. A method for controlling a display apparatus which has:
a light-emitting unit that includes a plurality of light-emitting devices of which emission colors are different from one another; and
a display unit configured to display an image on a screen by modulating light from the light-emitting unit based on image data, the method comprising:
a first determination step of determining, in a region of the screen that corresponds to the light-emitting unit, whether a ratio of a total number of first type pixels of which chroma level is less than a first chroma level, with respect to a total number of pixels in the region, is a first ratio or more;
a second determination step of determining, in the region, whether a ratio of a total number of second type pixels of which chroma level is a second chroma level or more, with respect to the total number of pixels in the region, is a second ratio or more, when the determination result in the first determination step is affirmative; and
a control step of increasing emission brightness of a target device, which is at least one of the plurality of light-emitting devices based on the determination result in the second determination step.
13. The method according to claim 12, further comprising:
a determination step of determining an increase rate of emission brightness of each of the plurality of light-emitting devices based on the image data; and
a correction step of correcting an increase rate of the emission brightness of the target device to a greater value as the number of the second type pixels of which chroma level for the emission color of the target device is the second chroma level or more is greater, wherein
in the control step, the emission brightness of the target device is controlled to be a value generated by correcting a predetermined reference value with the increase rate after the correction in the correction step.
14. The method according to claim 13, further comprising:
a limiting step of limiting the increase rate after correction in the correction step so that the emission brightness of the target device does not exceed an upper limit value, wherein
in the control step, the emission brightness of the target device is controlled to be a value generated by correcting the predetermined reference value with the increase rate after limiting the increase rate in the limiting step.
15. The method according to claim 14, further comprising:
a setting step of setting an upper limit value of the increase rate determined in the determination step, wherein
in the limiting step, the increase rate after the correction in the correction step is limited to a value not greater than B1B2 where B1 denotes an upper limit value of the emission brightness, and B2 denotes a value generated by correcting the predetermined reference value with the upper limit value that is set in the setting step.
16. The method according to claim 15, further comprising:
a gradation number setting step of setting a lower limit value of a gradation number of the image data, wherein
in the setting step, a value, that is smaller as the lower limit value set in the gradation number setting step is greater, is set as the upper limit value of the increase rate.
17. The method according to claim 12, further comprising:
an image correction step of correcting the image data according to emission brightness of each of the plurality of light-emitting devices, wherein
the display unit modulates the light from the light-emitting unit based on the image data after the correction in the image correction step.
18. The method according to claim 17, wherein
the color of the light emitted from the light-emitting unit is changed by increasing the emission brightness of the target device, and
in the image correction step, the image data is corrected so that a color gamut of the image displayed on the screen is expanded in a direction where the color of the light emitted from the light-emitting unit changes.
19. The method according to claim 17, wherein
the image data is image data in which a brightness gradation of a high brightness region is compressed, and in the image correction step, a brightness value of the high brightness region of the image data is increased.
20. The method according to claim 12, wherein
the light-emitting unit is provided in plurality,
in the first determination step, for each of the light-emitting units, it is determined that, in a region corresponding to the light-emitting unit, whether a ratio of a total number of first type pixels with respect to a total number of pixels in the region, is the first ratio or more, and
in the second determination step, it is determined that, in a region corresponding to the light-emitting unit for which the determination result in the first determination step is affirmative, whether a ratio of a total number of second type pixels with respect to a total number of pixels in the region, is the second ratio or more.
21. The method according to claim 12, wherein
in the second determination step, for each of the light-emitting devices, determination is performed using a pixel of which chroma level for the emission color of the light-emitting device is the second chroma level or more, as the second type pixel, and
in the control step, emission brightness of the light-emitting device for which the determination result in the second determination step is affirmative is increased.
22. The method according to claim 12, wherein
the first type pixel is a pixel for which the difference between the emission color of each of the plurality of light-emitting devices and a color of the pixel is a first threshold or greater, and
the second type pixel is a pixel for which the difference between the emission color of any of the plurality of light-emitting devices and a color of the pixel is a second threshold or less.

1. A photoelectric conversion apparatus comprising:
a semiconductor substrate of a first conduction type;
a first semiconductor region of the first conduction type;
a second semiconductor region of a second conduction type, which isolates the semiconductor substrate and the first semiconductor region from each other;
a pixel unit in which pixels are arranged two-dimensionally, each pixel including:
a photoelectric conversion unit with a third semiconductor region of the first conduction type having an impurity concentration higher than that of the first semiconductor region and a fourth semiconductor region of the second conduction type,
an amplifying transistor for readout signals from the photoelectric conversion unit, and
an element isolation region that electrically isolates an active region where the photoelectric conversion unit is arranged from an active region where the amplifying transistor is arranged;

a fifth semiconductor region of the second conduction type, which is arranged in the first semiconductor region along a side surface and a bottom surface of the element isolation region of each pixel; and
a sixth semiconductor region of the second conduction type, which is arranged between source and drain regions of an amplifying transistor of each pixel and is the second semiconductor region, in a region below a gate electrode of the amplifying transistor,
wherein a contact for supplying a reference voltage to the sixth semiconductor region, via the fifth semiconductor region, is arranged in the active region where a photoelectric conversion unit of each pixel is arranged,
wherein the contact includes a plug for supplying the reference voltage, and a seventh semiconductor region of the second conduction type to which the plug is electrically connected, and
wherein an eighth semiconductor region of the second conduction type, which has an impurity concentration lower than that of the seventh semiconductor region, is arranged between the seventh semiconductor region and the third semiconductor region.
2. The photoelectric conversion apparatus according to claim 1, wherein the fifth semiconductor region and the second semiconductor region are electrically connected to each other.
3. The photoelectric conversion apparatus according to claim 1, wherein the sixth semiconductor region and the eighth semiconductor region are formed in a same step.
4. The photoelectric conversion apparatus according to claim 1, wherein a plurality of pixels are used as a unit block, and a contact is arranged for each unit block.
5. The photoelectric conversion apparatus according to claim 4, wherein, in the plurality of pixels included in the unit block, the fourth semiconductor region is arranged so as to be continuous with the fourth semiconductor region of an adjacent pixel, and the contact supplies a reference voltage via the fourth semiconductor region to the sixth semiconductor regions of the plurality of pixels included in the unit block.
6. The photoelectric conversion apparatus according to claim 1,
wherein primary color filters are arranged to correspond to the pixels of the pixel unit, and
wherein the contact is arranged in a pixel where a blue filter among the primary color filters is arranged.
7. A photoelectric conversion apparatus comprising:
a semiconductor substrate of a first conduction type;
a first semiconductor region of the first conduction type;
a second semiconductor region of a second conduction type, which isolates the semiconductor substrate and the first semiconductor region from each other;
a pixel unit in which unit cells are arranged two-dimensionally, each unit cell including:
a plurality of photoelectric conversion units, each photoelectric conversion unit including a third semiconductor region of the first conduction type having an impurity concentration higher than that of the first semiconductor region and a fourth semiconductor region of the second conduction type,
an amplifying transistor for reading out signals from the plurality of photoelectric conversion units, and
an element isolation region that electrically isolates an active region where each of the plurality of photoelectric conversion units is arranged from an active region where the amplifying transistor is arranged;

a fifth semiconductor region of the second conduction type, which is arranged in the first semiconductor region along a side surface and a bottom surface of the element isolation region; and
a sixth semiconductor region of the second conduction type, which is arranged between source and drain regions of the amplifying transistor and the second semiconductor region, in a region below a gate electrode of the amplifying transistor,
wherein a contact for supplying a reference voltage to the sixth semiconductor region via the fifth semiconductor region is arranged in an active region where at least one of the plurality of photoelectric conversion units is arranged,
wherein the contact includes a plug for supplying the reference voltage, and a seventh semiconductor region of the second conduction type to which the plug is electrically connected, and
wherein an eighth semiconductor region of the second conduction type, which has an impurity concentration lower than that of the seventh semiconductor region, is arranged between the seventh semiconductor region and the third semiconductor region.
8. A photoelectric conversion apparatus according to claim 1, wherein the photoelectric conversion apparatus is incorporated in an imaging system that includes a signal processing circuit configured to process a signal from the photoelectric conversion apparatus.
9. The photoelectric conversion apparatus according to claim 7, wherein the fifth semiconductor region and the second semiconductor region are electrically connected to each other.
10. The photoelectric conversion apparatus according to claim 7, wherein the sixth semiconductor region and the eighth semiconductor region are formed in a same step.
11. The photoelectric conversion apparatus according to claim 7, wherein one contact is arranged for a plurality of unit cells.
12. The photoelectric conversion apparatus according to claim 7,
wherein primary color filters are arranged to correspond to respective photoelectric conversion units, and
wherein the contact is arranged in a photoelectric conversion unit on which a blue filter among the primary color filters is arranged.
13. A photoelectric conversion apparatus according to claim 7, wherein the photoelectric conversion apparatus is incorporated in an imaging system that includes a signal processing circuit configured to process a signal from the photoelectric conversion apparatus.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A package structure module with high density electrical connections, comprising:
a first structure;
a second structure having a height higher than that of the first structure, wherein the second structure has a plurality of second open grooves formed on a lateral wall thereof and close to the first structure; and
a plurality of conductive structures respectively traverse the second open grooves in order to make the conductive structures electrically connect between the first structure and the second structure.
2. The package structure module as claimed in claim 1, wherein the first structure has a plurality of first open grooves formed on a lateral wall thereof and respectively facing the second open grooves, and the conductive structures respectively traverse the first open grooves.
3. The package structure module as claimed in claim 1, wherein each second open groove has a depth of between 50 \u03bcm and 100 \u03bcm.
4. The package structure module as claimed in claim 2, wherein each first open groove has a depth of between 50 \u03bcm and 100 \u03bcm.
5. The package structure module as claimed in claim 1, wherein the first structure is a drive IC structure, and the second structure is an LED array structure.
6. The package structure module as claimed in claim 1, wherein the first structure is an LED array structure, and the second structure is a drive IC structure.
7. The package structure module as claimed in claim 1, further comprising a substrate having at least two inputoutput pads, wherein the first structure and the second structure are electrically disposed on the substrate.
8. The package structure module as claimed in claim 7, further comprising at least two conductive elements respectively connected between the first structure and one of the inputoutput pads and between the second structure and the other inputoutput pad.
9. The package structure module as claimed in claim 2, wherein the first structure has a plurality of pads formed on a top surface thereof and a plurality of first conductive traces, and the pads of the first structure correspond to the first open grooves and each first conductive trace is formed between each corresponding pad of the first structure and each corresponding first open groove; wherein the second structure has a plurality of pads formed on a top surface thereof and a plurality of second conductive traces, and the pads of the second structure correspond to the second open grooves and each second conductive trace is formed between each corresponding pad of the second structure and each corresponding second open groove.
10. The package structure module as claimed in claim 9, wherein each conductive structure is divided into three portions that are a first portion, a second portion and a third portion, and the second portion is electrically connected between the first portion and the third portion; wherein the first portion is formed on the corresponding pad of the first structure and the corresponding first conductive trace, the second portion traverses the corresponding first open groove and the corresponding second open groove in sequence and is formed on a lateral wall of the corresponding second open groove, and the third portion is formed on the corresponding second conductive trace in order to electrically connect with the corresponding pad of the second structure.
11. The package structure module as claimed in claim 9, wherein the second structure has an insulation layer formed on a top surface thereof in order to expose the pads and external sides of the second conductive traces.
12. The package structure module as claimed in claim 11, wherein each conductive structure is divided into a first portion and a second portion electrically connected to each other, the first portion is formed on the corresponding pad of the first structure and the corresponding first conductive trace, and the second portion traverses the corresponding first open groove and the corresponding second open groove in sequence and is formed on a lateral wall of the corresponding second open groove and the external side of the corresponding second conductive trace due to the obstruction of the insulation layer.
13. A method for packaging a package structure module with high density electrical connections, comprising:
providing a first structure and a second structure having a height higher than that of the first structure, wherein the first structure has a plurality of conductive materials formed on a top surface thereof, and the second structure has a plurality of second open grooves formed on a lateral wall thereof and close to the first structure;
electrically disposing the first structure and the second structure on a substrate;
slanting the substrate by a predetermined angle during a reflow process in order to make the conductive materials change into liquid conductive materials and make the liquid conductive materials traverse the second open grooves to flow to the second structure; and
cooling the liquid conductive materials to form a plurality of conductive structures electrically connected between the first structure and the second structure.
14. The method as claimed in claim 13, wherein the first structure has a plurality of first open grooves formed on a lateral wall thereof and respectively facing the second open grooves, and the liquid conductive materials respectively traverse the first open grooves.
15. The method as claimed in claim 13, wherein each second open groove has a depth of between 50 \u03bcm and 100 \u03bcm.
16. The method as claimed in claim 14, wherein each first open groove has a depth of between 50 \u03bcm and 100 \u03bcm.
17. The method as claimed in claim 14, wherein the first and the second open grooves are formed via etching.
18. The method as claimed in claim 13, wherein the first structure is a drive IC structure, and the second structure is an LED array structure.
19. The method as claimed in claim 13, wherein the substrate has at least two inputoutput pads, and at least two conductive elements are respectively connected between the first structure and one of the inputoutput pads and between the second structure and the other inputoutput pad.
20. The method as claimed in claim 14, wherein the first structure has a plurality of pads formed on a top surface thereof and a plurality of first conductive traces, and the pads of the first structure correspond to the first open grooves and each first conductive trace is formed between each corresponding pad of the first structure and each corresponding first open groove; wherein the second structure has a plurality of pads formed on a top surface thereof and a plurality of second conductive traces, and the pads of the second structure correspond to the second open grooves and each second conductive trace is formed between each corresponding pad of the second structure and each corresponding second open groove.
21. The method as claimed in claim 20, wherein each conductive structure is electrically connected between the corresponding pad of the first structure and the corresponding pad of the second structure.
22. The method as claimed in claim 20, wherein each conductive structure is divided into three portions that are a first portion, a second portion and a third portion, and the second portion is electrically connected between the first portion and the third portion; wherein the first portion is formed on the corresponding pad of the first structure and the corresponding first conductive trace, the second portion traverses the corresponding first open groove and the corresponding second open groove in sequence and is formed on a lateral wall of the corresponding second open groove, and the third portion is formed on the corresponding second conductive trace in order to electrically connect with the corresponding pad of the second structure.
23. The method as claimed in claim 20, wherein the second structure has an insulation layer formed on a top surface thereof in order to expose the pads and external sides of the second conductive traces.
24. The method as claimed in claim 23, wherein each conductive structure is divided into a first portion and a second portion electrically connected to each other, the first portion is formed on the corresponding pad of the first structure and the corresponding first conductive trace, and the second portion traverses the corresponding first open groove and the corresponding second open groove in sequence and is formed on a lateral wall of the corresponding second open groove and the external side of the corresponding second conductive trace due to the obstruction of the insulation layer.