All The Claims

1. A method for computing car switching solutions in a railway switch yard having a plurality of classification tracks, a switch and a switching queue containing a plurality of cars to be sequentially switched by the switch to respective ones of the classification tracks, said method comprising:
a) providing a data processing apparatus having an output, the data processing apparatus being programmed with software to compute car switching solutions;
b) iteratively computing with the software executed by the data processing apparatus a plurality of car switching solution for at least one car in the switching queue as the car progresses through the switching queue toward the switch, the computation of a car switching solution including a selection of a classification track among the plurality of the classification tracks in which the car is to be switched;
c) releasing at the output of the data processing apparatus data conveying at least one of the computed switching solutions.
2. A method for computing car switching solutions as defined in claim 1, including computing with the data processing apparatus an expected switch time for the at least one car, the expected switch time being indicative of an approximate time at which the at least one car is expected at the switch, the data processing apparatus using the computed expected switch time as a factor during the computation of at least one switching solution for the at least one car.
3. A method as defined in claim 1, wherein the at least one car belongs to a train block, the method including computing with the data processing apparatus available space in several classification tracks of the plurality of classification tracks to receive cars that belong to the train block.
4. A method as defined in claim 3, including computing at least one of the car switching solutions with the data processing apparatus by using the computed available space as a factor.
5. A method as defined in claim 3, wherein the data designating a classification track among the plurality of classification tracks for which the data processing apparatus has computed that available space exists to receive all the cars of the train block.
6. A method for computing railcar switching solutions as defined in claim 1, wherein the data is a first data and the at least one car belongs to a train block, the method including receiving at an input of the data processing apparatus second data indicative of an ETA at the railway switchyard of one or more cars of the train block, the method including processing the second data with the data processing apparatus under control of the software in computing one or more of the car switching solutions for the at least one car.
7. A method as defined in claim 1, wherein the at least one car belongs to a first train block, the method including computing with the data processing apparatus a car switching solution for the at feast one car that locates the at least one car in a classification track containing cars that belong to a second train block, wherein the first train block and the second train block belong to different departure trains.
8. A method as defined in claim 3, wherein the data processing apparatus includes an input, wherein the data is a first data and wherein the train block is a first train block, the method including:
a) providing at the input second data indicative of a pull time of a second train block in a first classification track of the plurality of classification tracks;
b) processing with the data processing apparatus under control of the software the second data to determine available space in the first classification track.
9. A method as defined in claim 8, wherein the pull time is indicative of a time at which the second train block is expected to vacate the first classification track.
10. A method as defined in claim 1, wherein the data processing apparatus includes an input, wherein the data is a first data and wherein the at least one car belongs to a first train block, the method including:
a) providing at the input second data indicative of an arrival profile of a second train block;
b) processing with the data processing apparatus under control of the software the second data to compute or more of the switching solutions of the at least one car.
11. A method as defined in claim 2, including re-computing with the data processing apparatus an expected switch time for the at least one car at each computation of a switching solution for the at least one car.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of providing a desired constant AC voltage to a variable load which is arranged remote of a voltage source, comprising the steps of:
compensating for a voltage drop over an electrical supply line which connects the load to the voltage source by a compensation AC voltage, the compensation AC voltage being added to the desired constant AC voltage to determine an output AC voltage of the voltage source;
connecting an ohmic load instead of the variable load via the supply line to the AC voltage source and measuring a total value of the output AC voltage |Ufull| provided by the voltage source, a total value of an AC voltage |Uload| drop over the ohmic load, and a total value of the alternating current |I| which is conducted at that same time;
determining a first constant CR from the measured values for the linear variation of the compensation AC voltage with the total value of the alternating current and cos(phi) from the measured values;
once the constant CR has been determined, connecting the variable load instead of the ohmic load via the supply line to the AC voltage source; and
varying the compensation AC voltage depending both on an absolute value of an alternating current conducted to the load and on a phase angle phi between the output AC voltage of the voltage source and the alternating current, wherein the step of varying the compensation AC voltage depending both on the absolute value of the alternating current conducted to the load and on the phase angle phi comprises the step of calculating the compensation AC voltage from two summands which are linearly dependent on the total value of the alternating current, and one of which additionally comprises the factor CR* cos(phi) and the other of which is additionally linearly dependent on sin(phi).
2. The method of claim 1, wherein the constant CR is determined as (|Ufull|\u2212|Uload|)|I|.
3. The method of claim 1, further comprising the steps of connecting a mixed ohmic and inductive load instead of the variable load via the supply line to the AC voltage source, measuring a total value of the output AC voltage |Ufull| provided by the voltage source, a total value of the AC voltage |Uload| dropping over the ohmic component of the mixed ohmic and inductive load, a total value of the current |I| conducted at the same time, and the phase angle phi, and determining a second constant CL for the linear variation of the compensation AC voltage with the total value of the alternating current and sin(phi) from the measured values.
4. The method of claim 1, further comprising the steps of:
supplying the output AC voltage to the variable load;
measuring a total value of the output AC voltage |Ufull| provided by the voltage source, a total value of the AC voltage |Uload| dropping over an ohmic component of the variable load, a total value of the current |I| conducted at the same time, and the phase angel phi; and
determining a second constant CL for the linear variation of the compensation AC voltage with the total value of the alternating current and sin(phi) from the measured values.
5. The method of claim 3, wherein the constant CL is determined as |Ufull|\u2212|Uload|\u2212CR* |I|* cos(phi)|I|* sin(phi).
6. The method of claim 3, wherein the constant CL is determined at a value of |Uload| which is equal to the desired constant AC voltage.
7. The method of claim 6, wherein the constant CR is determined at a value of |Uload| which is equal to the desired constant AC voltage.
8. The method of claim 6, wherein the constants CR and CL are at first approximated at a value of |Uload| which is equal to the desired constant AC voltage, and then a value of |Uload| which is equal to the desired constant AC voltage is approached with the approximated values of CR and CL.
9. A method of providing a desired constant AC voltage to a variable load which is arranged remote of a voltage source, comprising the steps of:
compensating for a voltage drop over an electrical supply line which connects the load to the voltage source by a compensation AC voltage, the compensation AC voltage being added to the desired constant AC voltage to determine an output AC voltage of the voltage source; and
varying the compensation AC voltage depending both on an absolute value of an alternating current conducted to the load and on a phase angle phi between the output AC voltage of the voltage source and the alternating current,
wherein the voltage source is a rotating frequency converter, and further comprising the step of varying an exciting power of a generator to achieve a variation of the compensation AC voltage.
10. The method of claim 1, wherein the voltage source is selected from a static frequency converter and an electronically controlled transformer, and further comprising the step of separately varying the compensation AC voltage for each phase of the output AC voltage of the voltage source.
11. A method of providing a desired constant AC voltage having a frequency at least 200 Hz to an airplane which is positioned on the ground remote of a voltage source and which is connected to the voltage source via a supply line, comprising the steps of:
connecting an ohmic load via the supply line to the AC voltage source, measuring a total value of the output AC voltage |Ufull| provided by the voltage source, a total value of an AC voltage |Uload| dropping over the ohmic load, and a total value of the alternating current |I| which is conducted at that same time;
determining a first constant CR as (|Ufull|\u2212|Uload|)|I|;
connecting a mixed ohmic and inductive load via the supply line to the AC voltage source, measuring a total value of the output AC voltage |Ufull| provided by the voltage source, a total value of the AC voltage |Uload| dropping over the ohmic load, a total value of the current |I| conducted at the same time, and the phase angle phi;
determining a second constant CL as |Ufull|\u2212|Uload|\u2212CR* |I|* cos(phi)|I|* sin(phi);
connecting the airplane via the supply line to the voltage source; and
repeatedly calculating a compensation AC voltage as |I|*CR*cos(phi)+ |I|*CL*sin(phi) and adding the compensation AC voltage to the desired constant AC voltage to determine an output AC voltage of the voltage source, |I| being the total value of the actual alternating current conducted from the voltage source to the airplane and phi being the actual phase angle between the output AC voltage of the voltage source and the alternating current conducted from the voltage source to the airplane.
12. The method of claim 11, further comprising the steps of:
connecting another airplane via the supply line to the voltage source;
repeatedly calculating a compensation AC voltage as |I|*CR*cos(phi)+|I|*CL*sin(phi) and adding the compensation AC voltage to the desired constant AC voltage to determine an output AC voltage of the voltage source, |I| being the total value of the actual alternating current conducted from the voltage source to the other airplane and phi being the actual phase angle between the output AC voltage of the voltage source and the alternating current conducted from the voltage source to the other airplane.
13. A system for providing a desired constant AC voltage to a variable load which is arranged remote of a voltage source, comprising:
means for compensating for a voltage drop over an electrical supply line which connects the load to the voltage source by a compensation AC voltage, the compensation AC voltage being added to the desired constant AC voltage to determine an output AC voltage of the voltage source;
means for measuring, once an ohmic load is connected instead of the variable load via the supply line to the AC voltage source, a total value of the output AC voltage |Ufull| provided by the voltage source, a total value of an AC voltage |Uload| drop over the ohmic load, and a total value of the alternating current |I| which is conducted at that same time;
means for determining a first constant CR from the measured values for the linear variation of the compensation AC voltage with the total value of the alternating current and cos(phi) from the measured values;
means for varying, once the variable load is connected instead of the ohmic load via the supply line to the AC voltage source, the compensation AC voltage depending both on an absolute value of an alternating current conducted to the load and on a phase angle phi between the output AC voltage of the voltage source and the alternating current, wherein the means for varying the compensation AC voltage depending both on the absolute value of the alternating current conducted to the load and on the phase angle phi comprises means for calculating the compensation AC voltage from two summands which are linearly dependent on the total value of the alternating current, and one of which is additionally comprises the factor CR* cos(phi) and the other of which is additionally linearly dependent on sin(phi).
14. The system of claim 13, wherein the constant CR is determined as (|Ufull|\u2212|Uload|)|I|.
15. The system of claim 13, further comprising means for connecting a mixed ohmic and inductive load instead of the variable load via the supply line to the AC voltage source, means for measuring a total value of the output AC voltage |Ufull| provided by the voltage source, a total value of the AC voltage | Uload| dropping over the ohmic component of the mixed ohmic and inductive load, a total value of the current |I| conducted at the same time, and the phase angle phi, and means for determining a second constant CL for the linear variation of the compensation AC voltage with the total value of the alternating current and sin(phi) from the measured values.
16. The system of claim 13, further comprising means for measuring a total value of the output AC voltage |Ufull| provided by the voltage source to the variable load, a total value of the AC voltage |Uload| dropping over an ohmic component of the variable load, a total value of the current |I| conducted at the same time, and the phase angel phi, and means for determining a second constant CL for the linear variation of the compensation AC voltage with a total value of the alternating current and sin(phi) from the measured values.
17. The system of claim 15, wherein the constant CL is determined as |Ufull|\u2212|Uload|\u2212CR* |I|* cos(phi)|I|* sin(phi).
18. The system of claim 15, wherein the constant CL is determined at a value of |Uload| which is equal to the desired constant AC voltage.
19. The system of claim 18, wherein the constant CR is determined at a value of |Uload| which is equal to the desired constant AC voltage.
20. The system of claim 18, wherein the constants CR and CL are at first approximated at a value of |Ufull| which is equal to the desired constant AC voltage, and then a value of |Uload| which is equal to the desired constant AC voltage is approached with the approximated values of CR and CL.
21. The method of claim 4, wherein the constant CL is determined as |Ufull|\u2212|Uload|\u2212CR*|I|* cos(phi)|I|* sin(phi).
22. The system of claim 16, wherein the constant CL is determined as |Ufull|\u2212|Uload|\u2212CR*|I|* cos(phi)|I|* sin(phi).

1. A computer program product tangibly embodied in a non-transitory computer-readable storage medium, the computer program product including instructions that, when executed, cause a processor to perform operations comprising:
receiving transaction information and item data from a buyer;
generating a bid invitation containing entries relating to the transaction information and item data, and making the bid invitation available to a plurality of potential bidders;
receiving, from one or more of the potential bidders, bid responses containing a complex pricing structure and corresponding complex pricing amounts, wherein the complex pricing structure is selected by the potential bidders from among a group of multiple pricing structures made available to the potential bidders, and
wherein the complex pricing structure is selected and supplied by each potential bidder, and the complex pricing structures supplied by two or more potential bidders include bids with multiple different pricing amounts, and each bidder provides multiple different proposals with each proposal including a set of terms governing the proposal and a set of prices for the proposal; and
selecting a winning bidder based at least in part on the complex pricing amounts.
2. The computer program product of claim 1, wherein a complex pricing structure from a first bidder is made available for review by other potential bidders.
3. The computer program product of claim 2, wherein complex pricing amounts from a first bidder are made available for review by other potential bidders.
4. The computer program product of claim 1, wherein the instructions, when executed, cause the processor to perform operations further comprising generating a summary of pricing terms from bids received from among the plurality of potential bidders.
5. The computer program product of claim 4, wherein the instructions, when executed, cause the processor to perform operations further comprising scoring the bids according to a predetermined scoring standard.
6. The computer program product of claim 5, wherein the instructions, when executed, cause the processor to perform operations further comprising selecting the highest scoring bidder as a winning bidder.
7. The computer program product of claim 1, wherein the instructions, when executed, cause the processor to perform operations further comprising forming a contract including pricing information related to pricing structure and pricing amounts submitted by a winning bidder.
8. The computer program product of claim 1, wherein the complex pricing structure comprises location-specific pricing information.
9. The computer program product of claim 1, wherein the complex pricing structure comprises date-based pricing information.
10. The computer program product of claim 1, wherein the bid response from a first bidder of the plurality of bidders contains multiple bid prices for a particular item, with each bid price being associated with different terms identified and specified by the bidder.
11. The computer program product of claim 10, wherein the instructions, when executed, cause the processor to perform operations further comprising providing the different bid terms from the first bidder, but not the bid prices, to the plurality of bidders other than the first bidder, and seeking bid prices from the plurality of bidders other than the first bidder for the different bid terms.
12. The computer program product of claim 10, wherein the different terms and the bid prices correspond to geographic location-specific information.
13. The computer program product of claim 1, wherein the multiple different pricing amounts comprise multiple prices from a particular bidder for a particular bid item.
14. The computer program product of claim 1, wherein the instructions, when executed, cause the processor to perform operations further comprising aggregating bids received from the plurality of bidders when a bidding period has ended.
15. The computer program product of claim 14, wherein the instructions, when executed, cause the processor to perform operations further comprising normalizing prices of the aggregated bids to permit comparison among differing bids.
16. A system for selecting a winning bidder, the system comprising:
a computer system;
a bid invitation generator implemented by the computer system and configured to generate a bid invitation containing entries relating to transaction information and item data received from a buyer, and to make the bid invitation available to a plurality of potential bidders;
an interface for the computer system configured to receive, from one or more of the potential bidders, bid responses containing a complex pricing structure and corresponding complex pricing amounts, wherein the complex pricing structure is selected by the potential bidders from among a group of multiple pricing structures made available to the potential bidders, and wherein the complex pricing structure is selected and supplied by each potential bidder, and the complex pricing structures supplied by two or more potential bidders include bids with multiple different pricing amounts, and each bidder provides multiple different proposals with each proposal including a set of terms governing the proposal and a set of prices for the proposal; and
a bid aggregator implemented by the computer system and configured to select a winning bidder based at least in part on the complex pricing amounts.
17. The system of claim 16, wherein the bid aggregator is further configured to aggregate bids received from the plurality of bidders when a bidding period has ended.
18. The system of claim 17, wherein the bid aggregator is further configured to normalize prices of the aggregated bids to permit comparison among differing bids.
19. The system of claim 16, wherein the bid aggregator is further configured to score the bids according to a predetermined scoring standard, wherein the bid aggregator selects the highest scoring bidder as a winning bidder.
20. The system of claim 16, further comprising a contract engine of the computer system that is configured to form a contract including pricing information related to pricing structure and pricing amounts submitted by a winning bidder.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A light-emitting diode device, comprising:
a light-emitting diode (LED) chip comprising a sapphire substrate, a first-type semiconductor layer disposed on the substrate, a second-type semiconductor layer disposed on the first-type semiconductor layer, a first via hole passing through the sapphire substrate and the first-type semiconductor layer, a second via hole passing through the sapphire substrate, and an insulation layer coated on an inner wall of the first via hole;
a transparent conductive layer made of electrically conductive material and formed on the second-type semiconductor layer;
a cover layer formed on the transparent conductive layer;
electrical conductors, each disposed within one of the via holes, wherein the electrical conductor in the first via hole is electrically connected to the second-type semiconductor layer and the electrical conductor in the second via hole is electrically connected to the first-type semiconductor layer; and
two linkers adapted for connection to external circuitry, formed on a surface of the sapphire substrate opposite to the surface on which the first-type and second-type semiconductor layers are disposed.
2. The light-emitting diode device according to claim 1, wherein each of the linkers is electrically connected to a corresponding one of the electrical conductors and comprises a first conductive layer disposed on the sapphire substrate and electrically connected to the electrical conductor corresponding thereto, a reflective conductive layer formed on the first conductive layer, a second conductive layer formed on the reflective layer, and a third conductive layer formed on the second conductive layer.
3. The light-emitting diode device according to claim 2, wherein the first conductive layer is made of indium tin oxide (ITO), the reflective layer is made of any suitable conductive material, the second conductive layer is a nickelgold layer, and the third conductive layer is configured in the form of a bump.
4. The light-emitting diode device according to claim 1, wherein the transparent conductive layer is made of conductive ITO.
5. The light-emitting diode device according to claim 1, further comprising a laminated transparent light guide layer formed atop the cover layer and adapted to direct light towards a single direction, so that the light emitted the LED device is concentrated to increase brightness.
6. The light-emitting diode device according to claim 5, wherein the laminated transparent light guide layer includes a plurality of sub-layers having refractive indexes of 2.22.32.3\u02dc2.42.2\u02dc2.32.3\u02dc2.4, respectively, and wherein the laminated transparent light guide layer has an overall refractive index close to the refractive indexes 2.4\u02dc2.5 of gallium nitride (GaN) or gallium arsenide (GaAs) and is adapted for directing blue light towards a single direction and avoiding multiple reflection of light.
7. The light-emitting diode device according to claim 1, wherein the first-type and second-type semiconductor layers, and the surface of the first-type and second-type sapphire substrate opposite to the surface on which the semiconductor layers are disposed, have edges configured into diamond light-guide edges, thereby increasing light emission by more than 20%.
8. The light-emitting diode device according to claim 1, wherein the first via hole further passes through the second-type semiconductor layer, so that the electrical conductor in the first via hole is electrically connected to the transparent conductive layer disposed on the second-type semiconductor layer.
9. A method for producing a light-emitting diode device, comprising the steps of:
providing a light-emitting diode (LED) wafer, the LED wafer comprising a plurality of adjacent LED chips, each being separate from an adjacent one of the LED chips by a dicing line and comprising a sapphire substrate, a first-type semiconductor layer disposed on the substrate, and a second-type semiconductor layer disposed on the first-type semiconductor layer;
forming a first via hole passing through the sapphire substrate and the first-type semiconductor layer, and a second via hole passing through the sapphire substrate;
coating an insulation layer on an inner wall of the first via hole;
forming an electrical conductor within the first and second via holes, respectively, so that the electrical conductor in the via first hole is electrically connected to the second-type semiconductor layer and the electrical conductor in the second via hole is electrically connected to the first-type semiconductor layer;
forming a transparent conductive layer on the second-type semiconductor layer;
forming a cover layer on the transparent conductive layer; and
forming a laminated light guide layer on the cover layer.
10. A light-emitting diode device, comprising:
a first light-emitting diode (LED) chip comprising a sapphire substrate, a first-type semiconductor layer disposed on the substrate, a second-type semiconductor layer disposed on the first-type semiconductor layer, a first via hole passing through the sapphire substrate and the first-type semiconductor layer, a second via hole passing through the sapphire substrate, an insulation layer coated on an inner wall of the first via hole, a transparent conductive layer made of electrically conductive material and formed on the second-type semiconductor layer, a cover layer formed on the transparent conductive layer, three conductive islands formed on the cover layer and electrically insulated from one another, a communication hole connecting the conductive layer to a corresponding one of the conductive islands, a through hole connecting the first-type semiconductor layer to a corresponding one of the conductive island, and an insulation layer coated on inner walls of the communication hole and the through hole, wherein the communication hole and the through hole are filled with conductive material, so that one of the three conductive island is electrically connected to the conductive layer and another one of the three conductive island is electrically connected to the first-type semiconductor layer of the first LED chip;
a second LED chip flip-chip mounted on the cover layer of the first LED chip, so that the second-type semiconductor layer of the second LED chip is electrically connected to the conductive island to which the conductive layer of the first LED chip is electrically connected, and that the first-type semiconductor layer of the second LED chip is electrically connected to one of the three conductive islands which is not electrically connected to either the conductive layer of the first LED chip or the first-type semiconductor layer of the first LED chip; and
a third LED chip flip-chip mounted on the cover layer of the first LED chip, so that the second-type semiconductor layer of the third LED chip is electrically connected to the conductive island to which the first-type semiconductor layer of the second LED chip is electrically connected, and that the first-type semiconductor layer of the third LED chip is electrically connected to the conductive island to which the first-type semiconductor layer of the first LED chip is electrically connected;
wherein the LED chips are each adapted to emit a different color of light upon being energized, so that the LED device is capable of providing a desired color of light upon combining the different colors of light emitted from the LED chips.
11. A light-emitting diode device, comprising:
a substrate, which is a transparent substrate and has a first mounting surface and a second mounting surface opposite to the first mounting surface, wherein a plurality of transparent conductive traces are formed on the first mounting surface and some of the conductive traces extend from the first mounting surface to the second mounting surface;
a first LED chip mounted on the substrate, comprising a sapphire substrate disposed on the first mounting surface of the substrate, a first-type semiconductor layer disposed on the sapphire substrate, a second-type semiconductor layer disposed on the first-type semiconductor layer, and first-type and second-type electrodes electrically connected to the first-type semiconductor layer and the second-type semiconductor layer, respectively, and adapted for electrical connection to external circuitry;
a second LED chip having a configuration identical to the first LED chip and flip-chip mounted on the first mounting surface of the substrate, so that the second-type electrode of the second LED chip is electrically connected to one of the conductive traces extending from the first mounting surface to the second mounting surface, and that the first-type electrode of the second LED chip is electrically connected to one of the conductive traces which does not extend to the second mounting surface;
a third LED chip having a configuration identical to the first LED chip and flip-chip mounted on the first mounting surface of the substrate, so that the second-type electrode of the third LED chip is electrically connected to the conductive trace to which the first-type electrode of the second LED chip is electrically connected, and that the first-type electrode of the third LED chip is electrically connected to another one of the conductive traces extending from the first mounting surface to the second mounting surface; and
a plurality of conductive pads for electrical connection to external circuitry, formed on the first-type and second-type electrodes of the first LED chip and on the extension portions of the conductive traces which extend on the second mounting surface, respectively.
12. A light-emitting diode device, comprising:
a first LED chip comprising a sapphire substrate, a first-type semiconductor layer disposed on the sapphire substrate, a second-type semiconductor layer disposed on the first-type semiconductor layer, and first-type and second-type electrodes electrically connected to the first-type semiconductor layer and the second-type semiconductor layer, respectively, and adapted for electrical connection to external circuitry, wherein the first LED chip is formed with two through holes passing through the substrate and the semiconductor layers, and the through holes are coated on their inner walls with an insulation layer, and wherein a plurality of transparent conductive traces are formed on a surface of the substrate opposite to the surface on which the semiconductor layers are disposed, and some of the conductive traces extend through the through holes and protrude out from the first LED chip;
a second LED chip having a configuration identical to the first LED chip and flip-chip mounted on the surface of the substrate of the first LED chip on which the conductive traces are mounted, so that the second-type electrode of the second LED chip is electrically connected to one of the conductive traces extending through the through holes, and that the first-type electrode of the second LED chip is electrically connected to one of the conductive trace which does not extend into anyone of the through holes;
a third LED chip having a configuration identical to the first LED chip and flip-chip mounted on the surface of the substrate of the first LED chip on which the conductive traces are mounted, so that the second-type electrode of the third LED chip is electrically connected to the conductive traces to which the first-type electrode of the second LED chip is electrically connected, and that the first-type electrode of the third LED chip is electrically connected to the other one of the conductive traces extending through the through holes; and
a plurality of conductive pads for electrical connection to external circuitry, formed on the first-type and second-type electrodes of the first LED chip and on the protruded portions of the conductive traces which extend through the through holes and protrude out from the first LED chip, respectively.
13. A light-emitting diode device, comprising:
a first LED chip comprising a sapphire substrate, a first-type semiconductor layer disposed on the sapphire substrate, a second-type semiconductor layer disposed on the first-type semiconductor layer, first-type and second-type electrodes adapted for electrical connection to external circuitry, and two through holes pas sing through the sapphire substrate, the first-type semiconductor layer and the second-type semiconductor layer, wherein the through holes are coated on their inner walls with an insulation layer;
a second LED chip comprising a sapphire substrate disposed on a surface of the sapphire substrate of the first LED chip opposite to the surface on which the first-type semiconductor layer of the first LED chip is disposed, a first-type semiconductor layer disposed on the sapphire substrate, and a second-type semiconductor layer disposed on the first-type semiconductor layer, wherein the first-type semiconductor layer and the second-type semiconductor layer are formed with a first-type electrode and a second-type electrode, respectively;
a third LED chip mounted alongside the second LED chip on the surface of the sapphire substrate of the first LED chip opposite to the surface on which the first-type semiconductor layer of the first LED chip is disposed, the third LED chip comprising a sapphire substrate disposed on the substrate of the first LED chip, a first-type semiconductor layer disposed on the sapphire substrate, and a second-type semiconductor layer disposed on the first-type semiconductor layer, wherein the first-type semiconductor layer and the second-type semiconductor layer are formed with a first-type electrode and a second-type electrode, respectively;
a plurality of conductors, wherein one of the conductors extends from the first-type electrode of the second LED chip through one of the through holes and further protrudes out from the first LED chip, another one of the conductors extends from the second-type electrode of the third LED chip through the other one of the through holes and further protrudes out from the first LED chip, and a still another one of the conductors extends from the second-type electrode of the second LED chip to the first-type electrode of the third LED chip; and
a plurality of conductive pads for electrical connection to external circuitry, formed on the first-type and second-type electrodes of the first LED chip and on the protruded portions of the conductors which extend through the through holes and protrude out from the first LED chip, respectively.
14. A light-emitting diode device, comprising:
a first mounting substrate including a first surface and a plurality of predetermined circuit traces overlaid on the first surface;
a first LED chip comprising a sapphire substrate, a first-type semiconductor layer disposed on the sapphire substrate, a second-type semiconductor layer disposed on the first-type semiconductor layer, and first-type and second-type electrodes adapted for electrical connection to external circuitry, wherein each of the electrodes is formed with a conductive pad and the first LED chip is flip-chip mounted on the first mounting substrate by electrically connecting the conductive pads to the corresponding circuit traces overlaid on the first mounting substrate;
a second LED chip comprising a sapphire substrate disposed on a surface of the sapphire substrate of the first LED chip opposite to the surface on which the first-type semiconductor layer of the first LED chip is disposed, a first-type semiconductor layer disposed on the sapphire substrate, and a second-type semiconductor layer disposed on the first-type semiconductor layer, wherein the first-type semiconductor layer and the second-type semiconductor layer are formed with a first-type electrode and a second-type electrode, respectively;
a third LED chip mounted alongside the second LED chip on the surface of the sapphire substrate of the first LED chip opposite to the surface on which the first-type semiconductor layer of the first LED chip is disposed, the third LED chip comprising a sapphire substrate disposed on the substrate of the first LED chip, a first-type semiconductor layer disposed on the sapphire substrate, and a second-type semiconductor layer disposed on the first-type semiconductor layer, wherein the first-type semiconductor layer and the second-type semiconductor layer are formed with a first-type electrode and a second-type electrode, respectively; and
a second mounting substrate, comprising a first surface and a plurality of predetermined circuit traces overlaid on the first surface, the first surface of the second mounting substrate being oppositely mounted with respect to the first surface of the first mounting substrate, so that the first-type electrode of the second LED chip is electrically connected to one of the predetermined circuit traces of the second mounting substrate via a conductive pad, the second-type electrode of the second LED chip and the first-type electrode of the third LED chip is electrically connected to one of the predetermined circuit traces of the second mounting substrate via conductive pads, respectively, and the second-type electrode of the third LED chip is electrically connected to one of the predetermined circuit traces of the second mounting substrate via a conductive pad;
wherein at least one of the circuit traces of the first mounting substrate is electrically connected to a corresponding one of the circuit traces of the second mounting substrate via a conductive pad.
15. A light-emitting diode device, comprising:
a mounting substrate comprising a mounting surface, a recess portion, and a plurality of circuit traces overlaid on the mounting surface and on a bottom surface of the recess portion;
a first LED chip mounted on the substrate, comprising a sapphire substrate, a first-type semiconductor layer disposed on the sapphire substrate, a second-type semiconductor layer disposed on the first-type semiconductor layer, and first-type and second-type electrodes electrically connected to the first-type semiconductor layer and the second-type semiconductor layer, respectively, and adapted for electrical connection to external circuitry, wherein the first LED chip is flip-chip mounted on the mounting surface of the substrate via conductive pads;
a second LED chip flip-chip mounted on the bottom surface of the recess portion of the substrate via conductive pads; and
a third LED chip flip-chip mounted on the bottom surface of the recess portion of the substrate via conductive pads, so that the second-type electrode of the third LED chip is electrically connected to the first-type electrode of the second LED chip.
16. A light-emitting diode device, comprising:
a mounting substrate comprising a mounting surface and a plurality of predetermined circuit traces overlaid on the mounting surface;
a first LED chip flip-chip mounted on the mounting surface of the substrate via conductive pads;
a second LED chip mounted on a surface of the substrate of the first LED chip opposite to the surface on which semiconductor layers are disposed;
a third LED chip mounted alongside the second LED chip on a surface of the substrate of the first LED chip opposite to the surface on which the semiconductor layers are disposed; and
wherein the first-type electrode of the second LED chip and the second-type electrode of the third LED chip are electrically connected to the circuit traces corresponding thereto via separate conductive wires, and the second-type electrode of the second LED chip is electrically connected to the first-type electrode of the third LED chip via a conductive wire.