All The Claims

1. An error correction device of an optical disk reproduction unit for reproducing recorded information from an optical disk recorded with a code row data added with an error code in the same direction as a sequence of recorded information in a recording portion of the optical disk and with recorded guide information recorded in advance in an inerasable state before the code row data is recorded as a recorded guide for recording said code row data in said optical disk, comprising:
a first position detection portion configured to detect a physical configurational singular point in said recorded guide information as a first position;
a second position generating portion configured to generate a second position replacing said first position detected by said first position detection portion with said code row data position; and
an error correction portion configured to erasure-correct said code row data error by using said second position.
2. The error correction device of the optical disk unit according to claim 1, wherein said optical disk is a recordable digital versatile disk including DVD-R and DVD-RW, and said first position is a prepit recorded in advance as recorded guide information in said digital versatile disk.
3. The error correction device of the optical disk unit according to claim 1, wherein said first position is said physical configurational singular point artificially formed for said recording portion of said optical disk, and a position of said physical configurational singular point is detected as said first position when said recorded information is reproduced from said optical disk, and said second position is generated by the relative positional relationship between said physical configurational singular point and said code row data.
4. The error correction device of the optical disk unit according to claim 3, wherein said optical disk is a recordable digital versatile disk including DVD-R and DVD-RW, and said first position is a prepit recorded in advance as recorded guide information in said digital versatile disk.
5. The error correction device of the optical disk unit according to claim 1, wherein the positional relationship between said physical configurational singular point artificially formed for said recording portion of said optical disk and said code row data obtained by reproducing said optical disk is detected, and based on this detection result, said second position is decided.
6. The error correction device of the optical disk unit according to claim 5, wherein said optical disk is a recordable digital versatile disk including DVD-R and DVD-RW, and said first position is a prepit recorded in advance as recorded guide information in said digital versatile disk.
7. The error correction device of the optical disk unit according to claim 1, wherein, when said first position is located between said code row data and a code row data in its vicinity, said second position comprises said second position information generating portion taken as a position including even the code row data in front and in rear replacing said first position with the position of said code row data.
8. The error correction device of the optical disk unit according to claim 7, wherein said optical disk is a recordable digital versatile disk including DVD-R and DVD-RW, and said first position is a prepit recorded in advance as recorded guide information in said digital versatile disk.
9. An error correction device of an optical disk reproduction unit for reproducing recorded information from an optical disk recorded with a first code row data added with an error code in the same direction as a sequence of recorded information in a recording portion of the optical disk and with recorded guide information recorded in advance in an inerasable state before said first code row is recorded as a recorded guide for recording said first code row data in said optical disk, comprising:
a first position detection portion configured to detect a physical configurational singular point in said recorded guide information as a first position;
a second position generating portion configured to generate a second position replacing said first position detected by said first position detection portion with said first code row data position;
an error detection portion configured to detect a data error of said second position; and
an error measurement portion configured to measure the number of errors detected by said error detection portion,
wherein, when the number of errors measured for a predetermined period by said error measurement portion satisfies a predetermined value, errors of said first code row data are erasure-corrected by using said second position.
10. The error correction device according to claim 9, wherein said optical disk is DVD-R and DVD-RW disks, and based on whether or not said first detection portion detects a prepit, said second position is generated.
11. The error correction device according to claim 10, wherein said first detection portion has means for recognizing a bit pattern of the prepit, and said second position generating portion takes a first predetermined position (J) and a second predetermined position (K) as second positions (where, J<K) in case the bit pattern of the prepit detected by said first detection portion is a prepit sync, and takes a second predetermined position (K) as a second position in case the bit pattern of said prepit is a prepit data 1.
12. The error correction device according to claim 10, wherein said first detection portion has means for recognizing the bit pattern of the prepit and means for recognizing in which frame of an even number sync frame and an odd number sync frame of said first code row data, the prepit detected by said first detection portion exists,
wherein said second position generating portion takes a first predetermined position (J) and a second prepit position (K) as second positions in case the prepit detected by said first detection portion exists in the even number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit sync,
wherein said second position generating portion takes a second predetermined position (K) as a second position in case the prepit detected by said first detection portion exists in the even number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit data 1,
wherein said second position generating portion takes a third predetermined position (L) as a second position in case the prepit detected by said first detection portion exists in the odd number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit sync, and
wherein said second position generating portion takes a fourth predetermined position (M) as a second position (where, J<K<L<M) in case the prepit detected by said first detection portion exists in the odd number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit data 1.
13. The error correction device according to claim 9, wherein the error detection portion for detecting the error of said second position data detects the error position from said first code row data.
14. The error correction device according to claim 13, wherein said optical disk is DVD-R and DVD-RW disks, and said second position is generated based on the information as to whether or not said first detection portion detects the prepit.
15. The error correction device according to claim 14, wherein said first detection portion has means for recognizing the bit pattern of the prepit, and
wherein said second position generating portion takes a first predetermined position (J) and a second predetermined position (K) as second positions (where, J<K) in case the bit pattern of the prepit detected by said first detection portion is a prepit sync, and takes a second predetermined position (K) as a second position in case the bit pattern of said prepit is a pit data 1.
16. The error correction device according to claim 14, wherein said first detection portion has means for recognizing the bit pattern of the prepit and means for recognizing in which frame of the even number sync frame and the odd number sync frame of said first code row data, the prepit detected by said first detection portion exists,
wherein said second position generating portion takes a first predetermined position (J) and a second prepit position (K) as second positions in case the prepit detected by said first detection portion exists in the even number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit sync,
wherein said second position generating portion takes a second predetermined position (K) as a second position in case the prepit detected by said first detection portion exists in the even number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit data 1,
wherein said second position generating portion takes a third predetermined position (L) as a second position in case the prepit detected by said first detection portion exists in the odd number sync fame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit sync, and
wherein said second position generating portion takes a fourth predetermined position (M) as a second position (where, J<K<L<M) in case the prepit detected by said first detection portion exists in the odd number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit data 1.
17. The error correction device according to claim 9, wherein the error detection portion for detecting the error of said second position detects the error position from the second code row data added with an error code in a direction different from said first code row.
18. The error correction device according to claim 17, wherein said optical disk is DVD-R and DVD-RW disks, and based on whether or not said first detection portion detects a prepit, said second position is generated.
19. The error correction device according to claim 18, wherein said first detection portion has means for recognizing the bit pattern of the prepit, and
wherein said second generating portion takes a first predetermined position (J) and a second predetermined position (K) as second positions (where, J<K) in case the bit pattern of the prepit detected by said first detection portion is a prepit sync, and takes a second predetermined position (K) as a second position in case the bit pattern of said prepit is a prepit data 1.
20. The error correction device according to claim 19, wherein said first detection portion has means for recognizing in which frame of the even number sync frame and the odd number sync frame of said first code row data, the prepit detected by said first detection portion exists,
wherein said second position generating portion takes a first predetermined position (J) and a second prepit position (K) as second positions in case the prepit detected by said first detection portion exists in the even number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit sync,
wherein said second position generating portion takes a second predetermined position (K) as a second position in case the prepit detected by said first detection portion exists in the even number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit data 1,
wherein said second position generating portion takes a third predetermined position (L) as a second position in case the prepit detected by said first detection portion exists in the odd sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit sync, and
wherein said second position generating portion takes a fourth predetermined position (M) as a second position (where, J<K<L<M) in case the prepit detected by said first detection portion exists in the odd number sync frame of said first code row data, and moreover, the bit pattern of the prepit detected by said first detection portion is a prepit data 1.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An antenna comprising:
an array of radiating elements, each radiating element comprising:
a pair of conductive fingers each having first and second portions separated by a slot, the first portion being a dipole arm, the conductive fingers separated by a tapered notch having a width at a first end less than a width of a second end;
a balun proximate the first end; and
wherein, for each conductive finger, the first portion of the conductive finger is capacitively coupled to the second portion of the conductive finger by one or more capacitive elements, each capacitive element selected from the group consisting of:
a capacitor;
a varactor diode; and
conductive material disposed on a dielectric layer, the dielectric layer coupled to the array of radiating elements;

a support structure coupled to the array of radiating elements; and
a plurality of signal conduits coupled to respective ones of the radiating elements.
2. The antenna of claim 1, wherein:
the antenna is operable to receive a plurality of signals each having a respective wavelength, the reception of each signal having a return loss value less than \u221210 dB, the plurality of signals comprising a minimum wavelength;
a maximum length of the radiating element is at most approximately two times the minimum wavelength; and
a maximum width of the radiating element is at most approximately 0.58 times the minimum wavelength.
3. The antenna of claim 1, wherein the antenna is operable to receive and transmit a plurality of signals each having a frequency, the plurality of signals comprising a maximum frequency and a minimum frequency, the reception and transmission of each signal having a return loss less than \u221210 db; and
wherein the minimum frequency is less than approximately one tenth the maximum frequency.
4. The antenna of claim 1, wherein dielectric material is disposed within the slot.
5. A method of forming a radiating element comprising:
forming a pair of conductive fingers each having first and second portions, the first portion being a dipole arm, the conductive fingers separated by a tapered notch having a width at a first end less than a width of a second end; and
for each conductive finger, capacitively coupling the first portion of the conductive finger to the second portion of the conductive finger by one or more capacitive elements, each capacitive element selected from the group consisting of:
a capacitor;
a varactor diode; and
conductive material disposed on a dielectric layer coupled to the first and second portions.
6. The method of claim 5 further comprising forming a slot within each conductive finger that separates the first portion from the second portion.
7. The method of claim 6, wherein the slot has a profile approximately parallel to a tapered profile of the tapered notch.
8. The method of claim 6, wherein the slot has a sufficiently narrow width to capacitively couple the first portion of the conductive finger to the second portion of the conductive finger.
9. The method of claim 5, wherein forming a pair of conductive fingers having first and second portions comprises machining a solid, conductive plate.
10. The method of claim 5, wherein forming a pair of conductive fingers having first and second portions comprises selectively removing portions of a conductive layer using a photolithographic technique.
11. The method of claim 5 further comprising:
receiving a plurality of signals each having a respective wavelength, the reception of each signal having a return loss value less than \u221210 dB, the plurality of signals comprising a minimum wavelength;
wherein a maximum length of the radiating element is at most approximately two times the minimum wavelength; and
wherein a maximum width of the radiating element is at most approximately 0.58 times the minimum wavelength.
12. The method of claim 5 further comprising:
receiving and transmitting a plurality of signals each having a frequency, the plurality of signals comprising a maximum frequency and a minimum frequency, the transmission and reception of each signal having a return loss less than \u221210 db; and
wherein the minimum frequency is less than approximately one tenth the maximum frequency.
13. The method of claim 5, further comprising controlling a frequency resonance of the pair of conductive fingers at least in part using the one or more capacitive elements.
14. The method of claim 13, wherein the controlled frequency resonance is less than approximately one tenth of a maximum frequency resonance of the pair of conductive fingers.
15. The method of claim 5, wherein the slot has a profile approximately coplanar with a tapered profile of the tapered notch.
16. The method of claim 5, wherein each capacitive element is disposed outwardly from the first and second portions of the conductive finger.
17. A radiating element comprising:
a pair of conductive fingers having first and second portions, the first portion being a dipole arm, the conductive fingers separated by a tapered notch having a width at a first end less than a width of a second end;
a balun proximate the first end; and
wherein, for each conductive finger, the first portion of the conductive finger is capacitively coupled to the second portion of the conductive finger by one or more capacitive elements, each capacitive element selected from the group consisting of:
a capacitor;
a varactor diode; and
conductive material disposed on a dielectric layer coupled to the first and second portions.
18. The radiating element of claim 17, wherein the first portion of the conductive finger and the second portion of the conductive finger are separated by a slot.
19. The radiating element of claim 18, wherein the slot has a profile approximately parallel to a tapered profile of the tapered notch.
20. The radiating element of claim 18, wherein the slot has a sufficiently narrow width to capacitively couple the first portion of the conductive finger to the second portion of the conductive finger.
21. The radiating element of claim 17, wherein the one or more capacitive elements are disposed outwardly from the first and second portions of the conductive finger.
22. The radiating element of claim 17, wherein:
the radiating element is operable to receive a plurality of signals each having a respective wavelength, the reception of each signal having a return loss value less than \u221210 dB, the plurality of signals comprising a minimum wavelength;
a maximum length of the radiating element is at most approximately two times the minimum wavelength; and
a maximum width of the radiating element is at most approximately 0.58 times the minimum wavelength.
23. The radiating element of claim 17, wherein:
the radiating element is operable to receive and transmit a plurality of signals each having a frequency, the plurality of signals comprising a maximum frequency and a minimum frequency, the reception and transmission of each signal having a return loss less than \u221210 db; and
wherein the minimum frequency is less than approximately one tenth the maximum frequency.

1. A welding power supply, comprising:
power conversion circuitry comprising one or more power semiconductor switches, wherein the power conversion circuitry is configured to receive power from a primary source and to switch the one or more power semiconductor switches between an ON configuration and an OFF configuration to convert the received power to a welding output; and
a pulse width modulated (PWM) digital controller coupled to the power conversion circuitry and configured to receive one or more analog signals, to generate an error signal indicative of a steady state error between a commanded current level and an actual output current level based at least in part on the one or more analog signals, and to calculate a duty cycle term for control of switching of the one or more semiconductor switches based at least in part on the generated error signal.
2. The welding power supply of claim 1, wherein the duty cycle term is calculated by computing an integral term configured to correct for the steady state error between the commanded current level and the actual output current level.
3. The welding power supply of claim 2, wherein the PWM digital controller is configured to selectively implement the integral term based at least in part on the error signal.
4. The welding power supply of claim 2, wherein the PWM digital controller is configured to selectively implement the integral term for certain time periods.
5. The welding power supply of claim 2, wherein the PWM digital controller is configured to reset the integral term during certain operating conditions.
6. The welding power supply of claim 1, wherein the PWM controller is configured to limit the duty cycle term to at least one of a preset minimum value and a preset maximum value.
7. The welding power supply of claim 1, wherein the power conversion circuitry comprises an inverter-type power supply that comprises at least one of a forward circuit, a full bridge inverter, a half bridge inverter, and a flyback circuit.
8. The welding power supply of claim 1, wherein the one or more analog signals comprise the commanded current level.
9. The welding power supply of claim 1, wherein the one or more analog signals comprise a current feedback signal.
10. The welding power supply of claim 1, wherein the one or more analog signals comprise a voltage feedback signal.
11. The welding power supply of claim 1, wherein the duty cycle term is corrected for a gate drive delay associated with the one or more power semiconductor switches.
12. The welding power supply of claim 1, wherein the duty cycle term is corrected for a current-dependent or power-dependent loss comprising at least one of a diode voltage drop, a power semiconductor loss, and a leakage inductance.
13. A welding power supply, comprising:
power conversion circuitry comprising one or more power semiconductor switches, wherein the power conversion circuitry is configured to receive power from a primary source and to switch the one or more power semiconductor switches between an ON configuration and an OFF configuration to convert the received power to a welding output; and
a pulse width modulated (PWM) digital controller coupled to the power conversion circuitry and configured to sample a current or voltage waveform during a period of the current or voltage waveform at a trigger location approximately equal to an average of the current or voltage waveform determined based at least in part on data obtained during a previous period of the current or voltage waveform, and to communicate the sampled current or voltage values to a weld controller.
14. The welding power supply of claim 13, wherein the PWM digital controller is configured to calculate a PWM output signal that controls switching of the one or more power semiconductor switches based at least in part on the sampled current or voltage values.
15. The welding power supply of claim 13, wherein the PWM digital controller is configured to update the trigger location when sampling an analog signal, and to sample the current or voltage waveform during a period of the current or voltage waveform at the updated trigger location.
16. The welding power supply of claim 13, wherein the PWM digital controller is configured to re-calculate the trigger location once per switching cycle of the power semiconductor switches.
17. The welding power supply of claim 13, wherein the PWM digital controller is configured to update the PWM output signal once per switching cycle of the one or more power semiconductor switches after an approximate midpoint of the \u201cOFF\u201d portion of the switching cycle.
18. A welding power supply, comprising:
power conversion circuitry comprising one or more power semiconductor switches, wherein the power conversion circuitry is configured to receive power from a primary source and to switch the one or more power semiconductor switches between an ON configuration and an OFF configuration to convert the received power to a welding output; and
a pulse width modulated (PWM) digital controller coupled to the power conversion circuitry and configured to generate a PWM output signal that controls a switching frequency of the one or more power semiconductor switches based at least in part on a weld process type or weld process operating conditions.
19. The welding power supply of claim 18, wherein the PWM digital controller is configured to modify the switching frequency based at least in part on the welding process type.
20. The welding power supply of claim 18, wherein the PWM digital controller is configured to modify the switching frequency based at least in part on the weld process operating conditions.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A housing case for housing an electronic circuit board on which components are mounted, comprising:
a guide rail that forms a guide path when the electronic circuit board is inserted in the case, and
a holder holding at least one of the components mounted on the electronic circuit board,
and wherein the guide rail is disposed in a position that does not contact with the electronic circuit board when the one of the components is held by the holder.
2. The housing case according to claim 1, wherein the one of the components held by the holder is a connector.
3. The housing case according to claim 2, wherein the connector has a connector-side rail, and the holder comprises a projection to be engaged with the connector-side rail.
4. The housing case according to claim 3, wherein the connector-side rail comprises a pair of rails such that the projection is sandwiched by connector-side rails.
5. The housing case according to claim 1, wherein the guide rail comprises a pair of rails whose spacing is set to a predetermined value that is greater than the thickness of the electric circuit board.
6. The housing case according to claim 5, wherein the predetermined value is a value substantially twice the thickness of the electric circuit board.
7. A housing case for housing an electronic circuit board on which components are mounted, comprising:
guide means for providing a guide path when the electronic circuit board is inserted in the case, and
holder means for holding at least one of the components mounted on the electronic circuit board,
and wherein the guide means is disposed in a position that does not contact with the electronic circuit board when the one of the components is held by the holder means.
8. The housing case according to claim 7, wherein the one of the components held by the holder means is a connector means for connecting the component to another component.
9. The housing case according to claim 8, wherein the connector means comprises a connector-side rail, and the holder means comprises a projection to be engaged with the connector-side rail.
10. The housing case according to claim 9, wherein the connector-side rail comprises a pair of rails such that the projection is sandwiched by connector-side rails.
11. The housing case according to claim 7, wherein the guide means comprises a pair of rails whose spacing is set to a predetermined value that is greater than the thickness of the electric circuit board.
12. The housing case according to claim 11, wherein the predetermined value is a value substantially twice the thickness of the electric circuit board.
13. A method of manufacturing a housing case for housing an electronic circuit board on which components are mounted, the method comprising:
disposing, in the housing case, a guide rail that forms a guide path when the electronic circuit board is inserted in the case, and
disposing, in the housing case, a holder configured to hold at least one of the components mounted on the electronic circuit board,
and wherein the guide rail and the holder are disposed in a relative position such that the guide rail does not contact with the electronic circuit board when the one of the components is held by the holder.
14. The method according to claim 13, wherein the one of the components held by the holder is a connector.
15. The method according to claim 14, wherein the connector has a connector-side rail, and the holder comprises a projection to be engaged with the connector-side rail.
16. The method according to claim 15, wherein the connector-side rail comprises a pair of rails such that the projection is sandwiched by connector-side rails.
17. The method according to claim 13, wherein the guide rail comprises a pair of rails whose spacing is set to a predetermined value that is greater than the thickness of the electric circuit board.
18. The method according to claim 17, wherein the predetermined value is a value substantially twice the thickness of the electric circuit board.