1. A method for manufacturing a photoelectric conversion device comprising:
forming a fragile layer in a region at a predetermined depth from one surface of a single crystal silicon substrate;
forming a first impurity silicon layer on the one surface side in the single crystal silicon substrate;
forming a first electrode over the first impurity silicon layer;
disposing a supporting substrate and the single crystal silicon substrate so that one surface of the supporting substrate and the one surface of the single crystal silicon substrate face each other;
bonding the single crystal silicon substrate with the supporting substrate with at least the first impurity silicon layer and the first electrode interposed therebetween;
forming a single crystal silicon layer over the supporting substrate by separating the single crystal silicon substrate along the fragile layer or vicinity of the fragile layer with heat treatment;
performing crystal defect repair treatment of the single crystal silicon layer;
forming a silicon layer while epitaxially growing the silicon layer using the single crystal silicon layer as a seed layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure; and
forming a second impurity silicon layer on a surface side in the single crystal silicon layer which is epitaxial grown.
2. The method for manufacturing a photoelectric conversion device according to claim 1,
wherein the atmospheric pressure or near atmospheric pressure is in a range of 0.1 atm to 10 atm.
3. The method for manufacturing a photoelectric conversion device according to claim 1,
wherein the crystal defect repair treatment is laser treatment or heat treatment using a furnace.
4. The method for manufacturing a photoelectric conversion device according to claim 1,
wherein the crystal defect repair treatment is RTA treatment or flash lamp irradiation.
5. The method for manufacturing a photoelectric conversion device according to claim 1,
wherein the silane-based gas is silane, disilane, or trisilane.
6. The method for manufacturing a photoelectric conversion device according to claim 1,
wherein a rare gas or hydrogen is added to the source gas.
7. The method for manufacturing a photoelectric conversion device according to claim 1,
wherein the fragile layer is formed by irradiating the single crystal silicon substrate with ions or cluster ions through the one surface of the single crystal silicon substrate.
8. The method for manufacturing a photoelectric conversion device according to claim 1,
wherein a region of the single crystal silicon layer which is epitaxially grown is an intrinsic semiconductor.
9. The method for manufacturing a photoelectric conversion device according to claim 1 further comprising:
forming a third impurity silicon layer having one conductivity type over the second impurity silicon layer;
forming a non-single-crystal silicon layer over the third impurity silicon layer; and
forming a fourth impurity silicon layer having a conductivity type opposite to the one conductivity type over the non-single-crystal silicon layer.
10. The method for manufacturing a photoelectric conversion device according to claim 1, wherein the first electrode is in contact with a surface of the supporting substrate.
11. The method for manufacturing a photoelectric conversion device according to claim 7,
wherein the ions or cluster ions with which the single crystal silicon substrate is irradiated include high proportion of H3+ ions.
12. A method for manufacturing a photoelectric conversion device comprising:
forming a fragile layer in a region at a predetermined depth from one surface of a single crystal silicon substrate;
forming a first impurity silicon layer on the one surface side in the single crystal silicon substrate;
forming a first electrode over the first impurity silicon layer;
disposing a supporting substrate and the single crystal silicon substrate so that one surface of the supporting substrate and the one surface of the single crystal silicon substrate face each other;
bonding the single crystal silicon substrate with the supporting substrate with at least the first impurity silicon layer and the first electrode interposed therebetween;
forming a single crystal silicon layer over the supporting substrate by separating the single crystal silicon substrate along the fragile layer or vicinity of the fragile layer with heat treatment;
performing crystal defect elimination treatment of the single crystal silicon layer;
forming a silicon layer while epitaxially growing the silicon layer using the single crystal silicon layer as a seed layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure; and
forming a second impurity silicon layer on a surface side in the single crystal silicon layer which is epitaxial grown.
13. The method for manufacturing a photoelectric conversion device according to claim 12,
wherein the atmospheric pressure or near atmospheric pressure is in a range of 0.1 atm to 10 atm.
14. The method for manufacturing a photoelectric conversion device according to claim 12,
wherein the crystal defect elimination treatment is etching treatment.
15. The method for manufacturing a photoelectric conversion device according to claim 12,
wherein the crystal defect elimination treatment is CMP treatment.
16. The method for manufacturing a photoelectric conversion device according to claim 12,
wherein the silane-based gas is silane, disilane, or trisilane.
17. The method for manufacturing a photoelectric conversion device according to claim 12,
wherein a rare gas or hydrogen is added to the source gas.
18. The method for manufacturing a photoelectric conversion device according to claim 12, wherein the fragile layer is formed by irradiating the single crystal silicon substrate with ions or cluster ions through the one surface of the single crystal silicon substrate.
19. The method for manufacturing a photoelectric conversion device according to claim 12,
wherein a region of the single crystal silicon layer which is epitaxially grown is an intrinsic semiconductor.
20. The method for manufacturing a photoelectric conversion device according to claim 12 further comprising:
forming a third impurity silicon layer having one conductivity type over the second impurity silicon layer;
forming a non-single-crystal silicon layer over the third impurity silicon layer; and
forming a fourth impurity silicon layer having a conductivity type opposite to the one conductivity type over the non-single-crystal silicon layer.
21. The method for manufacturing a photoelectric conversion device according to claim 12, wherein the first electrode is in contact with a surface of the supporting substrate.
22. The method for manufacturing a photoelectric conversion device according to claim 18,
wherein the ions or cluster ions with which the single crystal silicon substrate is irradiated include high proportion of H3+ ions.
23. A method for manufacturing a photoelectric conversion device comprising:
forming a fragile layer in a region at a predetermined depth from one surface of a single crystal silicon substrate;
forming a first impurity silicon layer on the one surface side in the single crystal silicon substrate;
forming a first electrode over the first impurity silicon layer;
forming an insulating layer over the first electrode;
disposing a supporting substrate and the single crystal silicon substrate so that one surface of the supporting substrate and the one surface of the single crystal silicon substrate face each other;
bonding the single crystal silicon substrate with the supporting substrate with at least the first impurity silicon layer and the first electrode interposed therebetween;
forming a single crystal silicon layer over the supporting substrate by separating the single crystal silicon substrate along the fragile layer or vicinity of the fragile layer with heat treatment;
performing crystal defect repair treatment of the single crystal silicon layer;
forming a silicon layer while epitaxially growing the silicon layer using the single crystal silicon layer as a seed layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure; and
forming a second impurity silicon layer on a surface side in the single crystal silicon layer which is epitaxial grown.
24. The method for manufacturing a photoelectric conversion device according to claim 23,
wherein the atmospheric pressure or near atmospheric pressure is in a range of 0.1 atm to 10 atm.
25. The method for manufacturing a photoelectric conversion device according to claim 23,
wherein the crystal defect repair treatment is laser treatment, or heat treatment using a furnace.
26. The method for manufacturing a photoelectric conversion device according to claim 23,
wherein the crystal defect repair treatment is RTA treatment or flash lamp irradiation.
27. The method for manufacturing a photoelectric conversion device according to claim 23,
wherein the silane-based gas is silane, disilane, or trisilane.
28. The method for manufacturing a photoelectric conversion device according to claim 23,
wherein a rare gas or hydrogen is added to the source gas.
29. The method for manufacturing a photoelectric conversion device according to claim 23, wherein the fragile layer is formed by irradiating the single crystal silicon substrate with ions or cluster ions through the one surface of the single crystal silicon substrate.
30. The method for manufacturing a photoelectric conversion device according to claim 23,
wherein a region of the single crystal silicon layer which is epitaxially grown is an intrinsic semiconductor.
31. The method for manufacturing a photoelectric conversion device according to claim 23 further comprising:
forming a third impurity silicon layer having one conductivity type over the second impurity silicon layer;
forming a non-single-crystal silicon layer over the third impurity silicon layer; and
forming a fourth impurity silicon layer having a conductivity type opposite to the one conductivity type over the non-single-crystal silicon layer.
32. The method for manufacturing a photoelectric conversion device according to claim 23, wherein the insulating layer is in contact with a surface of the supporting substrate.
33. The method for manufacturing a photoelectric conversion device according to claim 29,
wherein the ions or cluster ions with which the single crystal silicon substrate is irradiated include high proportion of H3+ ions.
34. A method for manufacturing a photoelectric conversion device comprising:
forming a fragile layer in a region at a predetermined depth from one surface of a single crystal silicon substrate;
forming a first impurity silicon layer on the one surface side in the single crystal silicon substrate;
forming a first electrode over the first impurity silicon layer;
forming an insulating layer over the first electrode;
disposing a supporting substrate and the single crystal silicon substrate so that one surface of the supporting substrate and the one surface of the single crystal silicon substrate face each other;
bonding the single crystal silicon substrate with the supporting substrate with at least the first impurity silicon layer and the first electrode interposed therebetween;
forming a single crystal silicon layer over the supporting substrate by separating the single crystal silicon substrate along the fragile layer or vicinity of the fragile layer with heat treatment;
performing crystal defect elimination treatment of the single crystal silicon layer;
forming a silicon layer while epitaxially growing the silicon layer using the single crystal silicon layer as a seed layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure; and
forming a second impurity silicon layer on a surface side in the single crystal silicon layer which is epitaxial grown.
35. The method for manufacturing a photoelectric conversion device according to claim 34,
wherein the atmospheric pressure or near atmospheric pressure is in a range of 0.1 atm to 10 atm.
36. The method for manufacturing a photoelectric conversion device according to claim 34,
wherein the crystal defect elimination treatment is etching treatment.
37. The method for manufacturing a photoelectric conversion device according to claim 34,
wherein the crystal defect elimination treatment is CMP treatment.
38. The method for manufacturing a photoelectric conversion device according to claim 34,
wherein the silane-based gas is silane, disilane, or trisilane.
39. The method for manufacturing a photoelectric conversion device according to claim 34,
wherein a rare gas or hydrogen is added to the source gas.
40. The method for manufacturing a photoelectric conversion device according to claim 34, wherein the fragile layer is formed by irradiating the single crystal silicon substrate with ions or cluster ions through the one surface of the single crystal silicon substrate.
41. The method for manufacturing a photoelectric conversion device according to claim 34,
wherein a region of the single crystal silicon layer which is epitaxially grown is an intrinsic semiconductor.
42. The method for manufacturing a photoelectric conversion device according to claim 34 further comprising:
forming a third impurity silicon layer having one conductivity type over the second impurity silicon layer;
forming a non-single-crystal silicon layer over the third impurity silicon layer; and
forming a fourth impurity silicon layer having a conductivity type opposite to the one conductivity type over the non-single-crystal silicon layer.
43. The method for manufacturing a photoelectric conversion device according to claim 34, wherein the insulating layer is in contact with a surface of the supporting substrate.
44. The method for manufacturing a photoelectric conversion device according to claim 40,
wherein the ions or cluster ions with which the single crystal silicon substrate is irradiated include high proportion of H3+ ions.
45. A method for manufacturing a photoelectric conversion device comprising:
preparing a single crystal silicon layer over a stack of a substrate, a first electrode, and a first impurity silicon layer;
performing crystal defect repair treatment of the single crystal silicon layer;
forming a silicon layer while epitaxially growing the silicon layer using the single crystal silicon layer as a seed layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure; and
forming a second impurity silicon layer on a surface side in the single crystal silicon layer which is epitaxially grown.
46. The method for manufacturing a photoelectric conversion device according to claim 45,
wherein the crystal defect repair treatment is laser treatment or heat treatment using a furnace.
47. The method for manufacturing a photoelectric conversion device according to claim 45,
wherein the crystal defect repair treatment is RTA treatment or flash lamp irradiation.
48. A method for manufacturing a photoelectric conversion device comprising:
preparing a single crystal silicon layer over a stack of a substrate, a first electrode, and a first impurity silicon layer;
performing crystal defect elimination treatment of the single crystal silicon layer;
forming a silicon layer while epitaxially growing the silicon layer using the single crystal silicon layer as a seed layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure; and
forming a second impurity silicon layer on a surface side in the single crystal silicon layer which is epitaxially grown.
49. The method for manufacturing a photoelectric conversion device according to claim 48,
wherein the crystal defect elimination treatment is etching treatment.
50. The method for manufacturing a photoelectric conversion device according to claim 48,
wherein the crystal defect elimination treatment is CMP treatment.
The claims below are in addition to those above.
All refrences to claims which appear below refer to the numbering after this setence.
1. A method of testing a device under test, which is adapted to transmit a digital data signal and a clock signal, the data signal being related to the clock signal, to a test device, comprising the steps of:
sampling within one clock cycle of a local clock signal the data signal and the clock signal by applying a number of strobes for obtaining a corresponding number of bit values each for the data signal and for the clock signal, the strobes having different phase offsets with respect to the local clock signal,
deriving first comparison results for the sampled bit values of the data signal by comparing the sampled bit values of the data signal each with an expected data bit value according to expected data,
deriving second comparison results for the sampled bit values of the clock signal by comparing the sampled bit values of the clock signal each with an expected clock bit value,
deriving combined comparison results by applying logical operations each on pairs of corresponding first comparison result and second comparison result, and
deriving a test result for the data of said clock cycle based on the combined comparison results.
2. The method of claim 1, wherein the logical operation is one of a Boolean OR operation and an Exclusive OR operation and the step of deriving the test result comprises one of:
(a) checking, whether for each clock cycle there exists at least one strobe, which yields a combined pass result or
(b) checking, whether for each clock cycle there exist only strobes, which yield a combined pass result.
3. The method of claim 1, wherein the device under test is accepted or rejected in response to test results of a plurality of clock cycles of the test device clock.
4. The method of claim 1, wherein the clock signal and the data signal are sampled sequentially with respect to each strobe.
5. The method of claim 1, wherein
the test device comprises a plurality of data pins, which provide each a data signal and an associated clock pin providing said clock signal,
performing the logical operation to combine each of the first comparison result with the corresponding second comparison result to determine corresponding combined comparison results, and
deriving a test result for each of the data of said clock cycle based on each of the combined comparison results.
6. The method of claim 1, wherein the test device first inputs a stimulus signal comprising data andor instructions into the device under test, such that said device under test generates the data signal and the clock signal in response to said input stimulus signal.
7. The method of claim 1, wherein a clock signal is transmitted by a source synchronous interface of the device under test, such that said clock signal shows transition edges with a constant phase offset with respect to transition edges of its associated data signal transition edges.
8. The method of claim 7, wherein the data signal is sampled according to first strobes and the clock signal is sampled according to second strobes, both strobe sets or offset to each other by a defined phase value.
9. The method of claims 1, wherein a pass result of the comparison results is represented by a logical \u201c0\u201d, and a fail result is represented by a logical \u201c1\u201d, and the logical operation, which is applied for receiving the combined comparison result is one of: a logical OR or a logical NOR or a logical \u201cexclusive OR\u201d (EXOR) operation.
10. The method of claim 9, wherein the step of deriving combined comparison results further comprises:
performing a second logical operation on the plurality of combined comparison results, which refer to different strobes, in order to obtain the test result for the clock cycle.
11. The method of claim 10, further comprising:
calculating one final accept or reject decision for the device by performing a third logical operation on the test results of a plurality of clock cycles.
12. The method of claim 11, comprising the further steps of:
determining cycles of the data signal, where no transition of the bit information with respect to an adjacent previous cycle occurs, and
masking any comparison result obtained with respect to the determined cycles prior to performing the second or third logical operation.
13. The method of claim 1 wherein the strobes are equally spaced with respect to their phase offset with respect to the clock signal of the test device.
14. A software program or product, preferably stored on a data carrier, for controlling the executing the method of claim 1, when run on a data processing system of the test device.
15. A test device testing a device under test, which is adapted to transmit a digital data signal and a clock signal, the data signal being related to the clock signal comprising:
a sampler sampling within one clock cycle of a clock signal of a local clock the data signal and the clock signal by applying a number of strobes for obtaining a corresponding number of bit values each for the data signal and for the clock signal, each of the strobes having a different phase offset with respect to the clock signal,
a comparator deriving first comparison results for the sampled bit values of the data signal by comparing the sampled bit values of the data signal each with an expected data bit value according to expected data, and deriving second comparison results for the sampled bit values of the clock signal by comparing the sampled bit values of the clock signal each with an expected clock bit value,
a processor deriving combined comparison results by applying logical operations each on pairs of corresponding first comparison result and second comparison result, and for deriving a test result for the data of said clock cycle based on the combined comparison results.