All The Claims

1. A storage system connected to a computer through a network for receiving a variety of commands from said computer to perform a data inputoutput process with said computer, said storage system comprising:
a plurality of first interfaces for receiving a variety of commands from said computer;
a storage device for storing data;
a second interface for communicating data with said storage device;
a plurality of processors for performing a data inputoutput process corresponding to a received command;
a management unit responsive to a request from an administrator for establishing a variety of configurations for said storage system; and
an interconnection for connecting said first interfaces, said second interface, said processors, and said management unit to one another,
wherein said management unit selects an unused first interface from among said plurality of first interfaces for use in the data inputoutput process between said computer and said storage device, selects a processor which meets required performance of said computer from among said plurality of processors for use in said data inputoutput process, and configures said storage system with said selected first interface and processor.
2. A computer system having a storage system connected to a computer through a first network for receiving a variety of commands from said computer to perform a data inputoutput process with said computer, and a management console connected to said storage system through a second network for establishing a variety of configurations for said storage system, wherein:
said storage system comprises:
a plurality of first interfaces for receiving a variety of commands from said computer;
a storage device for storing data;
a second interface for communicating data with said storage device;
a plurality of processors each for processing a received command;
a management unit responsive to a request from an administrator for establishing a variety of configurations for said storage system, said management unit storing configuration information of said storage system; and
an interconnection for connecting said first interfaces, said second interface, said processors, and said management unit to one another, and
said management console comprises:
a unit for acquiring said configuration information of said storage system from said management unit;
a input unit for receiving required performance for a computer connected to said storage system;
a selector unit for selecting an unused first interface from among said plurality of first interfaces for use in the data inputoutput process between said computer and said storage device, and for selecting a processor which meets the required performance for said computer from among said plurality of processors for use in said data inputoutput process, using said acquired configuration information and received required performance; and
a display unit for notifying the administrator of a combination of said selected first interface and processor.
3. A computer system according to claim 2, wherein:
said management console controls said management unit of said storage system to configure said storage system with said notified combination.
4. A computer system according to claim 2, wherein:
said selector unit estimates calculated performance for said processor when said processor is assigned to said selected first interface, and selects a processor which meets said required performance using said calculated performance.
5. A storage system comprises:
a plurality of clusters each having a plurality of first interfaces each connected to a computer for receiving a variety of commands from said computer, a storage device for storing data, a second interface for communicating data with said storage device, a plurality of processors each for processing a received command, and an interconnection for connecting said first interfaces, said second interface, and said processors to one another; and
a management unit connected to said interconnection for establishing a variety of configurations for said storage system responsive to a request from an administrator,
wherein said management unit selects an unused first interface from among said plurality of first interfaces for use in a data inputoutput process between said computer and said storage device, selects a processor which meets required performance of said computer from among said plurality of processors for use in said data inputoutput process, and configures said storage system with said selected first interface and processor.
6. A computer system comprising:
a storage system including a plurality of clusters interconnected through an inter-cluster path, each said cluster having a plurality of first interfaces each connected to a computer through a first network for receiving a variety of commands from said computer, a storage device for storing data, a second interface for communicating data with said storage device, a plurality of processors each for processing a received command, an interconnection for connecting said first interfaces, said second interface, said processors, and said inter-cluster path to one another, and a management unit connected to said interconnection for establishing a variety of configurations for said storage system responsive to a request from an administrator; and
a management console for making a variety of configurations for said storage system, said management console being connected to said management unit through a second network, said management console including:
a selector unit responsive to a request from an administrator for selecting a combination of a first interface connected to said computer, a processor assigned to process commands received by said first interface, and a storage device which accepts an access from said computer, said combination being selected from the same cluster; and
a display unit for notifying the administrator of said selected combination.
7. A computer system according to claim 6, wherein:
said management console controls said management unit of said storage system to configure said storage system with said notified combination.
8. A storage system connected to a computer through a network for receiving a variety of commands from said computer to perform a data inputoutput process with said computer, said storage system comprising:
a port adapter having a plurality of interfaces each for receiving a variety of commands from a computer;
a storage device for storing data;
a plurality of storage adapters each connected to said storage device and having a processor for processing a variety of commands received by said port adapter associated therewith;
a management unit for establishing a variety of configurations for said storage system; and
an interconnection for connecting said port adapter, said storage adapters, and said management unit to one another,
wherein said management unit selects a storage adapter having a processor which meets required performance of said computer from among said plurality of storage adapters for assignment to process commands destined to a volume provided by said port adapter connected to said computer, selects a storage device for connection with said selected storage adapter, and configures said storage system with said selected storage adapter and storage device.
9. A computer system having a storage system connected to a computer through a first network for receiving a variety of commands from said computer to perform a data inputoutput process with said computer, and a management console connected to said storage system through a second network for establishing a variety of configurations for said storage system, wherein:
said storage system comprising:
a port adapter having a plurality of interfaces each for receiving a variety of commands from a computer;
a storage device for storing data;
a plurality of storage adapters each connected to said storage device and having a processor for processing a variety of commands received by said port adapter associated therewith;
a management unit for establishing a variety of configurations for said storage system, said management unit storing configuration information of said storage system; and
an interconnection for connecting said port adapter, said storage adapters, and said management unit to one another, and
said management console comprises:
a unit for acquiring said configuration information of said storage system from said management unit;
a input unit for receiving required performance entered for a computer connected to said storage system;
a selector unit for selecting a storage adapter having a processor which meets required performance of said computer from among said plurality of storage adapters for assignment to process commands destined to a volume provided by said port adapter connected to said computer, and selecting a storage device for connection with said selected storage adapter; and
a display unit for notifying an administrator of a combination of said selected storage adapter and storage device.
10. A method of configuring a storage system connected to a computer through a network for receiving a variety of commands from said computer to perform a data inputoutput process with said computer, said method performed by a management console,
said storage system comprising a plurality of first interfaces each for receiving a variety of commands from a computer, a storage device for storing data, a second interface for communicating data with said storage device, a plurality of processors each for performing a data inputoutput process corresponding to a received command, a management unit responsive to a request from an administrator for establishing a variety of configurations for said storage system, said management unit storing configuration information of said storage system, and an interconnection for connecting said first interfaces, said second interface, said processors, and said management unit to one another,
said management console being connected to said management unit through a second network,
said method comprising the steps of:
acquiring the configuration information of said storage system from said management unit;
receiving required performance entered for a computer connected to said storage system; and
selecting an unused first interface from among said plurality of first interfaces for use in the data inputoutput process between said computer and said storage device, and a processor which meets required performance of said computer from among said plurality of processors for use in said data inputoutput process using said acquired configuration information and said received required performance.
11. A method of configuring a storage system according to claim 10, wherein:
said step of selecting includes estimating calculated performance of said processor when said processor is assigned to said selected first interface, and selecting a processor which meets said required performance using said calculated performance.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A semiconductor device package comprising:
a semiconductor device die comprising a semiconductor device subject to a shift in threshold voltage due to trapped charge carriers in a gate dielectric layer of the semiconductor device;
a heating device located within the semiconductor device package and configured to selectively provide heat to the gate dielectric layer of the semiconductor device, wherein
the heat is sufficient to decrease the shift in threshold voltage due to trapped charge carriers in the gate dielectric layer of the semiconductor device;

an n-well of the semiconductor device configured in thermal contact with the gate dielectric layer; and
two or more electrical contacts to the n-well configured to provide an electrical current through the n-well, wherein
a resistance of the n-well provides the heat to the gate dielectric layer in response to the electrical current.
2. The semiconductor device package of claim 1 wherein said selectively providing heat to the gate dielectric layer comprises applying heat when the semiconductor device is in one or more of accumulation mode or having zero current between source and drain of the semiconductor device.
3. The semiconductor device package of claim 1 wherein the semiconductor device die comprises the heating device.
4. The semiconductor device package of claim 1 wherein the semiconductor device die further comprises:
a plurality of semiconductor devices each subject to a rising shift in threshold voltage due to trapped charge carriers in corresponding gate dielectric layers of the plurality of semiconductor devices, wherein
the corresponding gate dielectric layers are formed in thermal contact with the n-well, and
said providing the electrical current to the n-well generates heat sufficient to decrease a magnitude of the shift in threshold voltage due to trapped charge carriers in the corresponding gate dielectric layers of each of the plurality of semiconductor devices.
5. A semiconductor device package comprising:
a semiconductor device die comprising a semiconductor device subject to a shift in threshold voltage due to trapped charge carriers in a gate dielectric layer of the semiconductor device;
a heating device located within the semiconductor device package and configured to selectively provide heat to the gate dielectric layer of the semiconductor device, wherein
the heat is sufficient to decrease the shift in threshold voltage due to trapped charge carriers in the gate dielectric layer of the semiconductor device, and
the semiconductor device die comprises the heating device;

a gate stack of the semiconductor device, wherein the gate stack comprises
the gate dielectric layer and a resistive layer,
a conductive gate layer formed over the gate dielectric layer, and
the resistive layer formed over the conductive gate layer, wherein a heater dielectric layer electrically isolates the resistive layer from the conductive gate layer,

two or more electrical contacts to the resistive layer configured to provide an electrical current through the resistive layer, wherein
a resistance of the resistive layer provides the heat to the gate dielectric layer in response to the electrical current.
6. A semiconductor device package comprising:
a semiconductor device die comprising a semiconductor device subject to a shift in threshold voltage due to trapped charge carriers in a gate dielectric layer of the semiconductor device; and
a heating device located within the semiconductor device package and configured to selectively provide heat to the gate dielectric layer of the semiconductor device, wherein
the heat is sufficient to decrease the shift in threshold voltage due to trapped charge carriers in the gate dielectric layer of the semiconductor device, and
the heating device comprises a heating device die thermally coupled to a major surface of the semiconductor device die.
7. The semiconductor device package of claim 6, wherein the heating device die comprises a heating resistor configured to provide the heat in response to an electrical current passed through the heating resistor.
8. The semiconductor device package of claim 6 wherein the semiconductor device package further comprises:
one or more thermally conductive conduits having a first end at or near the major surface of the semiconductor device die and a second end at or near the gate dielectric layer, wherein the thermally conductive conduits are configured to transmit the heat generated by the heating device die to the gate dielectric layer.
9. An apparatus comprising:
a semiconductor device package comprising
a semiconductor device die comprising a semiconductor device subject to a shift in threshold voltage due to trapped charge carriers in a gate dielectric layer of the semiconductor device, and
a heating device located within the semiconductor device package and configured to selectively provide heat to the gate dielectric layer of the semiconductor device, wherein
the heating device comprises a heating device die thermally coupled to a major surface of the semiconductor device die, and
the heat is sufficient to decrease a magnitude of the shift in threshold voltage due to trapped charge carriers in the gate dielectric layer of the semiconductor device;
a first power source configured to supply voltage and current sufficient to operate logic of the semiconductor device die; and
a second power source configured to supply voltage and current sufficient to operate the heating device, wherein the voltage and current sufficient to operate the heating device are not equal to the voltage and current sufficient to operate the logic of the semiconductor device.
10. The apparatus of claim 9 wherein said selectively providing heat to the gate dielectric layer comprises applying heat when the semiconductor device is in one or more of accumulation mode or having zero current between source and drain of the semiconductor device.

1. A method of forming a more highly-oriented silicon layer, comprising:
forming an aluminum (Al) layer on a base substrate;
forming a more highly-oriented Al layer by recrystallizing the Al layer;
forming a more highly-oriented \u03b3-Al2O3 layer on the more highly-oriented Al layer; and
epitaxially growing a silicon layer on the more highly-oriented \u03b3-Al2O3 layer to form the more highly-oriented silicon layer.
2. The method of claim 1, wherein forming the more highly-oriented Al layer includes recrystallizing the Al layer under vacuum using at least one method selected from the group including excimer laser annealing (ELA), sequential lateral solidification (SLS) and hot roll scanning.
3. The method of claim 1, wherein forming the more highly-oriented \u03b3-Al2O3 layer includes oxidizing the more highly-oriented Al layer.
4. The method of claim 3, wherein forming the more highly-oriented \u03b3-Al2O3 layer includes thermally oxidizing the more highly-oriented Al layer in an oxygen-enriched atmosphere or an ozone atmosphere.
5. The method of claim 4, wherein thermally oxidizing is performed at a process temperature of about 100\xb0 C. to 650\xb0 C.
6. The method of claim 3, wherein forming the more highly-oriented \u03b3-Al2O3 layer includes performing excimer laser annealing (ELA) on the more highly-oriented Al layer in an oxygen-enriched atmosphere or an ozone atmosphere.
7. The method of claim 3, further comprising:
epitaxially growing \u03b3-Al2O3 on the more highly-oriented \u03b3-Al2O3 layer formed by oxidizing the Al layer.
8. The method of claim 1, wherein forming the more highly-oriented \u03b3-Al2O3 layer includes using an anodizing method.
9. The method of claim 1, wherein forming the more highly-oriented \u03b3-Al2O3 layer includes using an epitaxial growth method.
10. The method of claim 9, wherein the epitaxial growth method is performed using metal organic molecular beam epitaxy (MOMBE).
11. The method of claim 1, wherein forming a more highly-oriented Al layer and a more highly-oriented \u03b3-Al2O3 layer on the more highly-oriented Al layer is performed simultaneously by recrystallizing and oxidizing the Al layer.
12. The method of claim 11, wherein forming the more highly-oriented \u03b3-Al2O3 layer includes performing excimer laser annealing (ELA).
13. The method of claim 11, wherein forming the more highly-oriented Al layer and the more highly-oriented \u03b3-Al2O3 layer includes melting the Al layer a vacuum furnace or a rapid thermal annealing (RTA) furnace, and cooling the Al layer in an oxygen-enriched atmosphere or an ozone atmosphere.
14. The method of claim 1, wherein forming the silicon layer is includes using a low pressure chemical vapor deposition (LPCVD) method or an ultra-high vacuum chemical vapor deposition (UHV CVD) method.
15. The method of claim 11, wherein forming the silicon layer includes using a low pressure chemical vapor deposition (LPCVD) method or an ultra-high vacuum chemical vapor deposition (UHV CVD) method.
16. A substrate, comprising:
a base substrate;
a more highly-oriented Al layer formed on the base substrate;
a more highly-oriented \u03b3-Al2O3 layer formed on the more highly-oriented Al layer; and
a more highly-oriented silicon layer formed on the more highly-oriented \u03b3-Al2O3 layer.
17. The substrate of claim 16, wherein the Al layer is formed of one selected from the group including Al and Ni\u2014Al alloys.
18. The substrate of claim 17, wherein the more highly-oriented Al layer has a grain size of about 50 nm to 20 \u03bcm.
19. The substrate of claim 16, wherein the more highly-oriented \u03b3-Al2O3 layer has a grain size of about 50 nm to 20 \u03bcm.
20. The substrate of claim 16, wherein the silicon layer is formed of one selected from the group including silicon (Si) and silicon germanium (SiGe).
21. The substrate of claim 16, wherein the silicon layer has a grain size of about 50 nm to 20 \u03bcm.
22. The substrate of claim 16, wherein the base substrate is formed of glass.
23. The substrate of claim 16, further comprising a buffer layer formed between the Al layer and the base substrate.
24. The substrate of claim 23, wherein the buffer layer is formed of one selected from the group including SiO2, Si3N4, AlN and Si3NxOx.
25. A thin film transistor comprising the substrate according to claim 16.
26. A display comprising the thin film transistor according to claim 25, wherein the thin film transistor is used as a switching device.
27. The substrate of claim 16, wherein the substrate is a silicon on insulation (SOI) substrate.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of decoding optical data signals, comprising:
correcting a received differentially encoded phase-shift keying modulated optical signal by an estimated phase offset,
deriving differentially decoded data values from the corrected signal using an estimation algorithm which
accounts for a differential encoding rule of said differentially encoded phase-shift keying modulated optical signal,
is suitable to maximise a probability with respect to potentially transmitted differentially encoded data symbols or to maximise one or more probabilities with respect to the differentially decoded data values, and
stipulates transition probabilities between first hypothetical states that represent potentially transmitted differentially encoded data symbols assuming that no phase slip has occurred, and towards second hypothetical states that represent potentially transmitted differentially encoded data symbols assuming that a phase slip has occurred,

wherein the transition probabilities from one or more of said first hypothetical states towards one or more of said second hypothetical states are weighted on the basis of a predetermined phase slip probability value.
2. The method according to claim 1,
wherein said estimation algorithm stipulates respective sets of hypothetical states for respective phase rotation angles of a phase-shift keying (PSK) constellation diagram, and
wherein the hypothetical states of each of said sets represent potentially transmitted differentially encoded data symbols for the respective phase rotation angle of the respective set, and
wherein transition probabilities between states of a first set at a first time instance and states of a second set at a second time instance are weighted on a basis of a predetermined phase slip probability value, which is related to a difference of the phase rotation angles of said first set and said second set.
3. The method according to claim 1,
wherein said received optical data signal is further encoded by a forward error correction encoding algorithm, and
wherein said estimation algorithm is suitable to maximise one or more probabilities with respect to the differentially decoded data values,
the method further comprising
deriving from the corrected optical signal probability values that indicate a probability of respective received differentially encoded data symbols,

wherein said estimation algorithm determines from the derived probability values of said respective received differentially encoded data symbols probability values that indicate a probability of respective differentially decoded data values,
the method further comprising
modifying the determined probability values that indicate a probability of respective differentially decoded data values, using a suitable algorithm that accounts for said forward error correction encoding algorithm.
4. The method according to claim 3, further comprising
weighting the stipulated transition probabilities, using the modified probability values that indicate a probability of respective differentially decoded data values.
5. The method according to claim 4, wherein said forward error correction encoding algorithm is a Low Density Parity Check Code.
6. A device for decoding optical data signals, wherein said device is adapted to:
receive a differentially encoded phase-shift keying modulated optical signal,
correct the received differentially encoded phase-shift keying modulated optical signal by an estimated phase offset,
derive differentially decoded data values from the corrected differentially encoded phase-shift keying modulated optical signal using an estimation algorithm which
accounts for a differential encoding rule of said differentially encoded phase-shift keying modulated optical signal,
is suitable to maximise a probability with respect to potentially transmitted differentially encoded data symbols or to maximise one or more probabilities with respect to the differentially decoded data values, and
stipulates transition probabilities between first hypothetical states that represent potentially transmitted differentially encoded data symbols assuming that no phase slip has occurred, and second hypothetical states that represent potentially transmitted differentially encoded data symbols assuming that a phase slip has occurred, wherein the transition probabilities between said first hypothetical states and said second hypothetical states are weighted on the basis of a predetermined phase slip probability value.