All The Claims

1. A liquid crystal (LC) panel, comprising:
a plurality of thin film transistors (TFTs);
scan lines;
data lines;
a scan driving chip that drives the scan lines; and
a data driving chip that drives the data lines;
wherein the data lines and the scan lines crisscrossed each other; gate electrodes of each row of TFTs are connected with one scan line, source electrodes of each column of TFTs are connected with one data line, and a drain electrode of each of the TFTs is connected with a pixel electrode; the scan driving chip comprises a compensation driving unit coupled to the scan lines;
the compensation driving unit drives the TFTs corresponding to a next-row of scan line to turn on when the scan driving chip drives the TFTs corresponding to a current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the compensation driving unit drives the TFTs corresponding to the next-row of scan line to turn off when the TFTs corresponding to the current-row of scan line receive a data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
2. The LC panel of claim 1, wherein a second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on after a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.
3. The LC panel of claim 1, further comprising a first switch unit, and a control end of the first switch unit is coupled to a first driving unit, the first switch unit is connected between adjacent data lines;
wherein the first driving unit drives the first switch unit to turn on when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the first driving unit drives the first switch unit to turn off when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
4. The LC panel of claim 3, wherein the first switch unit is connected between each of the data lines and one of the adjacent data lines.
5. The LC panel of claim 4, wherein a second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on at a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.
6. A method for driving a liquid crystal (LC) panel, the LC panel comprising a plurality of thin film transistors (TFTs), scan lines, data lines, a scan driving chip that drives the scan lines, and a data driving chip that drives the data lines; the data lines and the scan lines crisscrossing with each other; gate electrodes of each row of TFTs being connected with one scan line, source electrodes of each column of TFTs being connected with one data line, and a drain electrode of each of the TFTs being connected with a pixel electrode; the scan driving chip comprising a compensation driving unit coupled to the scan lines; the method comprising:
step A: controlling the scan driving chip to drive the TFTs corresponding to a current-row of scan line to turn on;
step B: controlling the scan driving chip to drive the TFTs corresponding to a next-row of scan line to turn on; and
step C: determining whether the TFTs corresponding to the current-row of scan line receive the data signal, and driving the TFTs corresponding to the next-row of scan line to turn off when the TFTs corresponding to the current-row of scan line receive a data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
7. The method for driving the LC panel of claim 6, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
8. The method for driving the LC panel of claim 6, wherein a first switch unit is connected between adjacent data lines; the step B comprises:
controlling the first switch unit to turn on;
the step C further comprises:
determining whether the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip, and controlling the first switch unit to turn off when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
9. The method for driving the LC panel of claim 8, wherein the step B further comprises:
controlling the first switch unit to turn on, and controlling the scan driving chip to drive the TFTs corresponding to the next-row of scan line to turn on after the first switch unit turns off.
10. The method for driving the LC panel of claim 9, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
11. The method for driving the LC panel of claim 8, wherein the step B further comprises:
controlling the scan driving chip to drive the TFTs corresponding to the next-row of scan line to turn on, and controlling the first switch unit to turn on after the scan driving chip drives the TFTs corresponding to the next-row of scan line to turn on.
12. The method for driving the LC panel of claim 11, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
13. The method for driving the LC panel of claim 8, wherein the step B further comprises:
controlling the scan driving chip to drive the TFTs corresponding to the next-row of scan line to turn on, and simultaneously controlling the first switch unit to turn on.
14. The method for driving the LC panel of claim 13, wherein a second switch unit is connected between each of the data lines and the data driving chip; the method further comprising a step A1 before the step A, comprising:
controlling the second switch unit to turn off;
the step C comprises:
controlling the second switch unit to turn on after the preset delay time, and determining whether the TFTs corresponding to the current-row of scan line receive the data signal.
15. A liquid crystal (LC) panel, comprising:
scan lines;
data lines;
a scan driving chip that drives the scan lines; and
a data driving chip that drives the data lines;
wherein the data lines and the scan lines crisscross with each other; the scan driving chip comprises a compensation driving unit coupled to the scan lines; time of driving each of the scan lines is one scanning interval in one frame picture of the LC panel; the compensation driving unit outputs a first driving signal and a second driving signal in one scanning interval of each of the scan lines, the first driving signal and the second driving signal drive thin film transistor (TFTs) to turn on;
the compensation driving unit outputs the first driving signal of a next-row of scan line when the compensation driving unit outputs the second driving signal of a current-row of scan line or after the compensation driving unit outputs the second driving signal of the current-row of scan line; and the compensation driving unit terminates output of the first driving signal of the next-row of scan line when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip; when output of the second driving signal of the current-row of scan line is terminated, the compensation driving unit outputs the second driving signal of the next-row of scan line.
16. LC panel of claim 15, wherein it second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on at a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.
17. The LC panel of claim 15, further comprising a first switch unit, and a control end of the first switch unit is coupled to a first driving unit, the first switch unit is connected between adjacent data lines;
wherein the first driving unit drives the first switch unit to turn on when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the first driving unit drives the first switch unit to turn off when the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip or before the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip.
18. The LC panel of claim 17, wherein the first switch unit is connected between each of the data lines and one of the adjacent data lines.
19. The LC panel of claim 18, wherein a second switch unit is connected between each of the data lines and the data driving chip, and a control end of the second switch unit is coupled to a second driving unit; the second driving unit drives the second switch unit to turn on at a preset delay time when the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on or after the scan driving chip drives the TFTs corresponding to the current-row of scan line to turn on; the TFTs corresponding to the current-row of scan line receive the data signal of the data driving chip through the second switch unit after the preset delay time; the next-row of scan line drives the corresponding TFTs to turn off when the corresponding TFTs to turn off when the preset delay time ends or before the preset delay time ends.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of initializing a disk surface included in a disk in an assembled hard disk drive, comprising the steps:
determining a voice coil motor control contribution and a voice coil motor plant contribution to a Repeatable Run-Out (RRO) corrector function of a track on said disk surface;
determining a micro-actuator control contribution to said RRO corrector function of said track on said disk surface; and
writing the parameters of said RRO corrector function for said track to said disk surface to create a written-in RRO corrector function parameter list on said disk surface included in a hard disk drive;
wherein said parameters of said RRO corrector function, include:
at least one parameter for said voice coil motor control contribution;
at least one parameter for said voice coil motor plant contribution; and
at least one parameter for said micro-actuator control contribution;
wherein said hard disk drive includes a voice coil motor and a micro-actuator contributing to at least the lateral position of a read-write head to said track on said disk surface.
2. The method of claim 1, further comprising the step:
determining a micro-actuator plant contribution to said RRO corrector function of said track on said disk surface.
3. The method of claim 2, wherein said parameters of said RRO corrector function, further include:
at least one parameter for said micro-actuator plant contribution.
4. The method of claim 1, for each of said tracks for use in data access on said disk surface, further comprising:
determining said voice coil motor control contribution and said voice coil motor plant contribution to said RRO corrector function of said track;
determining said micro-actuator control contribution to said RRO corrector function of said track; and
writing the parameters of said RRO corrector function for said track to said disk surface.
5. The method of claim 4, wherein said disk includes a second disk surface; and
wherein said method further comprises, for each track for use in data access on said second disk surface, further comprises the steps:
determining said voice coil motor control contribution and said voice coil motor plant contribution to said RRO corrector function of said track on said second disk surface;
determining said micro-actuator control contribution to said RRO corrector function of said track on said second disk surface; and
writing the parameters of said RRO corrector function for said track to said second disk surface.
6. An embedded circuit included in the assembled hard disk drive implementing the method of claim 1, comprising:
a servo computer accessibly coupled to a servo memory and directed by a burn-in program system, comprising program steps residing in said servo memory;
wherein said burn-in program system, comprises the program steps:
determining said voice coil motor control contribution and said voice coil motor plant contribution to said RRO corrector function of said track on said disk surface;
determining said micro-actuator control contribution to said RRO corrector function of said track on said disk surface; and
writing the parameters of said RRO corrector function for said track to said disk surface.
7. The hard disk drive including said disk surface containing said written-in RRO corrector parameter list, as a product of the process of claim 1.
8. A method of using said written-in RRO corrector parameter list in said hard disk drive of claim 7, comprising the steps:
acquiring said written-in RRO corrector parameter list for said track from said disk surface to recreate said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution, each for said track used for data access on said disk surface;
controlling actuation of said hard disk drive using said RRO corrector function for said track, based upon said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution, further comprising the steps:
calculating the RRO corrector filter based upon
said micro-actuator control contribution applied to a micro-actuator control queue,
said voice coil motor control contribution applied to a voice coil motor control queue, and
said voice coil motor plant contribution applied to a voice coil motor plant queue,
to create the RRO micro-actuator control corrector value, and the RRO voice coil assembly corrector value;

calculating the RRO corrector value as said RRO micro-actuator control corrector value added to said RRO voice coil assembly corrector value;
calculating the Position Error Signal (PES) post-RRO as the PES pre-RRO minus said RRO corrector value;
performing Non-Repeatable Run-Out (NRRO) control based upon said PES post-RRO and updating said micro-actuator control queue, said voice coil motor control queue, and said voice coil motor plant queue;
wherein said hard disk drives operates in a single stage actuation mode when said micro-actuator control queue is updated with zero and otherwise operates in a dual stage actuation mode.
9. The method of claim 8, wherein the step calculating said RRO corrector filter, further comprises the steps:
calculating said micro-actuator control contribution applied to a micro-actuator control queue to create the RRO micro-actuator control corrector value;
calculating said voice coil motor control contribution applied to a voice coil motor control queue to create the RRO voice coil motor control corrector value;
calculating said voice coil motor plant contribution applied to a voice coil motor plant queue to create the RRO voice coil motor plant corrector value; and
calculating the RRO voice coil assembly corrector value as said RRO voice coil motor control corrector value added to said RRO voice coil motor plant corrector value.
10. The method of claim 8, further comprising at least one member of the group consisting of the steps:
following said track in said single stage actuation mode; and
following said track in said dual stage actuation mode.
11. The method of claim 10, wherein the step following said track in said single stage actuation mode, further comprises the step:
following said track in said single stage actuation mode, when the micro-actuator is damaged.
12. The method of claim 8, wherein said parameters of said RRO corrector function, further include: at least one parameter for a micro-actuator plant contribution; and
wherein the step calculating said RRO corrector filter, further comprises the step:
calculating the RRO corrector filter based upon
said micro-actuator plant contribution applied to a micro-actuator plant queue,
said micro-actuator control contribution applied to a micro-actuator control queue,
said voice coil motor control contribution applied to a voice coil motor control queue, and
said voice coil motor plant contribution applied to a voice coil motor plant queue,
to create the RRO micro-actuator control corrector value, and the RRO voice coil assembly corrector value;

wherein the step performing NRRO control, further comprises the step:
updating said micro-actuator plant queue.
13. The method of claim 12, wherein the step calculating said RRO filter, further comprises the steps:
calculating said micro-actuator plant contribution applied to a micro-actuator plant queue to create the RRO micro-actuator plant corrector value;
calculating said micro-actuator control contribution applied to a micro-actuator control queue to create the RRO micro-actuator control corrector value;
calculating said voice coil motor control contribution applied to a voice coil motor control queue to create the RRO voice coil motor control corrector value;
calculating said voice coil motor plant contribution applied to a voice coil motor plant queue to create the RRO voice coil motor plant corrector value; and
calculating the RRO voice coil assembly corrector value as said RRO voice coil motor control corrector value added to said RRO voice coil motor plant corrector value added to said RRO micro-actuator plant corrector value.
14. The method of claim 8, wherein said hard disk drive includes a second micro-actuator further contributing to the lateral position of said read-write head to said track on said disk surface;
wherein said parameters of said RRO corrector function for said track on said disk surface, further include: at least one parameter for a second micro-actuator control contribution;
wherein the step acquiring said written-in RRO corrector parameter list, further comprises the step:
acquiring said written-in RRO corrector parameter list for said track from said disk surface to recreate said second micro-actuator control contribution for said track;
wherein the step calculating said RRO corrector filter, further comprises the step:
calculating said RRO corrector filter based upon
said second micro-actuator control contribution applied to a micro-actuator control queue,
said micro-actuator control contribution applied to a micro-actuator control queue,
said voice coil motor control contribution applied to a voice coil motor control queue, and
said voice coil motor plant contribution applied to a voice coil motor plant queue,
to create the RRO second micro-actuator control corrector value, said RRO micro-actuator control corrector value, and said RRO voice coil assembly corrector value;

wherein the step calculating said RRO corrector value, further comprises the step:
calculating said RRO corrector value as said RRO second micro-actuator control corrector value added to said RRO micro-actuator control corrector value added to said RRO: voice coil assembly corrector value;
wherein the step performing NRRO control, further comprises the step:
updating said second micro-actuator control queue;
wherein said hard disk drive operates in said single stage actuation mode when said micro-actuator control queue is updated with zero and said second micro-actuator control queue is updated with zero;
wherein said hard disk drive operates in said dual stage actuation mode when one of said micro-actuator control queue and said second micro-actuator control queue is updated with zero; and
wherein said hard disk drive operates in said triple stage actuation mode when both of said micro-actuator control queue and said second micro-actuator control queue are updated with non-zero.
15. The method of claim 14,
wherein the step calculating said RRO corrector filter, further comprises the step:
calculating based upon said second micro-actuator control contribution applied to said second micro-actuator control queue to create said RRO second micro-actuator control corrector value.
16. The hard disk drive implementing the method of claim 8, comprising:
a servo controller driving a micro-actuator to laterally position a slider near said track on said disk surface to update said micro-actuator control queue;
said servo controller driving said voice coil motor to laterally position said slider close to said track on said disk surface to update said voice coil motor control queue and said voice coil motor plant queue.
17. The hard disk drive of claim 16, wherein said servo controller, further comprises:
a servo computer accessibly coupled to a servo memory and directed by a servo program system, including program steps residing in said servo memory;
wherein said servo program system, comprises the program steps:
acquiring said written-in RRO corrector parameter list for said track from said disk surface to recreate said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution, each for said track used for data access on said disk surface; and
controlling actuation of said hard disk drive using said RRO corrector function for said track, based upon said voice coil motor control contribution, said voice coil motor plant contribution, and said micro-actuator control contribution.
18. The hard disk drive of claim 16, wherein said servo controller further comprises:
means for calculating the RRO corrector filter based upon
said micro-actuator control contribution applied to said micro-actuator control queue,
said voice coil motor control contribution applied to said voice coil motor control queue, and
said voice coil motor plant contribution applied to said voice coil motor plant queue,
to create said RRO micro-actuator control corrector value, and said RRO voice coil assembly corrector value;

means for calculating said RRO corrector value as said RRO micro-actuator control corrector value added to said RRO voice coil assembly corrector value;
means for calculating said Position Error Signal (PES) post-RRO as said PES pre-RRO minus said RRO corrector value; and
means for performing Non-Repeatable Run-Out (NRRO) control based upon said PES post RRO and updating said micro-actuator control queue, said voice coil motor control queue, and said voice coil motor plant queue.
19. The hard disk drive of claim 18, wherein at least one of said means includes at least one instance of at least one member of the group consisting of a computer, a finite state machine, an inferential engine, and a neural network.
20. The method of claim 1,
wherein said hard disk drive includes a second micro-actuator further contributing to the lateral position of said read-write head to said track on said disk surface;
wherein said method, further comprises the step:
determining a second micro-actuator control contribution to said RRO corrector function of said track on said disk surface; and
wherein said parameters of said RRO corrector function for said track on said disk surface, further include: at least one parameter for said second micro-actuator control contribution.
21. The method of claim 20, further comprising the step:
determining a second micro-actuator plant contribution to said RRO corrector function of said track on said disk surface.
22. The method of claim 21, wherein said parameters of said RRO corrector function, further include:
at least one parameter for said second micro-actuator plant contribution.

1. A DC to AC inverter having a circuit arrangement for limiting capacitor inrush current and fault currents and reducing electrical sparking at relay contacts, comprising: \u2014
a control processor for performing a predetermined sequence of start-up or shut-down steps;
DC to AC conversion circuitry controllable to be activated or deactivated by said control processor by enabling or disabling transistor switching;
input terminals for the connection of a DC power source;
output terminals for outputting AC power from said DC to AC conversion circuitry;
at least one output relay having at least one set of normally open contacts for connecting the output of said DC to AC conversion circuitry to said output terminals, said at least one output relay being controllable by said control processor;
a main power relay having at least one set of normally open contacts for connecting said DC power source from said input terminals to said DC to AC conversion circuitry, said main power relay being controllable by said control processor;
a start-up relay having at least one set of normally open contacts connected in series with an incandescent filament lamp, the series combination being connected in parallel with said at least one set of normally open contacts of said main power relay, said start-up relay being controllable by said control processor, and
a photodetector placed adjacent to said incandescent filament lamp for providing an indication to said control processor of whether said lamp is lit.
2. The DC to AC inverter of claim 1, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry to start attempting to convert DC power to AC power before a DC power input is applied via said main power relay or start-up relay.
3. The DC to AC inverter of claim 1, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition;
STEP 2: Activating said DC to AC conversion circuitry to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay, and
STEP 3: Controlling said start-up relay to close its contacts in order to apply DC power to the input of said DC to AC conversion circuitry through said incandescent filament lamp in order to limit any inrush or fault current to the magnitude of current passed by said incandescent filament lamp.
4. The DC to AC inverter of claim 1, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry in order to start up said DC to AC inverter according to a sequence including the following steps:
STEP 1: Ensuring that all relays are initially in the open condition;
STEP 2: Activating said DC to AC conversion circuitry to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay;
STEP 3: Controlling said start-up relay to close its contacts in order to apply DC power to the input of said DC to AC conversion circuitry through said incandescent filament lamp in order to limit any inrush or fault current to the current passed by said incandescent filament lamp;
STEP 4: Monitoring the output of said photodetector to determine that said incandescent filament lamp lit momentarily and then extinguished within a predetermined period of time, and
STEP 5: If and when the conditions in step 4 are fulfilled, controlling said main power relay to close its contacts, else if the conditions in step 4 are not fulfilled, controlling said start-up relay to the open condition and aborting start-up.
5. The DC to AC inverter of claim 1, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition;
STEP 2: Activating said DC to AC conversion circuitry to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay;
STEP 3: controlling said start-up relay and main power relay to apply DC power to the input of said DC to AC conversion circuitry;
STEP 4: Temporarily deactivating said DC to AC conversion circuitry by disabling said transistor switching;
STEP 5: Controlling said at least one output relay to the contact closed condition, and
STEP 6: Re-activating said DC to AC conversion circuitry by re-enabling transistor switching.
6. A safe start-up and shut-down circuit arrangement for use with a high power DC to AC inverter for converting power from a DC power source to AC power at an AC output, comprising: \u2014
A control processor for performing a predetermined sequence of start-up or shut-down steps;
DC to AC conversion circuitry including a DC-to-DC converter, said DC to AC conversion circuitry and said DC-to-DC converter being controllable to be activated or deactivated by said control processor by enabling or disabling transistor switching;
a main power relay having normally open contacts connected between a first polarity terminal of said DC power source and a corresponding polarity DC input of said DC to AC converter circuitry and said DC-to-DC converter, the main power relay contacts being controlled to open or close by said processor;
a double-throw start-up relay having a normally open contact, a normally closed contact and a common contact, the contacts being connected such that when the relay is energized, DC current flows from said first polarity DC power power source terminal through an incandescent filament lamp to said corresponding polarity DC input of said DC to AC converter circuitry and said DC-to-DC converter, and when the relay is not energized, said corresponding first polarity DC input of said DC to AC conversion circuitry and said DC-to-DC converter is connected through an incandescent filament lamp to the DC power source terminal of opposite polarity to said first polarity, the start-up relay being controlled by said processor;
at least one output relay having normally open contacts for connecting the AC output of said DC to AC conversion circuitry to a load, the at least one output relay being controlled by said processor, and
photodetection circuitry to provide an indication to said control processor of whether an incandescent filament lamp connected to said double-throw start-up relay is lit or not lit.
7. The DC to AC inverter of claim 6, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied via said main power relay or start-up relay.
8. The DC to AC inverter of claim 6, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay, and
STEP 3: Energizing said start-up relay to close its contacts in order to apply DC power to the input of said DC to AC conversion circuitry and said DC-to-DC converter while limiting any inrush or fault current to incandescent filament lamp current.
9. The DC to AC inverter of claim 6, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay;
STEP 3: Controlling said start-up relay to close its contacts in order to apply DC power to the input of said DC to AC conversion circuitry and said DC-to-DC converter while limiting any inrush or fault current to incandescent filament lamp current;
STEP 4: Monitoring the indication provided by said photodetection circuitry to determine that a lamp-lit indication was detected followed by a lamp-extinguished detection within a predetermined period of time, and
STEP 5: If and when the conditions in step 4 are fulfilled, controlling said main power relay to close its contacts, else if the conditions in step 4 are not fulfilled, controlling said start-up relay to the open condition and aborting start-up.
10. The DC to AC inverter of claim 6, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied via said main power relay or start-up relay;
STEP 3: controlling said start-up relay and main power relay to apply DC power to the input of said DC to AC conversion circuitry and said DC-to-DC converter while limiting inrush current to that of an incandescent filament lamp;
STEP 4: Temporarily deactivating said DC to AC conversion circuitry by disabling its transistor switching;
STEP 5: Controlling said at least one output relay to the contact closed condition, and
STEP 6: Re-activating said DC to AC conversion circuitry by re-enabling its transistor switching.
11. The DC to AC inverter of claim 6, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to shut down said DC to AC inverter according to a predetermined sequence including at least the following steps:
STEP 1: Deactivating said DC to AC conversion circuitry by disabling its transistor switching;
STEP 2: De-energizing said at least one output relay and said main power relay to the contact open condition;
STEP 3: De-energizing said start-up relay while monitoring the indication from said photodetection circuitry;
STEP 4: Determining that said photodetection circuitry provided a lamp-lit indication followed by a lamp-extinguished indication within a predetermined time period after de-energizing said start-up relay, and
STEP 5: Deactivating said DC to DC converter by disabling its transistor switching after said predetermined time period.
12. A safe start-up and shut-down circuit arrangement for use with a high power DC to AC inverter, comprising: \u2014
A control processor for performing a predetermined sequence of start-up or shut-down steps, including enabling or disabling transistor switching within said DC to AC converter circuitry;
DC to AC conversion circuitry including a DC-to-DC converter, said DC to AC conversion circuitry and said DC-to-DC converter being controllable to be activated or deactivated by said control processor by enabling or disabling transistor switching;
a main power relay having normally open contacts connected between a first polarity terminal of a DC power source and a corresponding polarity DC input of said DC to AC converter circuitry and said DC-to-DC converter, the main power relay contacts being controlled to open or close by said processor;
a double-throw start-up relay having a normally open contact, a normally closed contact and a common contact, the contacts being connected such that when the relay is energized, DC current flows from said first polarity DC power power source terminal through a current limiting device to said corresponding polarity DC input of said DC to AC converter circuitry and said DC-to-DC converter, and when the relay is not energized, said first corresponding DC input of said DC to AC conversion circuitry and said DC-to-DC converter is connected through a current limiting device to the DC power source terminal of opposite polarity to said first polarity, the start-up relay being controlled by said processor;
at least one output relay having normally open contacts for connecting the AC output of said DC to AC conversion circuitry to a load, the at least one output relay being controlled by said processor, and
current indication circuitry to provide indications to said control processor of whether any current limiting device connected to said double-throw start-up relay is passing current greater or less than predetermined thresholds.
13. The DC to AC inverter of claim 12, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay.
14. The DC to AC inverter of claim 12, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay, and
STEP 3: Controlling said start-up relay to close its contacts in order to apply DC power to the input of said DC to AC conversion circuitry and said DC-to-DC converter while constraining the magnitude of any inrush or fault current by a current limiting device.
15. The DC to AC inverter of claim 12, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay;
STEP 3: Controlling said start-up relay to close its contacts in order to apply DC power to the input of said DC to AC conversion circuitry and said DC-to-DC converter while constraining the magnitude of any inrush or fault current by a current limiting device;
STEP 4: Monitoring the current indication provided by said current indication circuitry to determine that the current in a current limiting device first exceeded a predetermined threshold and then fell below a predetermined threshold within a predetermined period of time, and
STEP 5: If and when the conditions in step 4 are fulfilled, controlling said main power relay to close its contacts, else if the conditions in step 4 are not fulfilled, controlling said start-up relay to the open condition and aborting start-up.
16. The DC to AC inverter of claim 12, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to start up said DC to AC inverter according to a sequence including at least the following steps:
STEP 1: Ensuring that all relays are initially in the open condition, and
STEP 2: Activating said DC to AC conversion circuitry and said DC-to-DC converter to start attempting to convert DC power to AC power before a DC input is applied from said main power relay or start-up relay;
STEP 3: controlling said start-up relay and main power relay to apply DC power to the input of said DC to AC conversion circuitry and said DC-to-DC converter while constraining the magnitude of any inrush or fault current by a current limiting device;
STEP 4: Temporarily deactivating said DC to AC conversion circuitry by disabling its transistor switching;
STEP 5: Controlling said at least one output relay to the contact closed condition, and
STEP 6: Re-activating said DC to AC conversion circuitry by re-enabling its transistor switching.
17. The DC to AC inverter of claim 12, further including: \u2014
Software for execution on said processor configured to control said start-up relay, said main power relay, said at least one output relay and the activation and deactivation of said DC to AC conversion circuitry and said DC-to-DC converter in order to shut down said DC to AC inverter according to a predetermined sequence including at least the following steps:
STEP 1: Deactivating said DC to AC conversion circuitry by disabling its transistor switching;
STEP 2: De-energizing said at least one output relay and said main power relay to the contact open condition;
STEP 3: De-energizing said start-up relay while monitoring the indication from said current indication circuitry;
STEP 4: Determining that said current indication circuitry provided an indication that current in a current limiting device first exceed a predetermined threshold and then fell below a predetermined threshold within a predetermined period of time after de-energizing said start-up relay, and
STEP 5: Deactivating said DC to DC converter by disabling its transistor switching after said predetermined time period.
18. The DC to AC inverter of claim 12 in which the term \u201ca current limiting device\u201d can include a device having an electrically resistive element having a much greater resistance when the temperature of the resistive element is high than when the temperature of the resistive element is low.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. An apparatus for rotatably driving a floor cloth employed in a suction assembly of a vacuum cleaner, the vacuum cleaner drawing in and collecting air and dust in a dust collecting chamber through an air path connecting a suction assembly to a connecting pipe by a negative pressure generated by an operation of a driving portion that is activated by manipulating a driving switch of a handle portion, the apparatus comprising:
a rotary member rotatably disposed on a lower end of the suction assembly, for supporting the floor cloth cleaning a cleaning surface;
rotary driving means on-off controlled by the manipulation of the driving switch, for supplying a driving force for rotating the rotary member in an on-state; and
power supplying means for supplying an electric signal from the manipulation of the driving switch to the rotary driving means.
2. The apparatus of claim 1, wherein the power supplying means is disposed in a separate space of the connecting pipe that is protected by a protective cover from the air path, and includes a power terminal electrically connected to the driving switch of the handle portion, and a power conductor for electrically connecting the power terminal to the power driving means.
3. The apparatus of claim 1, the rotary driving means includes a bi-directional rotary motor having a pair of rotary shaft portions formed on both sides of the rotary motor and simultaneously rotated with each other by the power supplied from the power supplying means, and a power transmission unit disposed for transmitting the driving force of the rotary shaft portions to the rotary member.
4. The apparatus of claim 3, wherein the power transmission unit includes a pair of worm gear members connected to the rotary shaft portions for being rotated in the same direction as the rotary shaft portions are rotated; and transmission gears meshed with the pair of worm gear members for converting a rotational force of the worm gear members into a perpendicular direction and transmitting the converted rotational force to the rotary member.
5. The apparatus of claim 4, wherein the worm gear members are connected to the rotary shaft portions by joint connecting members, respectively.
6. The apparatus of claim 4, wherein the worm gear members have threads formed on outer circumferences thereof in an opposite direction from each other, for being rotated in the opposite direction when the transmission gears are rotated.
7. The apparatus of claim 3, wherein the power transmission unit includes a transmission gears connected to the rotary member; and a worm gear member having a worm gear portion formed on the outer circumference of the worm gear member for being meshed with the transmission gear, and a key portion formed on one end of the worm gear member for being connected to the rotary shaft portion of the rotary driving means in a key way.
8. The apparatus of claim 7, wherein either the key portion or the rotary shaft portion has a key groove having a non-circular section formed on one end, while either the key portion or the rotary shaft portion without the key groove has a key portion that is formed on one end having corresponding shape to the key groove.
9. The apparatus of claim 7, wherein each of the worm gear members have threads formed on the outer circumference in an opposite direction so that the transmission gears can be rotated in the opposite direction.
10. The apparatus of claim 3, wherein the power transmission unit includes a transmission gears connected to the rotary member; and a worm gear member having a worm gear portion formed on the outer circumference of the worm gear member for being meshed with the transmission gear, and a connecting portion formed on one end of the worm gear member for being screwed to the rotary shaft portion of the rotary driving means.
11. The apparatus of claim 10, wherein either the connecting portion or the rotary shaft portion has a male thread formed on the outer circumference, while either the connecting portion or the rotary shaft portion without the male thread has a female thread formed on the end corresponding to the male thread.
12. The apparatus of claim 10, wherein the threads formed on the connecting portion and the rotary shaft portion are left-hand threads for screw-fastening when the rotary shaft portion is rotated on the rotary shaft in a clockwise direction.
13. The apparatus of claim 10, wherein the threads formed on the connecting portion and the rotary shaft portion are right-hand threads for screw-fastening when the rotary shaft portion is rotated on the rotary shaft in a counterclockwise direction.
14. The apparatus of claim 10, wherein the threads on the outer circumferences of the worm gear members are formed in an opposite direction so that the transmission gears are rotated in the opposite direction.
15. The apparatus of claim 1, further comprising a casing member formed in the suction assembly for enclosing the rotary driving means, thereby screening the rotary driving means from the air path of the suction assembly.
16. The apparatus of claim 15, wherein the casing member has a lower casing having openings formed on a bottom through which the transmission gears are directly connected to the rotary members, respectively, and a plurality of fixing means for rotatably supporting the worm gear members; and an upper casing connected to an upper portion of the lower casing for screening the rotary driving means mounted on the lower casing from the outside.
17. The apparatus of claim 1, further comprising removable means for removably supporting the floor cloth onto the rotary members.
18. The apparatus of claim 17, wherein the removable means includes at least one Velcro fastener disposed on a lower surface of the rotary members in a predetermined pattern.
19. The apparatus of claim 18, wherein the Velcro fastener is seated on a plurality of recesses formed on the lower surface of the rotary members around a center of rotation at a uniform distance from each other.
20. The apparatus of claim 18, wherein the Velcro fastener is disposed on the lower surface of the rotary member around the center of rotation at an angle of 120.
21. A floor cloth removably employed in a mounting portion at a lower end of a suction assembly of a vacuum cleaner, the floor cloth for mopping impurities on a cleaning surface, the floor cloth comprising:
a body contacting the cleaning floor;
a removable layer attached to an upper surface of the body, supportable by a binding force with removable means formed on the mounting portion; and
supporting means for improving cleaning efficiency by preventing deformation of the body and enabling easier contact against the cleaning surface, when the body contacts the cleaning surface.
22. The floor cloth of claim 21, wherein the body and the removable layer are connected with each other by an adhesive.
23. The floor cloth of claim 21, wherein the supporting means includes a supporting member disposed between the body and the removable layer, for recovering the body into an original shape, elastically.
24. The floor cloth of claim 23, wherein the supporting member is formed of a porous material capable of absorbing a liquid during a wet cleaning with respect to the cleaning surface.
25. The floor cloth of claim 21, wherein the supporting means includes a protruding pattern protruding from a lower surface of the body contacting the cleaning surface in a predetermined pattern.
26. The floor cloth of claim 25, wherein the protruding pattern includes a plurality of protruding lines protruding from the lower surface of the body contacting the cleaning surface in a linear pattern.
27. The floor cloth of claim 25, wherein the protruding pattern is formed of a fabric that is identical with the fabric of the body.