All The Claims

What is claimed is:

1. An optical information storage medium having a plurality of grooves and a plurality of lands alternately formed, each of said grooves and each of said lands functioning as recording tracks to form an information storage region, said optical information storage medium comprising:
a first header region having a plurality of first phase pits respectively formed on extensions of said plurality of lands; and
a second header region having a plurality of second phase pits respectively formed on extensions of said plurality of grooves;
wherein each of said grooves has an optical depth of about 38 where is the wavelength of a light beam to be used;
each of said first phase pits has an optical depth smaller than that of each of said grooves;
each of said second phase pits has an optical depth substantially equal to that of each of said grooves; and
said first header region and said second header region are shifted from each other along the extension of each of said grooves.
2. An optical information storage medium according to claim 1, wherein the optical depth of each of said first phase pits is set so that the polarities of push-pull signals obtained by the light beam directed on said first and second phase pits and diffracted in a direction perpendicular to a direction of movement of said first and second phase pits are opposite to each other between said first and second phase pits, and that the polarity of a push-pull signal in said first header region is the same as the polarity of a push-pull signal generated by each land.
3. An optical information storage medium according to claim 2, wherein each of said first phase pits has an effective optical depth of 8.
4. An optical information storage medium having a plurality of grooves and a plurality of lands alternately formed, each of said grooves and each of said lands functioning as recording tracks to form an information storage region, said optical information storage medium comprising:
a first header region having a plurality of first phase pits respectively formed on extensions of said plurality of lands; and
a second header region having a plurality of second phase pits respectively formed on extensions of said plurality of grooves;
wherein said first header region and said second header region are shifted from each other along an extension of each of said grooves;
each of said grooves has an optical depth of (2n1) 8 where A is the wavelength of a light beam to be used and n is a positive integer;
each of said first phase pits has an optical depth of (2n14m) 8 where m is an integer not less than 0;
each of said second phase pits has an optical depth of (2n14s)8 where s is an integer not less than 0; and
said n, m; and s are related so as to satisfy conditions of 2n14m>0 and 2n14s>0.
5. An optical information storage medium according to claim 4, wherein the optical depth of each of said second phase pits is smaller than that of each of said grooves.
6. An optical information storage medium having a plurality of first grooves and a plurality of lands alternately formed, each of said first grooves and each of said lands functioning as recording tracks to form an information storage region, said optical information storage medium comprising:
a plurality of second grooves respectively formed on extensions of said first grooves so as to continue to said first grooves, each of said second grooves having a width smaller than that of each of said first grooves;
a groove header region having a plurality of first phase pits respectively formed so as to overlap said plurality of second grooves; and
a land header region having a plurality of second phase pits respectively formed on extensions of said plurality of lands so that each of said second phase pits is interposed between any adjacent ones of said second grooves;
wherein said groove header region and said land header region are shifted from each other along the extension of each first groove;
all of said first grooves, said second grooves, and said first phase pits have the same optical depth of about (2n1)8 where is the wavelength of a light beam to be used and n is a positive integer;
each of said second phase pits has an effective optical depth of about (2m1)4 where m is a positive integer; and
said n and m are related so as to satisfy a condition of (2m1)4<(2n1)8.
7. An optical information storage medium according to claim 6, wherein:
the optical depths of all of said first grooves, said second grooves, and said first phase pits are set to about 38; and
the optical depth of each of said second phase pits is set to about 4.
8. An optical information storage medium according to claim 6, further comprising a common sector mark region having a plurality of sector marks as third phase pits respectively corresponding to said plurality of first grooves, each of said third phase pits having an optical depth equal to that of each of said first grooves and a width substantially equal to that of each of said first grooves.
9. An optical information storage medium according to claim 8, wherein said sector marks have front edges and rear edges both aligned in a direction perpendicular to an extension of each of said first grooves.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of calibrating a compensation element in a transmitter having an output, the method comprising:
configuring the transmitter to transmit in each of a plurality states;
for each of the plurality of states, setting a transmit power value to each of a plurality of transmit powers in a range of transmit powers supported by the transmitter;
for each of the plurality of states and each of the plurality of transmit powers:
while measuring a code channel power at a port of the transmitter output, adjusting digital gains of each activated code channel until desired values of total output power are measured at the output port;

when desired values of total output power are measured at the output port, saving the digital gains for use in mapping the digital gains to the desired values of total output powers.
2. The method of claim 1, wherein saving the digital gains comprises generating a look-up table for each of the plurality of states for mappings of total output powers to digital gains.
3. The method of claim 1, wherein saving the digital gains comprises generating a look-up table of mappings of total output powers to digital gains in which different columns of the look-up table comprise digital gains representing the digital gains for each of the plurality of states.
4. The method of claim 1 further comprising, prior to saving the digital gain values for use in mapping to the desired values of total output powers:
processing measured information to generate appropriate ranges of total output powers that map to a respective digital gain value.
5. The method of claim 1, wherein each state comprises a selection of a particular set of code channels from a set of possible code channels, and a selection of at least one of an encoding format, a signal format, and a data rate for at least one of the set of particular code channels.
6. The method of claim 1, wherein each state comprises at least one of:
a selection of a particular set of code channels from an available set;
a selection of a particular encoder format for at least one code channel;
a selection of a particular signal format for at least one code channel; and
a selection of a particular data rate for at least one code channel.
7. The method of claim 1, wherein the code channels are CDMA code channels.
8. The method of claim 1 used for calibrating a single transmitter.
9. The method of claim 1 used for calibrating a batch of transmitters that do not have significant unit to unit variation.
10. A method of calibrating a compensation element in a transmitter having an output, the method comprising:
configuring the transmitter to transmit in each of a plurality states;
for each of the plurality of states, setting a transmit power value to each of a plurality of transmit powers in a range of transmit powers supported by the transmitter;
for each of the plurality of states and each of the plurality of transmit powers:
while measuring code channel powers of each activated code channels at a port of the transmitter output:
determining a first digital gain for each activated code channel, representative of a nominal gain to produce a code channel power at a port of the transmitter output;
adjusting digital gains of each activated code channel until desired values of total output power are measured at the output port;

determining a difference between an adjusted digital gain resulting in the desired value of total output power and the first digital gain to obtain a differential digital gain for each activated code channel;

saving the differential digital gains, for use in mapping to the differential digital gains, in conjunction with a nominal gain, to desired values of total output powers.
11. The method of claim 10 wherein saving the differential digital gains comprises generating a look-up table for each of the plurality of states for mappings of total output powers to differential digital gains.
12. The method of claim 10 wherein saving the differential digital gains comprises generating a look-up table of mappings of total output powers to differential digital gains in which different columns of the look-up table comprise differential digital gains representing the differential digital gains for each of the plurality of states.
13. The method of claim 10, wherein the code channels are CDMA code channels.
14. The method of claim 10 used for calibrating a single transmitter.
15. The method of claim 10 used for calibrating a batch of transmitters that do not have significant unit to unit variation.
16. A computer-readable medium having computer readable instructions stored thereon for implementation by a computer processor for implementing a method comprising:
configuring the transmitter to transmit in each of a plurality states;
for each of the plurality of states, setting a transmit power value to each of a plurality of transmit powers in a range of transmit powers supported by the transmitter;
for each of the plurality of states and each of the plurality of transmit powers:
while measuring a code channel power at a port of the transmitter output, adjusting digital gains of each activated code channel until desired values of total output power are measured at the output port;

when desired values of total output power are measured at the output port, saving the digital gains for use in mapping the digital gains to the desired values of total output powers.
17. A computer-readable medium having computer readable instructions stored thereon for implementation by a computer processor for implementing a method comprising:
configuring the transmitter to transmit in each of a plurality states;
for each of the plurality of states, setting a transmit power value to each of a plurality of transmit powers in a range of transmit powers supported by the transmitter;
for each of the plurality of states and each of the plurality of transmit powers:
while measuring code channel powers of each activated code channels at a port of the transmitter output:
determining a first digital gain for each activated code channel, representative of a nominal gain to produce a code channel power at a port of the transmitter output;
adjusting digital gains of each activated code channel until desired values of total output power are measured at the output port;

determining a difference between an adjusted digital gain resulting in the desired value of total output power and the first digital gain to obtain a differential digital gain for each activated code channel;

saving the differential digital gains, for use in mapping to the differential digital gains, in conjunction with a nominal gain, to desired values of total output powers.

1. A frame rate conversion circuit comprising:
selection circuitry that receives a plurality of video signals and selects a video signal of the plurality of video signals;
a scaler positioning module that routes a first video signal path through a first scaler and a second video signal path through a second scaler, the scaler positioning module comprising:
a first scaler slot positioned within the first video signal path and configured to receive the selected video signal; and
a second scaler slot positioned within the second video signal path and configured to receive a video signal retrieved from storage, wherein the first scaler is coupled to the first scaler slot and the second scaler is coupled to the second scaler slot;

wherein the first scaler is configured to:
scale the selected video signal;
write the scaled selected video signal to a memory via a memory interface; and
output the scaled selected video signal to a first input of a selector; and

wherein the second scaler is configured to:
read the scaled selected video signal from the memory via the memory interface;
further scale the read scaled selected video signal; and
provide the further scaled selected video signal to a second input of the selector.
2. The frame rate conversion circuit of claim 1, wherein the second scaler is configured to output the read scaled selected video signal.
3. The frame rate conversion circuit of claim 1, wherein the scaler positioning module configures placement of a tearless control module in one of the first and second video signal paths.
4. The frame rate conversion circuit of claim 1, wherein the scaler positioning module outputs a scaled selected video signal to a blank time optimizer.
5. A scaler positioning module comprising:
three scaler positioning slots;
a first scaler; and
a second scaler, wherein the scaler positioning module is operative to selectively:
position a selected one of the first scaler and second scaler in a first scaler positioning slot, by routing a first signal path comprising the first scaler positioning slot through the selected scaler, to synchronously scale an input video signal;
position a selected one of the first scaler and second scaler in a second scaler positioning slot, by routing a second signal path comprising the second scaler positioning slot through the selected scaler, to down-scale the input video signal and write the down-scaled video signal to a memory; and
position a selected one of the first scaler and second scaler in a third scaler positioning slot, by routing a third signal path comprising the third scaler positioning slot through the selected scaler, to up-scale a video signal read from the memory.
6. The scaler positioning module of claim 5, wherein the scaler in the first scaler positioning slot locks the input video signal to an output video signal.
7. The scaler positioning module of claim 5, further comprising selection circuitry that receives scaled data from the scaler in at least one of the slots and selectively outputs the scaled data from the scaler positioning module.
8. The scaler positioning module of claim 7, further comprising a write FIFO buffer and a read FIFO buffer, wherein the scaler in a first one of the slots writes the scaled data to the memory via the write FIFO buffer and the scaler in a second one of the slots reads the scaled data from the memory via the read FIFO buffer.
9. The scaler positioning module of claim 8, wherein the selection circuitry receives the read scaled data from the read FIFO buffer and selectively outputs the read scaled data from the scaler positioning module output.
10. A method for performing frame rate conversion comprising:
receiving a plurality of video signals;
selecting a video signal of the plurality of video signals;
routing a first video signal path comprising a first scaler slot through a first scaler, wherein the first scaler slot is configured to receive the selected video signal;
routing a second video signal path comprising a second scaler slot through a second scaler, wherein the second scaler slot is configured to receive a video signal retrieved from storage; and
scaling the selected video signal, wherein the scaled first selected video signal is output to a blank time optimizer.
11. The method of claim 10, further comprising writing the scaled selected video signal to a memory via a memory interface.
12. The method of claim 11, further comprising providing the scaled selected video signal to a first input of a selector.
13. The method of claim 12, further comprising:
reading the scaled selected video signal from the memory via the memory interface;
further scaling the read scaled selected video signal; and
providing the further scaled selected video signal to a second input of the selector.
14. The method of claim 13, further comprising outputting the read scaled selected video signal.
15. The method of claim 11, further comprising configuring placement of a tearless control module within one of the first and second video signal paths.
16. The method of claim 10, further comprising selecting a second of the plurality of video signals, scaling the second selected video signal, and outputting the scaled second selected video signal.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A compound of formula 1 or a pharmaceutically acceptable salt or hydrate:
wherein:
X is N;
Y is O or S;
W is N;
R1, R2, and R3 each independently is hydrogen or halogen;
R4, R5, and R6 each independently is hydrogen, halogen, C1\u02dcC8 straight or branched alkyl, \u2014C1-C8 straight or branched alkoxy, nitro, cyano, \u2014COOR7, \u2014CH2\u2014O\u2014R8, \u2014CH2 COOR7, or \u2014COR7;
Each R7 independently is hydrogen or C1\u02dcC8 straight or branched alkyl; and
R8 is hydrogen or cyano.
2. The compound according to claim 1, having formula III:
wherein:
W is N;
R1, R2, and R3 each independently is hydrogen or halogen;
R4, R5, and R6 each independently is hydrogen, halogen, C1-C8 straight or branched alkyl, C1-C8 straight or branched alkoxy, nitro, cyano, \u2014COOR7, \u2014CH2\u2014O\u2014R8, \u2014CH2COOR7, or \u2014COR7;
each R7 independently is hydrogen or C1-C8 straight or branched alkyl; and
R8 is hydrogen or cyano.
3. The compound according to claim 1, wherein said compound is selected from the group consisting of:
6-{2-4-(3,6-dichloropyridazin-4-yl)piperazin-1-yl-ethoxy}-nicotinic acid ethyl ester, and
6-{2-4-(3,6-dichloropyridazin-4-yl)piperazin-1-yl-ethoxy}-nicotinic acid methyl ester.
4. A pharmaceutical composition, comprising at least one of the compounds of the formula I or a pharmaceutically acceptable salt according to claim 1 as well as one or more pharmaceutically acceptable carriers or excipients.