1. A polishing method comprising;
a process of preparing a substrate having
an interlayer insulating layer carrying a surface composed of a concave portion and a convex portion,
a barrier layer coating the interlayer insulating layer along its surface, and
a conductive substance layer filling the concave portion to coat the barrier layer,
a first polishing process of polishing the conductive substance layer to expose the barrier conductor layer on the convex portion of the interlayer insulating layer and the conductive substance layer filling the concave portion of the interlayer insulating layer,
a second polishing process of polishing the exposed barrier layer and the exposed conductive substance layer on the concave portion to expose the convex portion of the interlayer insulating layer, the barrier layer coating the concave portion of the interlayer insulating layer and the conductive substance layer filling the concave portion while feeding a polishing slurry, and
a third polishing process of over polishing a part of the convex portion of the interlayer insulating layer,
wherein the polishing slurry comprises a surfactant, a metal oxide dissolving agent and water.
2. The polishing method according to claim 1, wherein the second polishing process and the third polishing process are conducted in one step.
3. The polishing method according to claim 1, wherein the surfactant is at least one selected from nonionic surfactants and anionic surfactants.
4. The polishing method according to claim 1, wherein the surfactant is at least one selected from perfluoroalkanesulfonic acids and derivatives thereof.
5. The polishing method according to claim 1, wherein the surfactant is contained in a proportion of 0.00001 to 20 wt %.
6. The polishing method according to claim 1, wherein the polishing slurry further comprises an organic solvent.
7. The polishing method according to claim 1, wherein the polishing slurry further comprises abrasive, wherein the surface of the abrasive is modified with an alkyl group.
8. A polishing method comprising:
a process of preparing a substrate having
an interlayer insulating layer carrying a surface composed of a concave portion and a convex portion,
a barrier layer coating the interlayer insulating layer along its surface, and
a conductive substance layer filling the concave portion to coat the barrier layer,
a first polishing process of polishing the conductive substance layer to expose the barrier conductor layer on the convex portion of the interlayer insulating layer and the conductive substance layer filling the concave portion of the interlayer insulating layer,
a second polishing process of polishing the exposed barrier layer and the exposed conductive substance layer on the concave portion to expose the convex portion of the interlayer insulating layer, the barrier layer coating the concave portion of the interlayer insulating layer and the conductive substance layer filling the concave portion while feeding a polishing slurry, and
a third polishing process of over polishing a part of the convex portion of the interlayer insulating layer,
wherein the polishing slurry comprises an organic solvent, a metal oxide dissolving agent and water.
9. The polishing method according to claim 8, wherein the second polishing process and the third polishing process are conducted in one step.
10. The polishing method according to claim 8, wherein the polishing slurry further comprises abrasive, wherein the surface of the abrasive is modified with an alkyl group.
11. A polishing method comprising:
a process of preparing a substrate having
an interlayer insulating layer carrying a surface composed of a concave portion and a convex portion,
a barrier layer coating the interlayer insulating layer along its surface, and
a conductive substance layer filling the concave portion to coat the barrier layer,
a first polishing process of polishing the conductive substance layer to expose the barrier conductor layer on the convex portion of the interlayer insulating layer and the conductive substance layer filling the concave portion of the interlayer insulating layer,
a second polishing process of polishing the exposed barrier layer and the exposed conductive substance layer on the concave portion to expose the convex portion of the interlayer insulating layer, the barrier layer coating the concave portion of the interlayer insulating layer and the conductive substance layer filling the concave portion while feeding a polishing slurry, and
a third polishing process of over polishing a part of the convex portion of the interlayer insulating layer,
wherein the polishing slurry comprises abrasive, wherein the surface of the abrasive is modified with an alkyl group, and water.
12. The polishing method according to claim 11, wherein the second polishing process and the third polishing process are conducted in one step.
13. The polishing method according to claim 11, wherein said abrasive, wherein the surface of the abrasive is modified with an alkyl group, is at least one selected from silica, alumina, ceria, titania, zirconia and germania, wherein the surface is modified with an alkyl group.
14. The polishing method according to claim 11, wherein the polishing slurry further comprises a metal oxide dissolving agent.
15. The polishing method according to claim 11, wherein the polishing slurry further comprises at least one selected from a surfactant an organic solvent.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A solid-state imaging device comprising:
an imaging pixel region where a plurality of imaging pixels is disposed;
a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns;
charge integrating amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns;
holding elements that allow the input pixel signals to be held in the charge integrating amps even in periods when the charge integrating amps are in a standby state; and
a horizontal selecting circuit for transferring pixel signals output from the respective charge integrating amps by a horizontal signal line,
wherein,
the charge integrating amps have feedback capacitors implemented by variable capacitors.
2. A solid-state imaging device comprising:
an imaging pixel region where a plurality of imaging pixels is disposed;
a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns;
amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns;
a plurality of horizontal signal lines;
a horizontal selecting circuit for assigning pixel signals held by the amps of the respective columns to the plurality of horizontal signal lines so that the pixel signals are transferred by the plurality of horizontal signal lines; and
a multiplexer for sequentially selecting the plurality of horizontal signal lines to generate serial data including output pixel signals based on the pixel signals transferred by the plurality of horizontal signal lines,
wherein,
shielding lines that are based on a reference potential of the multiplexer are provided between the plurality of horizontal signal lines.
3. A solid-state imaging device comprising:
an imaging pixel region where a plurality of imaging pixels is disposed;
a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns;
amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns;
a plurality of horizontal signal lines;
a horizontal selecting circuit for assigning pixel signals held by the amps of the respective columns to the plurality of horizontal signal lines so that the pixel signals are transferred by the plurality of horizontal signal lines;
a multiplexer for sequentially selecting the plurality of horizontal signal lines to generate serial data including output pixel signals based on the pixel signals transferred by the plurality of horizontal signal lines; and
a reference-potential generating unit for generating a reference potential based on a black level of the pixel signals output through the horizontal signal lines, wherein the reference potential is used as a reference potential for an output amp of the multiplexer.
4. A solid-state imaging device comprising:
an imaging pixel region where a plurality of imaging pixels is disposed;
a vertical selecting circuit for outputting pixel signals from imaging pixels of respective columns on a selected row of the imaging pixel region to vertical signal lines provided respectively for the columns;
amps provided respectively for the vertical signal lines of the columns so as to receive inputs of pixel signals from imaging pixels of the respective columns;
a plurality of horizontal signal lines; and
a horizontal selecting circuit for assigning pixel signals held by the amps of the respective columns to the plurality of horizontal signal lines so that the pixel signals are transferred by the plurality of horizontal signal lines,
wherein,
the amps are charge integrating amps, the charge integrating amps having feedback capacitors implemented by variable capacitors.