1460766123-f1cef6d6-7ca2-42d5-a209-c40402a485e3

1. A method for debugging an integrated circuit (IC), comprising method operations of:
defining an on-chip random access memory (RAM) to function as a read only memory (ROM) boot memory;
detecting initiation of a debug mode;
transitioning the on-chip RAM memory to function as a RAM memory while in debug mode to accept writes to the on-chip RAM memory;
modifying contents of the on-chip RAM memory;
terminating the debug mode; and
transitioning the on-chip RAM memory to function as a ROM boot memory.
2. The method of claim 1, wherein the method operation of transitioning the on-chip RAM memory to function as a RAM memory further includes,
issuing a signal enabling access to modify the contents of the on chip RAM memory.
3. The method of claim 2 wherein the signal is a write enable signal.
4. The method of claim 1, wherein the method operation of modifying the contents of the on-chip RAM memory includes,
writing to the contents of the on-chip RAM memory through a Joint Test Action Group (JTAG) debug module, the JTAG debug module being connected to the on-chip RAM memory; and
incorporating software breakpoints to the contents of the on-chip RAM memory.
5. The method of claim 1, wherein the method operation of detecting initiation of a debug mode includes,
recognizing a software breakpoint.
6. The method of claim 1, further comprising:
resetting a microprocessor of the IC after transitioning the on-chip RAM memory to function as a ROM memory; and
executing the modified contents of the on-chip RAM memory through the microprocessor during a boot sequence of the microprocessor.
7. The method of claim 1, wherein the method operation of detecting initiation of a debug mode includes,
executing a break instruction to trigger the transitioning of the on chip RAM memory to function as a RAM memory.
8. A tangible computer readable medium having program instructions for debugging an IC, comprising:
program instructions for defining an on-chip RAM memory to function as ROM boot memory;
program instructions for detecting initiation of a debug mode;
program instructions for transitioning the on-chip RAM memory to function as a RAM memory while in debug mode to accept writes to the on-chip memory;
program instructions for modifying contents of the on-chip RAM memory; and
program instructions for terminating the debug mode and the modification capability of the on-chip RAM memory.
9. The tangible computer readable medium of claim 8, wherein the program instructions for transitioning the on-chip RAM memory includes,
program instructions for issuing a signal enabling modification of the contents of the on-chip RAM memory.
10. The tangible computer readable medium of claim 9 wherein the signal is a write enable signal.
11. The tangible computer readable medium of claim 8, wherein the program instructions for modifying the contents of the on-chip RAM memory includes,
program instructions for writing to the contents of the on-chip RAM memory through Joint Test Action Group (JTAG) debug module; and
program instructions for incorporating software breakpoints to the contents of the on-chip RAM memory.
12. The tangible computer readable medium of claim 8, wherein the program instructions for detecting initiation of a debug mode includes,
program instructions for recognizing a software breakpoint.
13. The tangible computer readable medium of claim 8, further comprising:
program instructions for resetting a microprocessor of the IC after terminating the debug mode; and
program instructions for executing the modified contents of the on-chip RAM memory during a boot sequence of the microprocessor.
14. The tangible computer readable medium of claim 8, wherein the program instructions for detecting initiation of a debug mode includes,
program instructions for executing a break instruction to trigger the transitioning of the on-chip RAM memory.
15. An integrated circuit (IC), comprising:
a microprocessing unit (MPU);
a memory region acting as a read only memory in a first state; and
a Joint Test Action Group (JTAG) debug module able to detect a breakpoint causing an interruption of a processing sequence executed by the MPU, the JTAG debug module is in communication with the memory region, the JTAG debug module having write control circuitry to control writes to the memory region, the write control circuitry issuing a signal enabling the memory region to transition to a second state where the memory region acts as a RAM memory to accept data from the MPU in response to the breakpoint occurring.
16. The IC of claim 15, wherein the JTAG debug module includes hardware breakpoint circuitry, the hardware breakpoint circuitry issuing the breakpoint in response to instructions being executed by the MPU.
17. The IC of claim 15, further comprising:
switch fabric enabling a data pathway between the MPU and the memory region.
18. The IC of claim 15, further comprising:
a control line from the write control circuitry to the memory region for carrying the signal to transition the memory region between the first state and the second state.
19. The IC of claim 15, wherein the JTAG debug module includes a random access memory region.
20. The IC of claim 15, wherein the JTAG debug module interfaces with a host system for debugging the IC through 4 JTAG leads, the 4 JTAG leads controlled through a JTAG software hub, the JTAG software hub receiving signals from an integrated development environment (IDE) module.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A wireless charger system for battery pack solution, comprising:
a wireless charger apparatus 10 for receiving a power source from the outside to transmit a power signal via a charging power transmitter block 15 in a wireless mode; and
a battery pack 20 for receiving a power signal from the wireless charger apparatus 10 in a wireless mode to charge power in a battery cell and supplying a power source to a portable terminal block 30,
wherein the wireless charger apparatus 10 has an outer body composed of a resonant converter for supplying power to the battery pack 20 and a wireless charger case 101 having a central controller installed inside,
wherein the wireless charger case 101 has a protruded round portion 102 formed around the rear edge and a display block 19 provided as a slop surface in the front portion 103 thereof,
wherein a flat surface is formed between the protruded round portion 102 and the front portion 103 and a battery pack positioning block 104 formed therein, the battery pack positioning block 104 having a lower height than the protruded round portion 102 and the front portion 103, and
wherein a primary core block 151 for transmitting power supplied to the battery pack 20 is installed inside the battery pack positioning block 104 to supply power to the battery pack 20 disposed on the battery pack positioning block 104.
2. The wireless charger system according to claim 1, wherein the wireless charger apparatus 10 comprises:
a power receiver block 12 for receiving a power source from the outside;
a resonant converter 14 for converting an output signal including a power signal and a data signal supplied from the power receiver block 12 and transmitting the converted output signal to a charging power transmitter block 15 provided with a primary core block 151;
a gate driver 13 coupled to the power receiver block 12 to transmit an output signal including a data signal and a power signal to the resonant converter 14, the gate driver being controlled by the central controller 11 and provided with a bootstrap gate drive;
a current detector block 16 coupled between the power receiver block 12 and the resonant converter 14 to detect a data signal of the battery pack 20 through the transmission operation by means of the primary core block 151;
a central controller 11 for controlling the power receiver block 12, the resonant converter 14, the gate driver 13 and the current detector block 16; and
a display block 19 for displaying a state of the wireless charger apparatus 10 according to the control signal of the central controller 11.
3. The wireless charger system according to claim 1, wherein the battery pack 20 comprises:
a secondary rectification circuit block 22 for converting a power that is induced through a secondary core block 21 by an induced magnetic field generated by a primary core block 151 of the wireless charger apparatus 10;
a battery pack controller 24 coupled to the secondary rectification circuit block 22 to supply a charging power to a battery cell 23, to process data transmittedreceived by the primary core block 151 and the secondary core block 21 and to transmit data signals for a charging state of the battery pack 20, an erroneous state of the battery pack 20 and a native ID signal value;
a battery pack charging circuit block 25 for supplying power to the battery cell 23, the power being supplied from the secondary rectification circuit block 22 under the control of the battery pack controller 24, and supplying a power of the battery cell 23 to the portable terminal block 30;
a data inputoutput block 26 for transmittingreceiving data tofrom a portable terminal block 30 under the control of the battery pack controller 24 relative to the data transmittedreceived tofrom the wireless charger apparatus 10, and processing the data; and
a charge monitoring circuit block 27 for checking a charging level of the battery cell 23 and transmitting a fully-charged or discharged signal to the battery pack controller 24.
4. The wireless charger system according to claim 3, wherein the secondary core block 21 has a core formed in a shape selected from the group consisting of a round shape, a rectangular shape, an oval shape and a polygonal shape,
wherein the battery pack 20 is attachabledetachable tofrom the portable terminal block 30 and has an all-in-one hard pack shape in which a power source stored in the battery cell 23 is connected to a terminal block 28,
wherein the secondary core block 21 is formed integrally in the rear of the portable terminal block 30 and has a built-in shape in which a circuit configuration of the battery pack 20 is configured inside the portable terminal block 30 together, or
wherein the battery cell 23 is formed in the battery pack 20 and has a battery pack charging circuit block 34 coupled through the terminal block 28, the battery pack charging circuit block 34 being provided inside the portable terminal block 30.
5. The wireless charger system according to claim 1, wherein the display block 19 comprises:
a display signal receiver block 191 for receiving a control signal transmitted from the central controller 11;
a light emitting diode (LED) 192, a liquid crystal display (LCD) panel 193 and an icon LCD 194, all of which are turned on according to the control signal transmitted from the central controller 11;
an LED driver 195 coupled to the display signal receiver block 191 to turn on the LED 192 according to the control signal transmitted from the central controller 11;
an LCD panel driver 196 coupled to the display signal receiver block 191 to turn on the LCD panel 193 according to the control signal transmitted from the central controller 11; and
an icon LCD driver 197 coupled to the display signal receiver block 191 to turn on the icon LCD 194 according to the control signal transmitted from the central controller 11.
6. The wireless charger system according to any one of claims 1 to 5, wherein the battery pack 20 comprises:
a charge receiver module 212 having a secondary core block 210 coiled therein;
shielding plates 214, 215, 216, 217 and 218 surrounding the bottom, the front, the rear and the left and right sides of the charging battery cell 213 and made of Al, Cu, or Ni Alloy metals to protect the charging battery cell 213 from the magnetic field;
a magnetic plate 29 provided between the shielding plates 214 and the charge receiver module 212 and containing ferrites, Mn\u2014Zn (50 parts by weight:50 parts by weight), Ni\u2014Fe (80 parts by weight:20 parts by weight), or fine metals (Fe\u2014Si\u2014Cu\u2014Nb) to induce an induced magnetic field into the secondary core block 210;
an insulating plate 211 formed between the shielding plates 214 and the charging battery cell 213 and formed of mesh made of NI\u2014Cu or an insulator to transfer heat of the shielding plates 214 to the charging battery cell 213, the insulator being able to emit heat and decrease thermal conductivity; and
a shielding member 219 surrounding a wireless power receiver circuit 223 of the battery pack including a battery pack controller 24 and a charging circuit block 25 and including Al, Cu, or Ni Alloy metals to shield the magnetic field for the wireless power receiver circuit,
wherein the magnetic plate 29 includes an upper magnetic plate 291 formed between the shielding plates 214 and the charge receiver module 212; an a lower magnetic plate 292 disposed in a lower portion of the charge receiver module 212.
7. The wireless charger system according to any one of claims 1 to 5, wherein the battery pack 20 includes a magnetic plate 29 that is a primary shielding member and a shield mesh member 294 that is a secondary shielding member, both of the shielding members being formed between a battery cell case 213\u2032 of the battery cell 213 and the secondary core block 210, and the magnetic plate 29 and the shield mesh member 294 contain ferrites, Mn\u2014Zn (50 parts by weight:50 parts by weight), Ni\u2014Fe (80 parts by weight:20 parts by weight), or fine metals (Fe\u2014Si\u2014Cu\u2014Nb) and the shield mesh member 294 is formed in a mesh shape.
8. A method for controlling a wireless charger system for battery pack solution, comprising a wireless charger apparatus 10 for receiving a power source from the outside to transmit a power signal via a charging power transmitter block 15 in a wireless mode; and a battery pack 20 for receiving a power signal from the wireless charger apparatus 10 in a wireless mode to charge power in a battery cell and supplying a power source to a portable terminal block 30, the method comprising:
waiting for charging of an externally supplied power source by checking a state of the wireless charger apparatus prior to performing a wireless charging through the charging power transmitter block 15 of the wireless charger apparatus 10 (S01);
transmitting a call signal for native ID of the battery pack 20 to sense the battery pack 20 through the charging power transmitter block 15 of the wireless charger apparatus 10 (S02);
transmitting information on a native ID value and a state of the battery pack via the secondary core block 21 of the battery pack 20 by receiving a call signal of the native ID transmitted from the wireless charger apparatus 10 in the battery pack 20, the native ID value being store in a native ID transmission block 241 of the battery pack 20 (S03);
determining the native ID value of the battery pack transmitted from the battery pack 20 and the state of the battery pack 20 (S04);
charging a power in the battery pack 20 by receiving a power via the charging power transmitter block 15 of the wireless charger apparatus 10 when the battery pack 20 is ready to be charged (S05);
sensing a completely charged signal in the wireless charger apparatus 10 when the completely charged signal is transmitted from the battery pack 20 in the step of charging the battery pack (S06); and
waiting for reception of the information on the charging level and the battery pack state from the battery pack 20 by suspending a charging operation in the central controller 11 of the wireless charger apparatus 10 when the information on the completely charged signal is received from the battery pack 20 (507).