1. A storage apparatus comprising:
a controller unit that has a memory unit for temporarily storing data sent from a host computer in response to an arbitrary write request from the host computer and that controls input and output of the data; and
a hard disk drive unit that is connected to the controller unit and stores the data;
wherein the controller unit performs the following:
giving each data block, which is a data constituent unit, an identification number indicating that the relevant data has been sent from the host computer in response to the arbitrary write request from the host computer;
storing, in the memory unit, a storage location in the hard disk drive unit to store the data, as well as the identification number, as an expected value, for the data to be stored in the hard disk drive unit; and
in response to a read request from the host computer, comparing the identification number given to each data block, the constituent unit of the data read from the hard disk drive unit, with the expected value of the read data, thereby verifying that the read data is the data that was written to the hard disk drive in response to the arbitrary write request,
wherein the identification number given to each data block is composed of a position code indicating that the relevant data block is the top block, a middle block, or the last block of data sent from the host computer in response to one write request from the host computer; and an identifier indicating that the relevant data has been sent from the host computer in response to one write request from the host computer; and
wherein the controller unit executes the following:
verifying a sequence of the position code in a data block group that constitutes the read data; and
comparing the identifier of the data block group with the expected value for the read data, thereby verifying that the read data is the data that was written in response to the arbitrary write request,
wherein the memory unit is configured so that local memory units are respectively connected to cache memory and shared memory; and
the memory unit performs the following:
storing the identification number of a data block group accessed by the host computer, from among a plurality of data block groups constituting the data, as write sequence number information, in an arbitrary local memory unit and the cache memory; and
storing a generation number for managing the number of times the write sequence number information from among the data is updated, in the arbitrary local memory unit and the shared memory; and
wherein the controller unit performs the following:
acquiring, from the shared memory, the most recent generation number of the write sequence number information constituting the read data;
searching the arbitrary local memory unit or the cache memory for the write sequence number corresponding to the most recent generation number; and
if the write sequence number corresponding to the most recent generation number does not exist in the arbitrary local memory unit, changing the generation number managed by the arbitrary local memory unit to become identical to the most recent generation number managed by the shared memory, and then setting the identifier stored in the arbitrary local memory unit as the expected value.
2. The storage apparatus according to claim 1, wherein the controller unit performs the following:
searching the arbitrary local memory unit or the cache memory for the write sequence number information corresponding to the most recent generation number; and
if the write sequence number information corresponding to the most recent generation number is not stored in either the arbitrary local memory unit or the cache memory, reading the write sequence number information corresponding to the most recent generation number from the hard disk drive.
3. The storage apparatus according to claim 2, wherein the memory unit manages the cache memory and the shared memory as one memory unit,
the local memory units are respectively connected via a switch unit to the cache memory and the shared memory, and
the switch unit writes and reads the data.
4. A data verification method for a storage apparatus including a controller unit that has a memory unit for temporarily storing data sent from a host computer in response to an arbitrary write request from the host computer and that controls input and output of the data; and a hard disk drive unit that is connected to the controller unit and stores the data;
wherein the data verification method comprises the steps executed by the controller unit of:
giving each data block, which is a data constituent unit, an identification number indicating that the relevant data has been sent from the host computer in response to an arbitrary write request from the host computer;
storing, in the memory unit, a storage location in the hard disk drive unit to store the data, as well as the identification number, as an expected value, for the data to be stored in the hard disk drive unit; and
in response to a read request from the host computer, comparing the identification number given to each data block, the constituent unit of the data read from the hard disk drive unit, with the expected value of the read data, thereby verifying that the read data is the data written to the hard disk drive in response to the arbitrary write request,
wherein the identification number given to each data block is composed of: a position code indicating that the relevant data block is the top block, a middle block, or the last block of data sent from the host computer in response to one write request from the host computer; and an identifier indicating that the relevant data has been sent from the host computer in response to one write request from the host computer; and
wherein the data verification method further comprises the steps executed by the controller unit of:
verifying a sequence of the position code in a data block group constituting the read data; and
comparing the identifier of the data block group with the expected value for the read data, thereby verifying that the read data is the data that was written in response to the arbitrary write request,
wherein the memory unit is configured so that local memory units are respectively connected to cache memory and shared memory; and
the data verification method further comprises the steps executed by the memory unit of:
storing the identification number of a data block group accessed by the host computer, from among a plurality of data block groups constituting the data, as write sequence number information, in an arbitrary local memory unit and the cache memory; and
storing a generation number for managing the number of times the write sequence number information from among the data is updated, in the arbitrary local memory unit and the shared memory; and
wherein the data verification method further comprises the steps executed by the controller unit of:
acquiring, from the shared memory, the most recent generation number of the write sequence number information constituting the read data;
searching the arbitrary local memory unit or the cache memory for the write sequence number corresponding to the most recent generation number; and
if the write sequence number corresponding to the most recent generation number does not exist in the arbitrary local memory unit, changing the generation number managed by the arbitrary local memory unit to become identical to the most recent generation number managed by the shared memory, and then setting the identifier stored in the arbitrary local memory unit as the expected value.
5. The data verification method according to claim 4, further comprising the steps executed by the controller unit of:
searching the arbitrary local memory unit or the cache memory for the write sequence number information corresponding to the most recent generation number; and
if the write sequence number information corresponding to the most recent generation number is not stored in either the arbitrary local memory unit or the cache memory, reading the write sequence number information corresponding to the most recent generation number from the hard disk drive.
6. The data verification method according to claim 5, wherein the memory unit manages the cache memory and the shared memory as one memory unit, and the local memory units are respectively connected via a switch unit to the cache memory and the shared memory; and
wherein the data verification method further comprises a step executed by the switch unit of writing and reading the data.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A nitride semiconductor light emitting device comprising:
a substrate for growing nitride semiconductor of a hexagonal crystal structure;
a first nitride semiconductor layer of a first conductivity type formed above the substrate;
an active layer formed on the first nitride semiconductor layer for emitting light when current flows;
a second nitride semiconductor layer of a second conductivity type opposite to the first conductivity type, formed on the active layer;
texture formed above at least a partial area of the second nitride semiconductor layer and having a plurality of protrusions of a pyramid shape, each of the protrusions including a lower layer made of nitride semiconductor doped with impurities of the second conductivity type and an upper layer made of nitride semiconductor not intentionally doped with impurities; and
a transparent electrode covering surfaces of the second nitride semiconductor layer and the texture.
2. The nitride semiconductor light emitting device according to claim 1, wherein said nitride semiconductor is AlxInyGazN(0\u2266x\u22661, 0\u2266y\u22661, 0<z\u22661, x+y+z=1) having a crystal structure of hexagonal symmetry.
3. The nitride semiconductor light emitting device according to claim 1, wherein said plurality of protrusions of a pyramid shape are disposed in a distributed manner on said second nitride semiconductor layer.
4. The nitride semiconductor light emitting device according to claim 3, wherein said plurality of protrusions of a pyramid shape are disposed in a distributed dispersively at a constant pitch on said second nitride semiconductor layer.
5. The nitride semiconductor light emitting device according to claim 4, wherein said plurality of protrusions of a pyramid shape are disposed in a close-packed confuguration on said second nitride semiconductor layer.
6. The nitride semiconductor light emitting device according to claim 1, wherein a height of said lower layer is 0.3\xd7height of said protrusion or higher.
7. The nitride semiconductor light emitting device according to claim 6, wherein a height of said lower layer is 0.4\xd7height of said protrusion or higher.
8. The nitride semiconductor light emitting device according to claim 1, wherein a relation of Sc\u2267(3\xb7312)8\xb7L2 is satisfied where Sc is an area of side walls of said lower layer and L is a length of diagonal line of a hexagon constituting a bottom surface of said protrusion.
9. The nitride semiconductor light emitting device according to claim 1, wherein a pitch between said protrusions of said texture satisfies a relation of p>L2\xb7((tan \u03b3)2\u22121) where \u03b3 is an angle between a side wall and a bottom surface of said protrusion and L is a length of a diagonal line of a hexagon constituting the bottom surface.
10. The nitride semiconductor light emitting device according to claim 1, wherein:
a pitch p between said protrusions satisfies a relation of 3124\xb7tan \u03b3(1\u2212(1\u2212cos \u03b3)12)((tan \u03b3)2\u22121)\xb7L\u2266p\u2266L2\xb7((tan \u03b3)2\u22121) where \u03b3 is an angle between a side wall and a bottom surface of said protrusion and L is a length of a diagonal line of a hexagon constituting the bottom surface;
a height h of said lower layer satisfies a relation of
3124\xb7tan \u03b3(1\u2212(1\u2212cos \u03b3)12)\xb7L\u2266h\u2266p(cos \u03b3sin \u03b3)(1\u2212(cos \u03b3sin \u03b3)2.
11. A method for manufacturing a nitride semiconductor light emitting device, comprising steps of:
a) preparing a substrate for growing nitride semiconductor of a hexagonal crystal structure;
b) growing a first nitride semiconductor layer of a first conductivity type formed above said substrate;
c) growing an active layer formed on said first nitride semiconductor layer for emitting light when current flows;
d) growing a second nitride semiconductor layer of a second conductivity type opposite to the first conductivity type on said active layer;
e) forming an inorganic insulating mask having openings for selective growth, on a surface of said second nitride semiconductor layer;
f) growing a lower layer of a prism shape made of nitride semiconductor of the second conductivity type on said second nitride semiconductor layer exposed in the openings of said inorganic insulating mask; and
g) growing an upper layer of a prism shape continuous with said lower layer made of nitride semiconductor intentionally not doped with impurities on said lower layer of the prism shape, said lower layer and said upper layer forming a plurality of protrusions of the prism shape.
12. The method for manufacturing a nitride semiconductor light emitting device according to claim 11, wherein said nitride semiconductor is AlxInyGazN (0\u2266x\u22661, 0\u2266y\u22661, 0<z\u22661, x+y+z=1) having a crystal structure of hexagonal symmetry, and said steps b), c), d), f) and g) are performed by MOCVD.
13. The method for manufacturing a nitride semiconductor light emitting device according to claim 12, wherein said step g) is performed at a same substrate temperature as a substrate temperature at said step f).
14. The method for manufacturing a nitride semiconductor light emitting device according to claim 11, wherein said openings are circular.
15. The method for manufacturing a nitride semiconductor light emitting device according to claim 14, wherein said openings are disposed dispersively.
16. The method for manufacturing a nitride semiconductor light emitting device according to claim 15, wherein said openings are disposed at a constant pitch.
17. The method for manufacturing a nitride semiconductor light emitting device according to claim 16, wherein said openings are distributed in a close-packed configuration.
18. The method for manufacturing a nitride semiconductor light emitting device according to claim 11, wherein a relation of Sc\u2267(3\xb7312)8\xb7L2 is satisfied where Sc is an area of side walls of said lower layer and L is a length of diagonal line of a hexagon constituting a bottom surface of said protrusion.
19. The method for manufacturing a nitride semiconductor light emitting device according to claim 1, wherein a pitch between said protrusions of said texture satisfies a relation of p>L2\xb7((tan \u03b3)2\u22121) where \u03b3 is an angle between a side wall and a bottom surface of said protrusion and L is a length of a diagonal line of a hexagon constituting the bottom surface.
20. The method for manufacturing a nitride semiconductor light emitting device according to claim 11, wherein:
a pitch p between said protrusions satisfies a relation of 3124\xb7tan \u03b3(1\u2212(1\u2212cos \u03b3)12)((tan \u03b3)2\u22121)\xb7L\u2266p\u2266L2\xb7((tan \u03b3)2\u22121) where \u03b3 is an angle between a side wall and a bottom surface of said protrusion and L is a length of a diagonal line of a hexagon constituting the bottom surface;
a height h of said lower layer satisfies a relation of 3124\xb7tan \u03b3(1\u2212(1\u2212cos \u03b3)12)\xb7L\u2266h\u2266p(cos \u03b3sin \u03b3)(1\u2212(cos \u03b3sin \u03b3)2.