1. A test socket for testing electrical characteristics of a semiconductor device by connecting probes, arranged in a grid-like form, with outer connecting terminals of the semiconductor device, arranged in a grid-like form, and electrically connecting the probes with the outer connecting terminals comprising:
a connecting sheet, made of an elastically deformative insulating material, and having electrodes for electrically connecting the probes to the outer connecting terminals of the semiconductor device; and
a guiding member having holes at positions corresponding to the outer connecting terminals of the semiconductor device and overlapping the connecting sheet.
2. A test socket having a circuit board, which transmits an electrical signal for testing electrical characteristics of a semiconductor device to outer connecting terminals of the semiconductor device, arranged in a grid-like form, and receives the electrical signal from the outer connecting terminals, and transmits the electrical signal to a testing equipment and receives the electrical signal from the testing equipment, comprising:
a connecting sheet, made of an elastically deformative insulating member and having electrodes for electrically connecting the circuit board with the outer connecting terminals of the semiconductor device; and
a guiding member having holes at positions corresponding to the outer connecting terminals of the semiconductor device and overlapping the connecting sheet.
3. The test socket according to claim 1,
wherein the electrodes of the connecting sheet, being in contact with the outer connecting terminals of the semiconductor device, have a spaced portion and a bending portion, and
the bending portion is in contact with the outer connecting terminal of the semiconductor device.
4. The test socket according to claim 2,
wherein the electrodes of the connecting sheet, being in contact with the outer connecting terminals of the semiconductor device, have a spaced portion and a bending portion, and
the bending portion is in contact with the outer connecting terminal of the semiconductor device.
5. The test socket according to claim 1,
wherein a through hole is formed in a part of the connecting sheet.
6. The test socket according to claim 2,
wherein a through hole is formed in a part of the connecting sheet.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for sharing a decoder among a plurality of data streams comprising:
decoding data samples from a first data stream in said plurality of data streams, thereby putting the decoder in a first state when it last decodes said data samples from said first data stream;
storing N data samples processed from said first data stream in a decoder re-processing buffer before decoding data from one or more other data streams in said plurality;
decoding data from one or more other data streams in said plurality, thereby putting the decoder in a second state; and
decoding again said N data samples stored in said decoder re-processing buffer to restore said decoder to said first state prior to processing any new data samples from said first data stream.
2. The method as in claim 1 further comprising:
temporarily storing a plurality of accumulator values associated with said first data stream in an accumulator buffer; and
restoring said accumulator values prior to replaying said N data samples stored in said decoder re-processing buffer.
3. The method as in claim 2 wherein N accumulator values are stored in said accumulator buffer and associated with said first data stream.
4. The method as in claim 1 wherein said decoder is a forward-error correction (\u201cFEC\u201d) decoder.
5. The method as in claim 1 wherein said decoder is a maximum likelihood decoder.
6. The method as in claim 1 wherein said decoder is a convolutional decoder.
7. The method as in claim 1 wherein said decoder is a Viterbi decoder.
8. The method as in claim 7 wherein N is a particular Viterbi trellis depth.
9. The method as in claim 1 wherein said data streams are from different satellite transponders.
10. The method as in claim 1 wherein said data streams are from different cable carriers.
11. A replay method of context switching a decoder comprising:
decoding a first set of data from a first data stream to generate a first plurality of decoded data, said decoder being in a first state after decoding said first set of data;
temporarily storing said first set of data in a buffer;
decoding other sets of data from one or more other streams, thereby putting the decoder in a second state after decoding said other sets of data;
restoring said decoder to said first state by re-decoding said first set of data from said buffer; and
decoding a second set of data from said first data stream after said decoder is restored to said first state.
12. The method as in claim 11 further comprising:
temporarily storing said second set of data in a buffer said second set of data being usable to restore said decoder to said second state after said decoder has decoded additional data from said one or more other streams.
13. The method as in claim 11 further comprising:
temporarily storing a plurality of accumulator values associated with said first data stream in an accumulator buffer; and
restoring said accumulator values prior to replaying said first set of data stored in said buffer.
14. The method as in claim 11 wherein said decoder is a forward error correction (\u201cFEC\u201d) decoder.
15. The method as in claim 11 wherein said decoder is a Viterbi decoder.
16. The method as in claim 11 wherein said first and second data streams are transmitted from first and second transponders, respectively.
17. A system comprising:
an error-correction decoder for decoding data from a plurality of data streams;
data replay means for restoring said decoder to a state it was in when it previously decoded data from each respective data stream, before decoding new data from each respective data stream, wherein said data replay means comprises a replay buffer for temporarily storing pluralities of data from each respective data stream, said pluralities of data being usable by said data replay means to restore said decoder to a state it was in when it previously decoded data from each respective data stream.
18. The system as in claim 17 further comprising:
accumulator storage means for temporarily storing accumulator values associated with each respective data stream.
19. The system as in claim 18 wherein the number of accumulator values associated with each data stream are equivalent in number to a number of data samples from each data stream stored in said replay buffer.
20. The system as in claim 17 wherein said decoder is a Viterbi decoder.
21. The system as in claim 17 wherein said decoder is a Turbo Code decoder.
22. The system as in claim 17 wherein each of said data streams contains data from a different satellite transponder.
23. The system as in claim 17 further comprising:
one or more additional decoders for decoding a plurality of additional data streams; and
additional data replay logic for restoring said decoders to previous states when said decoders previously decoded data from each respective data stream, before said decoders decode new data from each respective data stream.
24. An integrated circuit (IC), said IC comprising:
a decoder for decoding data symbols from a first data stream among a plurality of input data streams and from one or more other data streams among the plurality of data streams, wherein the decoder is in a first state when the decoder last decodes data symbols from said first data stream, and wherein the decoder is in a second state when the decoder last decodes data symbols from said one or more other data streams among said plurality;
a decoder re-processing buffer for storing N data symbols processed from said first data stream before decoding data from one or more other data streams in said plurality; and
decoder re-processing logic to re-process said N data symbols stored in said decoder re-processing buffer and thereby restore said decoder to said first state prior to processing any new data symbols from said first data stream.
25. The integrated circuit as in claim 24 further comprising:
accumulator storage logic to temporarily store a plurality of accumulator values associated with said first data stream in an accumulator buffer; and
accumulator restoration logic to restore said accumulator values prior to replaying said N data samples stored in said decoder re-processing buffer.
26. The integrated circuit as in claim 25 wherein N accumulator values are stored in said accumulator buffer and associated with said first data stream.
27. The integrated circuit as in claim 24 wherein said decoder is a forward-error-correction (\u201cFEC\u201d) decoder.
28. The integrated circuit as in claim 24 wherein said decoder is a maximum likelihood decoder.
29. The integrated circuit as in claim 24 wherein said decoder is a convolutional decoder.
30. The integrated circuit as in claim 24 wherein said decoder is a Viterbi decoder.
31. The integrated circuit as in claim 30 wherein N is a particular Viterbi trellis depth.
32. The integrated circuit as in claim 24 wherein said data streams are from different satellite transponders.
33. The integrated circuit as in claim 24 wherein said data streams are from different cable carriers.