1460771941-22cf3ea8-dc62-435d-a5dd-9273135acbed

1. A printed circuit board (PCB) to prevent electrostatic discharge, the PCB comprising: a plurality of layers; two overlapped circular insulated members embedded in the plurality of layers; and two vias each comprising a layer of metal coated on an inner wall of a corresponding insulated member and a through hole bounded by the corresponding insulated member; wherein an acute angle between two tangents which pass through a point of intersection of the insulated members is greater than an angle corresponding to a desired minimum time to failure of the PCB, wherein the desired minimum time is equal to 830 seconds.
2. The PCB of claim 1, wherein the plurality of layers comprises a power layer, a dielectric layer, and a ground layer.
3. The PCB of claim 1, wherein the layer of metal is copper.
4. The PCB of claim 1, wherein the layer of metal is tin.
5. A method for manufacturing a printed circuit board (PCB) to prevent electrostatic discharge, comprising: forming a plurality of layers; forming two overlapped circular insulated members to embed in the plurality of layers; and forming two vias each comprising a layer of metal coated on an inner wall of a corresponding insulated member and a through hole bounded by the corresponding insulated member to form an acute angle between two tangents which pass through a point of intersection of the insulated members greater than an angle corresponding to a desired minimum time to failure of the PCB, wherein the desired minimum time is equal to 830 seconds.
6. The method of claim 5, wherein the plurality of layers is formed by stacking a power layer, a dielectric layer, and a ground layer.
7. The method of claim 5, wherein the layer of metal is formed by copper.
8. The method of claim 5, wherein the layer of metal is formed by tin.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of controlling power consumption of an integrated circuit, said method comprising the steps of:
executing an operating system computer program including at least one execution point corresponding to an execution event to be logged;
upon execution of said at least one execution point, triggering execution of observation code operable to store in an event data store event data characterizing one or more parameters associated with said execution event;
independently of execution of said at least one execution point, triggering execution of response code operable to read said event data from said event data store and in dependence upon said event data to generate one or more power control commands; and
in response to said one or more power control commands, controlling power consumption of said integrated circuit.
2. A method as claimed in claims 1, wherein execution of said response code is triggered by a timer monitored by said operating system computer program.
3. A method as claimed in claim 1, wherein said event data includes one or more of:
a timestamp;
a task identifier of a currently executing task;
a currently set performance level of said integrated circuit;
an identifier of an execution event corresponding to said event data; and
an indication of whether a currently executing task is an idle task.
4. A method as claimed in claim 1, wherein power consumption of said integrated circuit is controlling by varying one or more of:
operating voltage; and
clock speed.
5. A method as claimed in claim 1, wherein said operating system computer program is operable to schedule execution of one or more application computer programs and said power consumption is controlled to give a substantially minimum level of processing performance required to meet processing requirements of one or more currently executing application computer programs.
6. A method as claimed in claim 1, wherein execution of said execution point triggers execution of power management kernel code operable to determine which of a plurality of instances of observation code are associated with said execution point and to trigger execution of those instances of observation code associated with said execution point.
7. A method as claimed in claim 6, wherein each instance of observation code has an associated instance of response code and all instances of response code are triggered to execute from the same stimulus.
8. An integrated circuit comprising:
a processor operable to execute an operating system computer program including at least one execution point corresponding to an execution event to be logged;
observation logic operable upon execution of said at least one execution point to store in an event data store event data characterizing one or more parameters associated with said execution event;
response logic operable independently of execution of said at least one execution point to read said event data from said event data store and in dependence upon said event data to generate one or more power control commands; and
a power controller responsive to said one or more power control commands to control power consumption of said integrated circuit.
9. A computer program product comprising a computer readable storage medium including computer readable instructions for controlling an integrated circuit executing an operating system computer program including at least one execution point corresponding to an execution event to be logged, said computer program product comprising:
observation code triggered upon execution of said at least one execution point to store in an event data store event data characterizing one or more parameters associated with said execution event;
response code triggered independently of execution of said at least one execution point to read said event data from said event data store and in dependence upon said event data to generate one or more power control commands; and
power command generating code operable in response to said one or more power control commands to control power consumption of said integrated circuit.