1. A method for transmitting AcknowledgementNegative-Acknowledgement (ACKNACK) state information to a base station (BS) at a user equipment (UE) in a wireless communication system, the method comprising:
receiving two or more transmission blocks through two or more downlink component carriers from the BS; and
transmitting information on a number of ACK responses among ACKNACK responses corresponding to each of the two or more transmission blocks through a single uplink component carrier to the BS.
2. The method of claim 1, wherein the information on the number of ACK responses is transmitted by using two or more Physical Uplink Control CHannel (PUCCH) resources included in the single uplink component carrier.
3. The method of claim 1, wherein the information on the number of ACK responses is transmitted by using a Physical Uplink Control CHannel (PUCCH) resource included in the single uplink component carrier.
4. The method of claim 1, wherein the information on the number of ACK responses further indicates a case where at least one downlink assignment for the two or more transmission blocks has been missed at the UE.
5. A user equipment comprising:
a receiving module configured to receive two or more transmission blocks through two or more downlink component carriers from a base station; and
a transmitting module configured to transmit information on a number of Acknowledgement (ACK) responses among ACKNegative-Acknowledgement (NACK) responses corresponding to each of the two or more transmission blocks through a single uplink component carrier to the base station.
6. The user equipment of claim 5, wherein the information on the number of ACK responses is transmitted by using two or more Physical Uplink Control CHannel (PUCCH) resources included in the single uplink component carrier.
7. The user equipment of claim 5, wherein the information on the number of ACK responses is transmitted by using a Physical Uplink Control CHannel (PUCCH) resource included in the single uplink component carrier.
8. The user equipment of claim 5, wherein the information on the number of ACK responses further indicates a case where at least one downlink assignment for the two or more transmission blocks has been missed at the UE.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed:
1. A method of producing a semiconductor device comprising the steps of:
a) providing a semiconductor substrate having a surface;
b) forming a layer of gate electrode material above said surface of said substrate;
c) forming a resist feature above said layer of said gate electrode material, said resist feature having a lateral dimension;
d) reducing the lateral dimension of said resist feature; and
e) patterning at least said layer of gate electrode material using said resist feature with said reduced lateral dimension.
2. The method according to claim 1, wherein said resist feature comprises thermo-variable material.
3. The method according to claim 2, wherein reducing the lateral dimension of the resist feature comprises shrinking of said thermo-variable resist feature by heat-treatment.
4. The method according to claim 1, wherein reducing the lateral dimension of the resist feature comprises etching the resist feature in an etch-process with an isotropic etchant.
5. The method according to claim 4, wherein said etch-process comprises said isotropic etchant comprising an etch reactivity inhibitor.
6. The method according to claim 5, wherein said isotropic etchant is selected to etch the resist feature.
7. The method according to claim 4, wherein said isotropic etchant is a dry etchant comprising a plasma of reactive etching material and an etch-rate inhibitor.
8. The method according to claim 7, wherein said isotropic etchant comprises iodine-containing and oxygen-containing plasmas.
9. The method according to claim 8, wherein said plasmas comprise hydrogen iodide.
10. The method according to claim 9, wherein said plasmas are generated by inductively coupled plasma sources.
11. The method according to claim 10, wherein an etch selectivity layer is provided over surface regions otherwise exposed by the patterned resist feature to provide increased etch selectivity between the resist feature and the otherwise exposed semiconductor substrate.
12. The method according to claim 1, wherein reducing the lateral dimension of the resist feature comprises etching the resist feature in an etch-process with an etchant comprising at least hydrogen.
13. The method according to claim 7, wherein said etchant comprises bromine-containing, chlorine-containing, or fluorine-containing plasmas.
14. A method of producing a semiconductor device comprising:
a) providing a semiconductor substrate having an anti-reflective coating layer and a surface over said anti-reflective coating layer;
b) forming a layer of gate electrode material above said surface;
c) forming a resist feature above said layer of said gate electrode material, said resist feature having a lateral dimension;
d) reducing the lateral dimension of said resist feature by etching said resist feature during a plasma etch-process, comprising hydrogen iodide and oxygen plasmas, having an etch-rate in said lateral direction; and
e) patterning at least said layer of gate electrode material using said resist feature with said reduced lateral dimension.
15. The method according to claim 14, wherein said plasma etch-process is provided with hydrogen iodide having a first gas flow rate and with oxygen having a second gas flow rate, whereby said first gas flow rate and said second gas flow rate have a ratio between approximately 20 to 1 and 3 to 1.
16. The method according to claim 14, wherein said etch-rate has a value between approximately 0.8 nms and 3 nms.
17. The method according to claim 14, wherein said etch-rate is approximately 10 to 20 times higher for said resist feature than for said anti-reflective coating layer.