1. A method of ensuring metadata cache coherence of a shared file that is simultaneously accessed by multiple hosts including a first host and one or more other hosts, the first host modifying a metadata of the shared file, the shared file being associated with a lock having a data field for storing a version number, comprising the steps of:
comparing, by the first host, the version number stored in the data field of the lock with a version number that is locally cached within the first host;
if the version numbers match, incrementing the version number and storing the incremented version number in the data field of the lock; and
after said storing, modifying the metadata of the shared file, incrementing the version number once more in response to said modifying, and storing the incremented version number in the data field of the lock.
2. The method of claim 1, wherein after said storing, waiting for a predetermined amount of time before modifying the metadata of the shared file.
3. The method of claim 2, wherein each of the other hosts is configured to carry out the step of comparing once per a time period, and the predetermined amount of time equals n multiplied by a length of the time period, where n is an integer greater than 1.
4. The method of claim 2, wherein each of the other hosts is configured to block IO operations to the shared file upon detecting that the version number stored in the data field of the lock does not match a locally cached version number.
5. The method of claim 2, wherein each of the other hosts is configured to unblock IO operations to the shared file upon detecting that the version number stored in the data field of the lock is two greater than a locally cached version number.
6. The method of claim 5, wherein each of the other hosts is further configured to update the metadata of the shared file cached therein upon detecting that the version number stored in the data field of the lock is two greater than a locally cached version number.
7. The method of claim 1, wherein said comparing is performed using a compare-and-write command.
8. A method of ensuring metadata cache coherence of a shared file that is simultaneously accessed by multiple hosts, comprising the steps of:
storing a first value in a predetermined storage location to indicate that the metadata of the shared file is being modified;
determining from a counter value whether or not all other hosts that are accessing the shared file recognize that the metadata of the shared file is being modified, wherein the counter value is initialized to be equal to the number of hosts that are simultaneously accessing the shared file, and the counter value is decremented each time one of the hosts recognizes that the metadata of the shared file is being modified; and
upon determining that all other hosts that are accessing the shared file recognize that the metadata of the shared file is being modified, modifying the metadata of the shared file and storing a second value in the predetermined storage location to indicate that the metadata of the shared file is no longer being modified.
9. The method of claim 8, wherein the predetermined storage location is a logical block number associated with a lock of the shared file.
10. The method of claim 8, wherein each of the hosts, other than a host that is carrying out the metadata modification, is configured to carry out the step of determining once per a first time period, whether or not a value stored in the predetermined storage location is equal to the second value.
11. The method of claim 10, wherein each of the hosts, other than a host that is carrying out the metadata modification, is configured to block IO operations to the shared file upon detecting that the value stored in the predetermined storage location is not equal to the second value.
12. The method of claim 10, wherein each of the hosts, other than a host that is carrying out the metadata modification, is configured to block IO operations to decrement the counter value upon detecting that the value stored in the predetermined storage location is not equal to the second value.
13. The method of claim 10, wherein after a second time period equal to n multiplied by the first time period has elapsed after said modifying, where n is an integer greater than 1, determining if an additional metadata modification to the shared file is permitted.
14. The method of claim 8, wherein each of the hosts, other than a host that is carrying out the metadata modification, is configured to unblock IO operations to the shared file upon detecting that the value stored in the predetermined storage location is equal to the second value.
15. The method of claim 14, wherein each of the hosts, other than a host that is carrying out the metadata modification, is further configured to update the metadata of the shared file cached therein upon detecting that the value stored in the predetermined storage location is equal to the second value.
16. A method of ensuring metadata cache coherence of shared files, each of which is simultaneously accessed by multiple hosts, comprising the steps of:
designating a first one of the multiple hosts as a lock manager for a first shared file; and
designating a second one of the multiple hosts as a lock manager for a second shared file,
wherein the lock manager for a shared file grants a write lock to a modifier host to permit the modifier host to change metadata of the shared file and notifies other hosts that are accessing the shared file of the write lock grant.
17. The method of claim 16, wherein each of the other hosts is configured to block IO operations to the shared file upon receiving notification of the write lock grant to the modifier host.
18. The method of claim 17, wherein the lock manager for the shared file notifies the other hosts that are accessing the shared file that the metadata changes have been completed.
19. The method of claim 18, wherein each of the other hosts is configured to unblock IO operations to the shared file and update the metadata of the shared data cached therein upon receiving notification that the metadata changes have been completed.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A flash memory device comprising:
a memory cell array comprising a plurality of memory cells respectively connected to a plurality of bit line pairs and a plurality word lines;
a peri circuit unit for programming data into the memory cell array or reading data stored in the memory cell array in response to a command input through a control bus;
an IO controller for receiving data for programming and supplying the data to the peri circuit unit in response to a command provided through a data inputoutput (IO) bus; and
a controller for controlling the IO controller to perform a voltage setup operation for a program operation while the data for programming is received.
2. The flash memory device of claim 1, wherein the peri circuit unit comprises:
a X decoder for selecting the word lines of the memory cell array according to an address input through the IO controller;
a voltage supply unit for providing an operating voltage for programming or reading data into or from the memory cells;
a plurality of page buffer circuits corresponding to the plurality of bit line pairs, and configured to program or read data into or from the memory cells; and
Y decoder circuits corresponding to the plurality of page buffer circuits and a data IO line, and configured to transmit the data for program to the page buffer circuits or read data to the data IO line, wherein the data for programming to the page buffer circuits or read data is transmitted from the page buffer circuits.
3. The flash memory device of claim 1, wherein the IO controller receives a program operation command code, address information of a memory cell on which a program will be performed, and data to be programmed into the memory cell.
4. The flash memory device of claim 3, wherein the address information includes column address information and row address information.
5. The flash memory device of claim 3, wherein the IO controller controls voltage setup for the program operation using the address information received by the IO controller.
6. The flash memory device of claim 5, wherein the voltage setup operation is controlled to perform row voltage and word line voltage setup using row address information included in the address information.
7. A method of programming a flash memory device, the method comprising:
receiving address information comprising column and row addresses in response to a program command;
storing data for programming in a page buffer in response to a write enable bar signal;
while the data for programming is stored in the page buffer beginning from a point where a row address is input, performing a voltage setup operation including row voltage setup, block selection, and word line voltage setup; and
after performing the voltage setup operations and storing the data for programming in the page buffer, performing a program operation.
8. The method of claim 7, wherein receiving the address information includes:
receiving a column address of a memory cell for a program; and
receiving a row address of the memory cell.
9. The method of claim 8, wherein performing the voltage setup operation includes:
setting up a row voltage using the row address;
selecting a block including the memory cell for the program; and
setting up a word line voltage of the memory cell using the row address.
10. The method of claim 7, further comprising discharging the setup voltage after performing the program operation.