1. A method for controlling power change for a semiconductor module, comprising:
providing a thermal interface material in the semiconductor module; wherein the thermal interface material is positioned between components of the semiconductor module and the thermal interface material is selected from the group consisting of: a thermal paste, a thermal adhesive, a thermal grease, a phase change material, and a liquid metal interface; wherein deterioration, or extrusion out though gaps between the components of the semiconductor module, of the thermal interface material is reduced;
providing a full power state for the semiconductor module; and
directly changing power for the semiconductor module by one of applying power to the semiconductor module and reducing power from the semiconductor module between a lower power state and the full power state over a predetermined time period to reduce a strain rate of the thermal interface material.
2. The method of claim 1, wherein the changing step comprises applying power from the lower power state to the full power state over the predetermined time period to reduce the swain rate of the thermal interface material.
3. The method of claim 1, wherein the changing step comprises reducing power from the full power state to the lower power state over the predetermined time period to reduce the strain rate of the thermal interface material.
4. The method of claim 1, wherein the changing step comprises changing power in a linear fashion or incrementally between the lower power state and the full power state over the predetermined time period.
5. The method of claim 1, wherein the predetermined time period is approximately 30 seconds to 5 minutes.
6. The method of claim 1, wherein the lower power state is selected from the group consisting of a zero power state, a nap state and a sleep state, and wherein the semiconductor module is selected from the group consisting of a single chip module and a multichip module.
7. A method for applying power to or draining power from a semiconductor module, comprising:
providing a thermal interface material in the semiconductor module; wherein the thermal interface material is positioned between components of the semiconductor module and the thermal interface material is selected from the group consisting of: a thermal paste, a thermal adhesive, a thermal grease, a phase change material, and a liquid metal interface; wherein deterioration, or extrusion out through gaps between the components of the semiconductor module, of the thermal interface material is reduced;
providing a full power state for the semiconductor module; and
directly applying power to the semiconductor module from a lower power state to the full power state or removing power from the semiconductor module from the full power state to the lower power state over a predetermined time period to reduce a strain rate of the thermal interface material.
8. The method of claim 7, wherein the power is applied to or removed from the semiconductor module in a linear fashion over the predetermined time period.
9. The method of claim 7, wherein power is applied to or removed from the semiconductor module incrementally over the predetermined time period.
10. The method of claim 7, wherein the lower power state is selected from the group consisting of a zero power state, a nap state and a sleep state, and wherein the semiconductor module is selected from the group consisting of a single chip module and a multichip module.
11. A semiconductor module comprising a thermal interface material, wherein the thermal interface material is positioned between components of the semiconductor module and the thermal interface material is selected from the group consisting of: a thermal paste, a thermal adhesive, a thermal grease, a phase change material, and a liquid metal interface; wherein deterioration, or extrusion out through gaps between the components of the semiconductor module, of the thermal interface material is reduced; wherein power is directly changed by one of applying power to the semiconductor module and reducing power from the semiconductor module between a lower power state and a full power state over a predetermined time period to reduce a strain rate of the thermal interface material.
12. The semiconductor module of claim 11, wherein the power is applied from the lower power state to the full power state over the predetermined time period to reduce the strain rate of the thermal interface material.
13. The semiconductor module of claim 11, wherein the power is reduced from the full power state to the lower power state over the predetermined time period to reduce the strain rate of the thermal interface material.
14. The semiconductor module of claim 11, wherein the power is changed in a liner fashion between the lower power state and the full power state over the predetermined time period.
15. The semiconductor module of claim 11, wherein the power is changed incrementally between the lower power state and the full power state over the predetermined time period.
16. The semiconductor module of claim 11, wherein the semiconductor module is selected from the group consisting of a multichip module and a single chip module.
17. The semiconductor module of claim 11, wherein the lower power state is selected from the group consisting of a zero power state, a nap state or a sleep state.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A reinforced plasterboard comprising:
a first layer of paper having at least two sides, wherein said sides are folded to form a trough;
a layer of cementitious slurry disposed within said trough formed by said first layer of paper; and
a layer of reinforcing mesh disposed within said cementitious slurry.
2. The reinforced plasterboard set forth in claim 1, wherein said mesh reinforcement includes an open weave glass fibre mesh.
3. The reinforced plasterboard set forth in claim 1, wherein said mesh reinforcement includes a plastics open weave mesh.
4. The reinforced plasterboard set forth in claim 1, further including a second layer of paper disposed on a side of said plasterboard opposite said first layer of paper.
5. The reinforced plasterboard set forth in claim 4, wherein said first and second layers of paper are adhered together along at least two edges thereof.
6. The reinforced plasterboard set forth in claim 4, wherein said layer of mesh reinforcement is in contact with said second layer of paper.
7. The reinforced plasterboard set forth in claim 1, wherein said cementitious slurry comprises gypsum.