1. A method of treating depression, obsessive-compulsive disorder (OCD), or attention deficit hyperactivity disorder (ADHD) in a mammal, said method comprising administering to said mammal a combination comprising (i) CDP-choline and (ii) an omega-3 fatty acid, wherein said combination is administered in a therapeutically effective amount.
2. The method of claim 1, wherein said CDP-choline or omega-3 fatty acid is administered in a subtherapeutically effective amount.
3. The method of claim 1, wherein said omega-3 fatty acid is eicosapentaenoic acid, docosahexaenoic acid, or \u03b1-linolenic acid.
4. The method of claim 1, wherein said omega-3 fatty acid is administered as fish oil, flaxseed oil, or microalgae.
5. The method of claim 1, wherein said method treats depression.
6. The method of claim 5, wherein said depression is unipolar depression or dysthymia.
7. The method of claim 1, wherein said method treats ADHD.
8. The method of claim 1, wherein said method treats OCD.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device, comprising:
a semiconductor substrate comprising a <110> direction;
a memory cell on a first region of the substrate;
an active region in a second region neighboring the first region of the substrate, an extension direction of the active region having an acute angle with the <110> direction of the substrate; and
a transistor serving as a peripheral circuit on the second region of the substrate.
2. The device of claim 1, wherein the memory cell includes:
a channel structure extending in a direction substantially perpendicular to a top surface of the substrate;
a dielectric structure on the channel structure; and
a plurality of gate lines stacked on the dielectric structure, the plurality of gate lines being spaced apart from each other.
3. The device of claim 2, wherein the gate lines extend in the <110> direction of the substrate.
4. The device of claim 1, wherein the extension direction of the active region has an angle of about 10 degrees to about 80 degrees with the <110> direction of the substrate.
5. The device of claim 1, wherein the substrate is a (100) silicon wafer.
6. The device of claim 1, further comprising a dummy region adjacent to the first region in the second region, wherein the dummy region includes a dummy active region therein.
7. The device of claim 6, wherein the dummy active region has a linear shape and extends in a direction substantially parallel to a boundary line of the first region.
8. The device of claim 6, wherein the dummy active region extends in a direction having an angle of about 10 degrees to about 80 degrees with the <110> direction of the substrate.
9. The device of claim 8, wherein the dummy active region includes a plurality of dummy active regions regularly arranged in a direction substantially parallel to a boundary line of the first region.
10. The device of claim 1, wherein the transistor includes a gate electrode and an impurity region, and the gate electrode extends in a direction substantially perpendicular to a longitudinal direction of the active region.
11. The device of claim 1, wherein the transistor includes a gate electrode and an impurity region, and the gate electrode extends in the <100> direction of the substrate.
12. A semiconductor device, comprising:
a semiconductor substrate comprising a <110> direction;
a memory cell on a first region of the substrate;
an active region in a second region neighboring the first region of the substrate, an extension direction of the active region having an acute angle with the <110> direction of the substrate;
a transistor serving as a peripheral circuit on the second region of the substrate; and
a dummy active region in the second region adjacent to the first region, an extension direction of the dummy active region having an angle of about 10 degrees to about 80 degrees with the <110> direction of the substrate.
13. The device of claim 12, wherein the extension direction of the active region has an angle of about 10 degrees to about 80 degrees with the <110> direction of the substrate.
14. The device of claim 12, wherein the active region extends in the <110> direction of the substrate.
15. The device of claim 12, wherein the transistor includes a gate electrode and an impurity region, and the gate electrode extends in a direction substantially perpendicular to a longitudinal direction of the active region.
16. A semiconductor device, comprising:
a substrate comprising a <110> direction;
a memory cell array comprising a plurality of word lines that extend along the substrate parallel or perpendicular to the <110> direction; and
a plurality of peripheral circuit transistors that extend along the substrate oblique to the <110> direction.
17. The device of claim 16 wherein the plurality of peripheral circuit transistors extend along the substrate at an angle of between about 10 degrees and about 80 degrees to the <110> direction.
18. The device of claim 16 further comprising a plurality of dummy active regions between the memory cell array and the plurality of peripheral cell transistors, the dummy active regions not comprising transistors therein.
19. The device of claim 16 wherein the memory cell array further comprises a plurality of memory cells having channel structures that extend perpendicular to a face of the substrate.
20. The device of claim 16 wherein the substrate comprises mono crystalline silicon and also comprises a <100> direction, and wherein the plurality of peripheral circuit transistors extend along the <100> direction.