1. A method of providing at least one electrical conductor to a wellhead containing a fluid while preventing fluid leakage from the wellhead, the method comprising:
providing a cylindrical housing having a through hole, the housing adapted to be mounted to the wellhead;
passing at least one electrical conductor through the hole of the cylindrical housing; and
sealing the through hole and the at least one electrical conductor to substantially prevent the passage of the fluid through the housing.
2. The method as recited in claim 1, wherein the fluid comprises at least one of a gas and a liquid.
3. The method as recited in claim 1, wherein the housing is adapted to be mounted to the wellhead comprises a housing having an external thread engagable with the wellhead.
4. The method as recited in claim 1, wherein passing at least one electrical conductor comprises passing at least one single, solid wire electrical conductor through the hole.
5. The method as recited in claim 1, wherein sealing the through hole and the at least one electrical conductor comprises providing a hardenable fluid to the through hole and hardening the hardenable fluid to provide a substantially fluid-tight seal between an inside surface of the through hole and an outside surface of the at least one electrical conductor.
6. The method as recited in claim 1, wherein the at least one electrical conductor comprises at least one coated single-solid-wire electrical conductor.
7. The method as recited in claim 1, wherein passing at least one electrical conductor through the hole of the connector comprises passing at least one electrical conductor comprising an electrical coupling.
8. The method as recited in claim 7, wherein the electrical coupling comprises a first male connector and a second female connector.
9. An apparatus for providing at least one electrical conductor to a wellhead containing a fluid while preventing fluid leakage from the wellhead, the apparatus comprising:
a cylindrical housing having a through hole, the housing adapted to be mounted to the wellhead;
at least one electrical conductor passing through the hole of the cylindrical housing; and
means for sealing the through hole and the at least one electrical conductor to substantially prevent the passage of the fluid through the housing.
10. The apparatus as recited in claim 9, wherein the fluid comprises at least one of a gas and a liquid.
11. The apparatus as recited in claim 9, wherein the housing adapted to be mounted to the wellhead comprises a housing having an external thread adapted to engage the wellhead.
12. The apparatus as recited in claim 9, wherein the at least one electrical conductor comprises at least one single-solid-wire electrical conductor.
13. The apparatus as recited in claim 9, wherein the means for sealing the through hole and the at least one electrical conductor comprises a hardenable fluid adapted to provide a substantially fluid-tight seal between an inside surface of the through hole and an outside surface of the at least one electrical conductor when hardened.
14. The apparatus as recited in claim 9, wherein the at least one electrical conductor comprises at least one coated, single-solid-wire electrical conductor.
15. The apparatus as recited in claim 9, wherein the at least one electrical conductor comprises an electrical coupling.
16. The apparatus as recited in claim 15, wherein the electrical coupling comprises a first male connector and a second female connector.
17. An electrical coupling assembly adapted to provide at least one electrical conductor to a wellhead containing a fluid while preventing fluid leakage from the wellhead, the coupling assembly comprising:
a cylindrical housing having a through hole, the housing adapted to be mounted to the wellhead;
a first electrical connector mounted in the housing and having at least one first electrical conductor;
a second electrical connector adapted to engage the first electrical connector and having at least one second electrical conductor; and
means for sealing the through hole about at least one of the first electrical connector and the at least one electrical connector to substantially prevent the passage of the fluid through the housing.
18. The coupling as recited in claim 17, wherein at least one of the first electrical connector and the second electrical connector comprise a plurality of electrodes.
19. The coupling as recited in claim 17, wherein the means for sealing the through hole comprises at least one hardenable fluid.
20. The coupling as recited in claim 19, wherein the hardenable fluid comprises at least one of an adhesive, an epoxy, and a silicone.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device, comprising:
a semiconductor layer formed by epitaxial growth in a first region which is obtained by etching a semiconductor substrate to a predetermined depth, a surface of the semiconductor layer having a same height from the bottom of the semiconductor substrate as a height of a surface of the semiconductor substrate;
a buried insulating layer buried between the semiconductor substrate and the semiconductor layer; and
an element isolation region separating each element region in the semiconductor layer and isolating the semiconductor layer from the semiconductor substrate in plan.
2. A method of manufacturing a semiconductor device on a semiconductor substrate that has a first element region having a silicon-on-insulator structure (SOI) structure, a second element region having a bulk structure and an element isolation region separating each region, the first region and the second region being provided in a plural number, the method comprising:
etching a part of a first area situated next to the first element region in the first element region andor the element isolation region on the semiconductor substrate to a predetermined depth;
forming a mask layer in an unetched second area other than the etched first area;
forming a first semiconductor layer made of an material that has a larger etching rate than an etching rate of the semiconductor substrate selectively in an unmasked area;
forming a second semiconductor layer made of an material that has a smaller etching rate than the etching rate of the first semiconductor layer on the first semiconductor layer;
forming a first groove in an third area where the first semiconductor layer and the second semiconductor layer are formed in the element isolation region, the first groove penetrating the first semiconductor layer and the second semiconductor layer and exposing the semiconductor substrate;
forming a supporting layer in the first groove and in at least a part of the first element region, the supporting layer supporting the second semiconductor layer on the semiconductor substrate;
forming a second groove in the element isolation region except an area where the first groove is formed, the second groove exposing the first semiconductor layer;
forming a cavity under the second semiconductor layer by removing the first semiconductor layer by etching the first semiconductor layer through the second groove; and
forming a buried insulating layer embedded in the cavity through the second groove.
3. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor substrate is exposed at the bottom of the second groove when the second groove is formed.
4. The method of manufacturing a semiconductor device according to claim 2, wherein a third groove is simultaneously formed in the element isolation region that separates each region in the second element region when the second groove exposing the first semiconductor layer is formed.
5. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor substrate is etched to a depth substantially same as a sum of thicknesses of the first semiconductor layer and the second semiconductor layer when the part of the first area is etched.
6. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor substrate is a single-crystalline semiconductor substrate, and the first semiconductor layer and the second semiconductor layer is a single-crystalline semiconductor layer formed by epitaxial growth.
7. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor substrate and the second semiconductor layer are made of single-crystalline silicon, and the first semiconductor layer is made of a single-crystalline silicon germanium.
8. The method of manufacturing a semiconductor device according to claim 2 wherein an insulating film is formed on the second semiconductor layer before the first groove is formed.
9. The method of manufacturing a semiconductor device according to claim 8, wherein the insulating layer includes at least a silicon nitride film.
10. A method of manufacturing a semiconductor device on a semiconductor substrate that has a first element region having a silicon-on-insulator structure (SOI) structure, a second element region having a bulk structure and an element isolation region separating each element region, the first region and the second region being provided in a plural number, the method comprising:
forming a mask in the second element region on the semiconductor substrate;
etching a part of a first area situated next to the first element region in the first element region andor the element isolation region to a predetermined depth;
forming a first semiconductor layer made of an material that has a larger etching rate than an etching rate of the semiconductor substrate on the semiconductor substrate and the mask;
forming a second semiconductor layer made of an material that has a smaller etching rate than the etching rate of the first semiconductor layer on the first semiconductor layer;
removing the first semiconductor layer and the second semiconductor layer that exit in an unetched area;
forming a first groove in an second area where the first semiconductor layer and the second semiconductor layer are formed in the element isolation region, the first groove penetrating the first semiconductor layer and the second semiconductor layer and exposing the semiconductor substrate;
forming a supporting layer in the first groove and in at least a part of the first element region, the supporting layer supporting the second semiconductor layer on the semiconductor substrate;
forming a second groove in the element isolation region except an area where the first groove is formed, the second groove exposing the first semiconductor layer;
forming a cavity under the second semiconductor layer by removing the first semiconductor layer by etching the first semiconductor layer through the second groove; and
forming a buried insulating layer embedded in the cavity through the second groove.
11. The method of manufacturing a semiconductor device according to claim 10, wherein the semiconductor substrate is exposed at the bottom of the second groove when the second groove is formed.
12. The method of manufacturing a semiconductor device according to claim 10, wherein a third groove is simultaneously formed in the element isolation region that separates each region in the second element region when the second groove exposing the first semiconductor layer is formed.
13. The method of manufacturing a semiconductor device according to claim 10, wherein the semiconductor substrate is etched to a depth substantially same as a sum of thicknesses of the first semiconductor layer and the second semiconductor layer when the part of the first area is etched.
14. The method of manufacturing a semiconductor device according to claim 10, wherein the semiconductor substrate is a single-crystalline semiconductor substrate, and the first semiconductor layer and the second semiconductor layer is a single-crystalline semiconductor layer formed by epitaxial growth.
15. The method of manufacturing a semiconductor device according to claim 10, wherein the semiconductor substrate and the second semiconductor layer are made of single-crystalline silicon, and the first semiconductor layer is made of a single-crystalline silicon germanium.
16. The method of manufacturing a semiconductor device according to claim 10, wherein an insulating film is formed on the second semiconductor layer before the first groove is formed.
17. The method of manufacturing a semiconductor device according to claim 16, wherein the insulating layer includes at least a silicon nitride film.