1461112470-34e7081d-0eae-42ca-8203-103a2c811aeb

1. A pneumatic impact tool comprising:
a housing;
a spindle disposed rotatably in said housing and extending along an X-axis;
an output shaft disposed rotatably in said housing, extending along a Z-axis perpendicular to the X-axis, and geared to said spindle; and
a spindle positioning device including
a bushing threaded in said housing and having a stop surface and a frustoconical outer surface, said stop surface obstructing said spindle from moving away from said output shaft, said frustoconical outer surface being centered at the X-axis and having opposite first and second ends, said first end being nearer to the X-axis and farther away from the Z-axis than said second end, and
a stop pin disposed removably in the housing and having an engaging surface abutting against said frustoconical outer surface, so as to prevent said bushing from moving in the housing in a direction away from said output shaft.
2. The pneumatic impact tool as claimed in claim 1, wherein said spindle has a position-limiting surface abutting against said stop surface of said bushing, said stop surface being constituted by an end surface of said bushing.
3. The pneumatic impact tool as claimed in claim 1, wherein said stop pin is threaded in said housing, and has an end surface constituting said engaging surface.
4. The pneumatic impact tool as claimed in claim 1, wherein said stop pin is inclined with respect to the X-axis and the Z-axis.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method comprising:
determining that a first counter is greater than a second counter, wherein the first counter represents a number of pixels that have been read by a display pipeline for a current frame and the second counter represents a number of pixels requested from a memory for the current frame;
incrementing an address corresponding to a memory fetch request by an offset; and
issuing the memory fetch request to a memory,
wherein the offset is equal to the difference between the first counter and the second counter plus a threshold value.
2. The method of claim 1, wherein the offset is equal to a value that corresponds to one or more scan-lines.
3. The method of claim 1, further comprising:
detecting a vertical synchronization signal that indicates a boundary for a next frame;
resetting a buffer unit to clear pixel data associated with a previous frame; and
resetting the first counter and the second counter.
4. The method of claim 1, further comprising transmitting a frame identifier associated with the memory fetch request to a tag FIFO.
5. The method of claim 4, further comprising:
receiving pixel data corresponding to the memory fetch request;
reading the frame identifier from the tag FIFO; and
comparing the frame identifier to a value corresponding to the current frame.
6. The method of claim 5, further comprising discarding the pixel data if the frame identifier is not equal to the value.
7. The method of claim 1, further comprising selecting a default color for a pixel when a third counter is greater than zero.
8. The method of claim 1, further comprising selecting a color for a pixel when a third counter is greater than zero, wherein the color is equal to a color of a previous pixel read by a display pipeline when the third counter is equal to zero.
9. The method of claim 1, further comprising selecting a color for a pixel when a third counter is greater than zero, wherein an alpha channel of the color is equal to zero.
10. The method of claim 1, wherein the offset is adjusted based on a magnitude of the difference between the first counter and the second counter.
11. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform steps comprising:
determining that a first counter is greater than a second counter, wherein the first counter represents a number of pixels that have been read by a display pipeline for a current frame and the second counter represents a number of pixels requested from a memory for the current frame;
incrementing an address corresponding to a memory fetch request by an offset; and
issuing the memory fetch request to a memory,
wherein the offset is equal to the difference between the first counter and the second counter plus a threshold value.
12. The non-transitory computer-readable storage medium of claim 11, the steps further comprising transmitting a frame identifier associated with the memory fetch request to a tag FIFO.
13. The non-transitory computer-readable storage medium of claim 12, the steps further comprising:
receiving pixel data corresponding to the memory fetch request;
reading the frame identifier from the tag FIFO; and
comparing the frame identifier to a value corresponding to the current frame.
14. The non-transitory computer-readable storage medium of claim 13, the steps further comprising discarding the pixel data if the frame identifier is not equal to the value.
15. A system, comprising:
a memory configured to store pixel data; and
a display controller configured to:
determine that a first counter is greater than a second counter, wherein the first counter represents a number of pixels that have been read by a display pipeline for a current frame and the second counter represents a number of pixels requested from a memory for the current frame,
increment an address corresponding to a memory fetch request by an offset, and
issue the memory fetch request to a memory,
wherein the offset is equal to the difference between the first counter and the second counter plus a threshold value.
16. The system of claim 15, wherein the display controller includes a plurality of display pipelines configured to modify pixel data for display on a display device.
17. The system of claim 16, wherein each of the display pipelines is coupled to a corresponding buffer unit configured to store pixel data associated with memory fetch requests until the pixel data is read by the display pipeline.
18. The system of claim 15, wherein the display controller is included within a graphics processing unit.