1. A method of making a semiconductor device, the method comprising:
providing a first wafer;
providing a second wafer having a first side and a second side, the second wafer including a semiconductor structure, a gate dielectric, and a layer of gate material, the gate dielectric is located between the semiconductor structure and the layer of gate material, the gate dielectric is located closer to the first side of the second wafer than the semiconductor structure;
bonding a first side of a second wafer to the first wafer;
removing a first portion of the semiconductor structure to leave a layer of the semiconductor structure after the bonding;
forming a transistor having a channel region, wherein at least a portion of the channel region is formed from the layer of the semiconductor structure.
2. The method of claim 1 wherein the semiconductor structure is made of a crystalline material.
3. The method of claim 1 wherein the semiconductor structure is characterized as a substrate.
4. The method of claim 1 further comprising:
forming a bottom gate of the transistor, wherein at least a portion of the bottom gate is formed from the layer of gate material.
5. The method of claim 1 wherein the removing further comprises:
implanting a dopant in the semiconductor structure to create a stress layer in the semiconductor structure;
wherein the first portion is removed from the layer of the semiconductor structure at the stress layer.
6. The method of claim 1 wherein the layer of the semiconductor structure includes a monocrystalline material.
7. A method of forming a transistor, comprising:
providing a wafer comprising a semiconductor layer, a gate dielectric, and a layer of gate material, wherein the gate dielectric is located between the semiconductor layer and the layer of gate material;
patterning the semiconductor layer to leave a first portion of the semiconductor layer;
after the patterning the semiconductor layer, patterning the layer of gate material, wherein the patterning the layer of gate material leaves a second portion of the layer of gate material not covered by a remaining portion of the semiconductor layer, wherein after the patterning the layer of gate material, a third portion of the layer of gate material remains and is covered by the first portion of the semiconductor layer;
forming a bottom gate of a transistor wherein at least a portion of the bottom gate is formed from the third portion.
8. The method of claim 7 further comprising:
forming contact over the second portion, the contact is in electrical contact with the second portion.
9. The method of claim 7 wherein the second portion and the third portion are electrically coupled.
10. The method of claim 7, further comprising:
forming a second layer of gate material after the patterning the layer of gate material;
forming a top gate of the transistor, wherein at least a portion of the top gate is formed from the second layer of gate material.
11. The method of claim 10 wherein prior to forming the second layer of gate material, the method further comprising:
forming a dielectric over the wafer;
performing a chemical mechanical polish on the wafer after the forming the dielectric.
12. The method of claim 10, wherein the forming the top gate further includes patterning the second layer of gate material to form a gate structure, the method further comprising:
implanting dopants into portions of the first portion of the semiconductor layer adjacent to the gate structure;
forming a sidewall spacer around the gate structure;
removing portions of the first portion of the semiconductor layer to leave implanted portions under the sidewall spacer.
13. The method of claim 7, wherein the patterning the layer of gate material is further characterized as leaving a first region where the layer of gate material is removed, the method further comprising:
forming a second layer of gate material after the patterning the layer of gate material including over the first region;
patterning the second layer of gate material, wherein the patterning leaves a fourth portion over the first portion of the semiconductor layer and a fifth portion over the first region;
forming a top gate of the transistor, wherein at least a portion of the top gate is formed from the fourth portion.
14. The method of claim 13 further comprising:
forming a contact over the fifth portion and in electrical contact with the fifth portion.
15. The method of claim 13, wherein the forming the top gate further includes patterning the second layer of gate material to form a structure, the method further comprising:
implanting dopants into portions of the first portion of the semiconductor layer adjacent to the structure;
forming a sidewall spacer around the structure;
removing portions of the first portion of the semiconductor layer to leave implanted portions under the sidewall spacer.
16. The method of claim 7 further comprising:
forming a first opening in the wafer wherein the forming a first opening forms a first exposed sidewall of the first portion;
forming a second opening in the wafer wherein the forming the second opening includes forming a second exposed sidewall of the first portion;
epitaxially growing semiconductor material on the first exposed sidewall and on the second exposed sidewall.
17. The method of claim 16 further comprising:
forming a first sourcedrain region of the transistor, wherein the first sourcedrain region includes epitaxially grown semiconductor material on the first exposed sidewall;
forming a second sourcedrain region of the transistor wherein the second sourcedrain region includes epitaxially grown semiconductor material on the second exposed sidewall.
18. The method of claim 17 wherein:
the forming the first sourcedrain region includes forming material in the first opening, the first sourcedrain region including at least a portion of the material in the first opening;
the forming the second sourcedrain region includes forming material in the second opening, the second sourcedrain region including at least a portion of the material in the second opening.
19. The method of claim 7, wherein the forming the bottom gate further includes:
performing an anisotropic etch of the third portion;
performing an isotropic etch of the third portion after performing the anisotropic etch.
20. The method of claim 7, wherein the providing the wafer comprises:
providing a second wafer;
providing a third wafer comprising a semiconductor structure, the gate dielectric, and the layer of gate material, the gate dielectric is located between the semiconductor structure and the layer of gate material;
bonding the second wafer to the third wafer to form the wafer; and
removing a first portion of the semiconductor structure with the semiconductor layer being a remaining portion of the semiconductor structure.
21. The method of claim 7, wherein the layer of gate material comprises at least one of a group of polysilicon and a metal.
22. The method of claim 7, wherein the semiconductor layer comprises strained silicon.
23. The method of claim 7, wherein the transistor is characterized as a multiple gate transistor.
24. The method of claim 7, wherein the transistor is characterized as a double gate, fully depleted transistor.
25. The method of claim 7, wherein the layer of gate material is located over an insulator.
26. The method of claim 7 further comprising:
forming a resistor, wherein the resistor includes at least a portion of the second portion.
27. The method of claim 7 further comprising:
forming an interconnect, wherein the interconnect includes at least a portion of the second portion.
28. The method of claim 7 further comprising:
forming a capacitor, wherein one electrode of the capacitor includes at least a portion of the second portion.
29. The method of claim 7 further comprising:
forming an inductor, wherein the inductor includes at least a portion of the second portion.
30. A method of forming a transistor comprising:
providing a wafer comprising a semiconductor layer, a dielectric, a conductive layer, and an insulator, wherein the dielectric is located between the semiconductor layer and the conductive layer and the conductive layer is located between the insulator and the dielectric;
patterning the semiconductor layer, wherein the patterning leaves a first portion;
patterning the conductive layer, wherein the patterning the conductive layer leaves a second portion not covered by a remaining portion of the semiconductor layer after the patterning the semiconductor layer, wherein the patterning the conductive layer leaves a third portion covered by the first portion of the semiconductor layer, wherein the patterning the conductive layer leaves a first region where the conductive layer has been removed;
forming a layer of gate material over the wafer;
patterning the layer of gate material, wherein the patterning the layer of gate material leaves a fourth portion over the first portion of the semiconductor layer and a fifth portion over the first region;
forming a bottom gate of a transistor, wherein at least a portion of the bottom gate is formed from the third portion;
forming a top gate of the transistor, wherein at least a portion of the top gate is formed from the fourth portion;
wherein the transistor includes a channel region, wherein at least a portion of the channel region is located in the first portion.
31. The method of claim 30 further comprising:
forming a contact over the second portion, the contact in electrical contact with the second portion.
32. The method of claim 30, wherein a ground plate is located below the insulator.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A system comprising:
a first mail enabled object server;
a buffer configured to queue messages;
a mailbox migration tool configured to:
create a new mail enabled object on the first mail enabled object server and enable user access to the new mail enabled object when the new mail enabled object is empty;
configure a first forwarding mechanism on an old mail enabled object hosted on a second mail enabled object server, the first forwarding mechanism configured to forward messages to the buffer and disable user access to the old mail enabled object when user access is enabled to the new mail enabled object;
configure a second forwarding mechanism on the new mail enabled object on the first mail enabled object server, the second forwarding mechanism configured to forward messages to the old mail enabled object on the second mail enable object server from the new mail object, wherein an undo mechanism is provided by the second forwarding mechanism, on the new mail enabled object, configured to forward messages to the old mail enabled object from the new mail object
transfer at least some contents of the old mail enabled object to the new mail enabled object;
change the first forwarding mechanism to forward messages to the new mail enabled object; and
forward contents of the buffer to the new mail enabled object.
2. The system of claim 1, the first mail enabled object server being a remotely hosted service.
3. The system of claim 1 further comprising:
a contents verifier configured to verify the transfer of the at least some contents.
4. The system of claim 3, the contents verifier being configured to verify the contents during the transfer.
5. The system of claim 3, the contents verifier being configured to verify the contents after the transfer.
6. The system of claim 1, the buffer being configured to queue messages for a subdomain namespace.
7. The system of claim 6, the buffer being configured to transmit or queue all messages for the subdomain based on a single setting.
8. The system of claim 1 wherein the mailbox migration tool is further configured to:
determine if the transfer was proper; and
revert back to the old mail enabled object when the transfer is determined to be improper.
9. The system of claim 8 wherein revert back to the old mail enabled object further comprises:
enable the old mail enabled object;
disable the new mail object;
forward contents of the buffer to the old mail enabled object; and
terminate the buffer.
10. The system of claim 9 wherein the buffer is terminated after a predetermined period of time.
11. The system of claim 9 wherein the mail migration tool is further configured to:
update the old mail enabled object with any changes that were made by a user to the new mail enabled object.
12. A method comprising:
creating a new mail enabled object;
configuring a first forwarding mechanism on an old mail enabled object, the first forwarding mechanism configured to forward messages to a buffer;
configuring a second forwarding mechanism on the new mail enabled object, the second forwarding mechanism configured to forward messages to the old mail enabled object from the new mail object,
redirecting user access from the old mail enabled object to the new mail enabled object;
transferring at least some contents of the old mail enabled object to the new mail enabled object;
determining if the transfer of the at least some of the contents was a proper transfer;
when the transfer was determined to be proper:
changing the first forwarding mechanism to forward messages to the new mail enabled object;
forwarding contents of the buffer to the new mail enabled object;
when the transfer was determined not to be proper:
removing the forwarding mechanism such that messages are not forwarded to the buffer;
forwarding messages stored in the buffer to the old mail object; and
terminating the buffer.
13. The method of claim 12 wherein terminating the buffer occurs after a predetermined period of time.
14. The method of claim 12 further comprising:
updating the old mail object with any changes made by a user to the new mail object.
15. The method of claim 12, further comprising:
wherein the creating the new mail enabled object comprising enabling user access to the new mail enabled object; and
wherein the configuring the first forwarding mechanism comprising disabling the old mail enabled object.
16. The method of claim 15 wherein when the transfer was determined not to be proper, further comprising:
re-enabling the old mail object; and
disabling the new mail object.
17. A computer readable storage medium not comprising a propagated wave but comprising computer executable instructions configured to perform the method of:
creating a new mail enabled object;
configuring a first forwarding mechanism on an old mail enabled object, the first forwarding mechanism configured to forward messages to a buffer;
configuring a second forwarding mechanism on the new mail enabled object, the second forwarding mechanism configured to forward messages to the old mail enabled object from the new mail object,
redirecting user access from the old mail enabled object to the new mail enabled object;
transferring at least some contents of the old mail enabled object to the new mail enabled object;
determining if the transfer of the at least some of the contents was a proper transfer;
when the transfer was determined to be proper:
changing the first forwarding mechanism to forward messages to the new mail enabled object;
forwarding contents of the buffer to the new mail enabled object;
when the transfer was determined not to be proper:
removing the forwarding mechanism such that messages are not forwarded to the buffer;
forwarding messages stored in the buffer to the old mail object; and
terminating the buffer.
18. The computer readable storage medium of claim 17 wherein terminating the buffer occurs after a predetermined period of time.
19. The computer readable storage medium of claim 17 further comprising:
wherein, creating the new mail enabled object comprising enabling user access to the new mail enabled object; and
wherein the configuring the first forwarding mechanism comprising disabling the old mail enabled object.
20. The computer readable storage medium of claim 19 wherein when the transfer was determined not to be proper, further comprising:
updating the old mail object with any changes made by a user to the new mail object.