1. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm and a lower arm and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling said voltage converter so as to reduce influence of a dead time of said voltage converter on a duty of said switching, said duty being a period for which the upper arm or the lower arm is kept ON in one control period length,
wherein when a voltage command value of said voltage conversion, corresponding to a calculated target value of an input voltage for the inverter, is larger than a power supply voltage and smaller than a predetermined voltage and said power supply voltage is smaller than a predetermined set value, said control device controls said voltage converter by setting said duty to a duty for instructing to stop said voltage conversion,
when said voltage command value is larger than said power supply voltage and smaller than said predetermined voltage and said power supply voltage is at least said predetermined set value, said control device controls said voltage converter by setting said duty to a duty for instructing to perform said voltage conversion, and
said predetermined set value is set based on an allowable maximum voltage of said power supply, a maximum value of DC current of said power supply when said voltage converter makes a transition to a state where said voltage conversion is stopped, and an internal resistance of said power supply.
2. The voltage conversion device according to claim 1, wherein said internal resistance is set to a maximum value of the internal resistance that can be taken by said power supply.
3. The voltage conversion device according to claim 1, wherein
said internal resistance is set to a measured value of said internal resistance.
4. The voltage conversion device according to claim 1, wherein said internal resistance is set based on the temperature of said power supply.
5. The voltage conversion device according to claim 1, wherein
said maximum value of the DC current is set based on a detected value of an output voltage of said voltage converter and a detected value of said power supply voltage.
6. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm that is made ON at a first on-duty and a lower arm that is made ON at a second on-duty determined by subtracting said first on-duty from 1, and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling switching of said upper arm and said lower arm by setting said first on-duty to an appropriate on-duty, when said first on-duty calculated based on a voltage command value of the voltage conversion by said voltage converter is influenced by a dead time of said upper arm and said lower arm and a power supply voltage is influenced by said dead time,
wherein when said first on-duty calculated based on said voltage command value is larger than a maximum effective on-duty and smaller than a longest on-duty for keeping said upper arm ON for a control period length and said power supply voltage is at least a predetermined set value, said control device controls switching of said upper arm and said lower arm by setting said first on-duty to said maximum effective on-duty, said maximum effective on-duty is determined by dividing, by said control period length, an effective control period length determined by subtracting said dead time from said control period length, and
said predetermined set value is determined by subtracting, from an allowable maximum voltage of said power supply, a product of an internal resistance of said power supply and a maximum value of DC current of said power supply when said first on-duty is switched to said longest on-duty.
7. The voltage conversion device according to claim 6, wherein
when said first on-duty calculated based on said voltage command value is larger than the maximum effective on-duty and smaller than the longest on-duty for keeping said upper arm ON for the control period length and said power supply voltage is smaller than the predetermined set value, said control device controls switching of said upper arm and said lower arm by setting said first on-duty to said longest on-duty.
8. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm that is made ON at a first on-duty and a lower arm that is made ON at a second on-duty determined by subtracting said first on-duty from 1, and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm, said first on-duty being a period for which the upper arm is kept ON in one control period length and said second on-duty being a period for which the lower arm is kept ON in one control period length; and
a control device controlling switching of said upper arm and said lower arm by setting said first on-duty by making a switch, at a predetermined ratio, between a maximum effective on-duty and a longest on-duty at which said upper arm is kept ON for a control period length, when said first on-duty calculated based on a voltage command value of the voltage conversion by said voltage converter is influenced by a dead time of said upper arm and said lower arm, wherein
said maximum effective on-duty is determined by dividing an effective control period length by said control period length, where said effective control period length is determined by subtracting said dead time from said control period lengths,
when a voltage command value of said voltage conversion, corresponding to a calculated target value of an input voltage for the inverter, is larger than a power supply voltage and smaller than a predetermined voltage and said power supply voltage is smaller than a predetermined set value, said control device controls said voltage converter by setting said duty to a duty for instructing to stop said voltage conversion,
when said voltage command value is larger than said power supply voltage and smaller than said predetermined voltage and said power supply voltage is at least said predetermined set value, said control device controls said voltage converter by setting said duty to a duty for instructing to perform said voltage conversion, and
said predetermined set value is set based on an allowable maximum voltage of said power supply, a maximum value of DC current of said power supply when said voltage converter makes a transition to a state where said voltage conversion is stopped, and an internal resistance of said power supply.
9. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm and a lower arm and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling said voltage converter so as to reduce influence of a dead time of said voltage converter on a duty of said switching, said duty being a period for which the upper arm or the lower arm is kept ON in one control period length,
wherein in a case where a voltage command value of the voltage conversion by said voltage converter is larger than a power supply voltage and smaller than a predetermined voltage, said control device controls said voltage converter by setting said duty using a first duty that is a duty when a voltage of at least said predetermined voltage is said voltage command value and a second duty that is a duty when said power supply voltage is said voltage command value, and
said control device sets said duty by making a switch between said first duty and said second duty at a predetermined ratio.
10. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm and a lower arm and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling said voltage converter so as to reduce influence of a dead time of said voltage converter on a duty of said switching, said duty being a period for which the upper arm or the lower arm is kept ON in one control period length,
wherein in a case where there is a possibility that a surge of DC current of said power supply occurs, said control device controls said voltage converter by setting said duty using a first duty that is a duty when a voltage of at least a predetermined voltage is a voltage command value and a second duty that is a duty when a power supply voltage is said voltage command value, and
said control device sets said duty by making a switch between said first duty and said second duty at a predetermined ratio.
11. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm that is made ON at a first on-duty and a lower arm that is made ON at a second on-duty determined by subtracting said first on-duty from 1, and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling switching of said upper arm and said lower arm by changing a carrier frequency at which switching of said upper arm and said lower arm is controlled, according to an increase of said first on-duty, when said first on-duty calculated based on a voltage command value of the voltage conversion by said voltage converter is influenced by a dead time of said upper arm and said lower arm, wherein
said control device changes said carrier frequency in a predetermined period at start of said voltage conversion and in a predetermined period at a transition to a state where said voltage conversion is stopped.
12. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm and a lower arm and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling said voltage converter so as to reduce influence of a dead time of said voltage converter on a duty of said switching wherein when a voltage command value of the voltage conversion by said voltage converter is larger than a power supply voltage and smaller than a predetermined voltage, said control device controls said voltage converter by changing a carrier frequency at which switching of said upper arm and said lower arm is controlled, wherein
when said control device performs control for stepping down an output voltage of said voltage converter or control for stepping up the output voltage of said voltage converter and said voltage command value is larger than said power supply voltage and smaller than said predetermined voltage, said control device changes said carrier frequency.
13. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm and a lower arm and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling said voltage converter so as to reduce influence of a dead time of said voltage converter on a duty of said switching wherein when a voltage command value of the voltage conversion by said voltage converter is larger than a power supply voltage and smaller than a predetermined voltage, said control device controls said voltage converter by changing a carrier frequency at which switching of said upper arm and said lower arm is controlled, wherein
when said control device performs control for stepping down an output voltage of said voltage converter and said voltage command value is larger than said power supply voltage and smaller than said predetermined voltage, said control device changes said carrier frequency.
14. A voltage conversion device variably changing an input voltage to an inverter, the voltage conversion device comprising:
a voltage converter including an upper arm and a lower arm and performing voltage conversion between a power supply and said inverter by switching of said upper arm and said lower arm; and
a control device controlling said voltage converter so as to reduce influence of a dead time of said voltage converter on a duty of said switching wherein when a voltage command value of the voltage conversion by said voltage converter is larger than a power supply voltage and smaller than a predetermined voltage, said control device controls said voltage converter by changing a carrier frequency at which switching of said upper arm and said lower arm is controlled, wherein said predetermined voltage is determined based on the dead time of said voltage converter.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An LCD (liquid crystal display device) having a liquid crystal panel including an active region serving as a display region and an outer region serving as a non-display region, the LCD comprising:
a first substrate including an array unit and a color filter formed in the active region;
an ESD (electrostatic discharge) circuit formed in the outer region;
a pattern spacer formed on the ESD;
a second substrate facing the first substrate; and
a sealant for attaching the first and second substrates together.
2. The LCD according to claim 1, wherein a pattern spacer for maintaining a gap between the first and second substrates is further formed in the active region.
3. The LCD according to claim 1, wherein the ESD comprises a plurality of TFTs (thin film transistors).
4. The LCD according to claim 1, wherein the pattern spacer is formed on a partial surface or an entire surface of the ESD.
5. The LCD according to claim 1, wherein the ESD is formed under the sealant.
6. The LCD according to claim 1, wherein the ESD is formed inwardly from the sealant.
7. The LCD according to claim 1, wherein the ESD is formed outwardly from the sealant.
8. The LCD according to claim 1, wherein the first substrate comprises:
a gate line formed thereon in one direction;
a gate electrode formed thereon;
a gate pad formed at the outer region;
a gate insulating layer formed on the gate line;
a semiconductor layer formed on the gate insulating layer at a position corresponding to a TFT;
a data line intersected by the gate line to define a pixel region;
source and drain electrodes protruded from the semiconductor layer;
a black matrix formed on the TFT, the gate line and the data line;
a color filter formed in the pixel region;
an overcoat layer formed on the black matrix and the color filter; and
a pixel electrode formed on the overcoat layer to be connected to the drain electrode.
9. The LCD according to claim 8, wherein an overcoat layer is further formed on the source and drain electrodes.
10. The LCD according to claim 8, wherein a semiconductor layer is further formed beneath the data line.
11. The LCD according to claim 8, wherein the overcoat layer is made of photo acryl or inorganic material.
12. The LCD according to claim 8, wherein a pattern spacer is further formed on the gate pad.
13. The LCD according to claim 1, wherein the first substrate comprises:
a color filter formed thereon;
a gate line formed thereon in one direction;
a gate electrode formed thereon;
a gate pad formed at the outer region;
a gate insulating layer formed on the gate line;
a semiconductor layer formed on the gate insulating layer at a position corresponding to a TFT;
a data line intersected by the gate line to define a pixel region;
source and drain electrodes protruded from the semiconductor layer;
a black matrix formed on the TFT, the gate line and the data line;
an overcoat layer formed on the black matrix; and
a pixel electrode formed on the overcoat layer to be connected to the drain electrode.
14. A method for manufacturing an LCD (liquid crystal display device), the method comprising:
forming an array unit, a color filter and a black matrix in a display region on a first substrate and forming an ESD (electrostatic discharge) circuit and an outer black matrix in a non-display region;
forming a pattern spacer in the display region and forming a pattern spacer on a partial surface or an entire surface of the ESD circuit;
attaching the first substrate and a second substrate facing the first substrate together using a sealant; and
forming a liquid crystal layer between the first and second substrates.
15. The method according to claim 14, wherein the ESD comprises a plurality of TFTs (thin film transistors).
16. The method according to claim 14, wherein the ESD is formed under the sealant.
17. The method according to claim 14, wherein the ESD is formed inwardly from the sealant.
18. The method according to claim 14, wherein the ESD is formed outwardly from the sealant.
19. The method according to claim 14, wherein the forming of the first substrate comprises:
forming on a substrate a gate line, a gate pad, and a data line intersecting the gate line to define a pixel region;
forming a TFT (thin film transistor) at an intersection between the gate line and the data line, the TFT including a gate electrode and an active layer and sourcedrain electrodes;
forming a black matrix on the TFT, the gate line and the data line;
forming an RGB color filter in the pixel region; and
forming a pixel electrode on the color filter.
20. The method according to claim 14, wherein the forming of the first substrate comprises:
forming a color filter on a substrate;
forming a TFT on the color filter in a pixel region defined by a gate line and a data line intersecting the gate line, the TFT including a gate electrode and an active layer and sourcedrain electrodes;
forming a black matrix on the TFT, the gate line and the data line; and
forming a pixel electrode on the pixel region.
21. The method according to claim 19, wherein a pattern spacer is formed on the gate pad.
22. An LCD (liquid crystal display device) having a liquid crystal panel including an active region serving as a display region and an outer region serving as a non-display region, the LCD comprising:
a gate line formed in one direction on a first substrate;
a gate electrode formed on the first substrate;
a gate pad formed at the outer region;
a gate insulating layer formed on the gate line;
a semiconductor layer formed on the gate insulating layer at a position corresponding to a TFT (thin film transistor);
a data line intersected by the gate line to define a pixel region;
source and drain electrodes protruded from the semiconductor layer;
a black matrix formed on the TFT, the gate line and the data line;
a color filter formed in the pixel region;
an overcoat layer formed on the black matrix and the color filter;
a pixel electrode formed on the overcoat layer to be connected to the drain electrode;
a transparent common electrode formed to alternate with the pixel electrode;
an ESD (electrostatic discharge) circuit formed in the outer region;
a pattern spacer formed on the ESD, the TFT and the gate pad;
a second substrate facing the first substrate; and
a sealant for attaching the first and second substrates together.
23. The LCD according to claim 22, wherein the ESD comprises a plurality of TFTs.
24. The LCD according to claim 22, wherein the pattern spacer is formed on a partial surface or an entire surface of the ESD.
25. The LCD according to claim 22, wherein the ESD is formed under the sealant.
26. The LCD according to claim 22, wherein the ESD is formed inwardly from the sealant.
27. The LCD according to claim 22, wherein the ESD is formed outwardly from the sealant.
28. The LCD according to claim 22, wherein a metal common electrode is further formed on the gate line layer near the data line.
29. The LCD according to claim 28, wherein the metal common electrode is connected to the transparent common electrode by a common electrode link.
30. The LCD according to claim 29, wherein a pattern spacer is further formed on the common electrode link region.
31. The LCD according to claim 22, wherein the pixel electrode and the transparent common electrode are made of transparent conductive material.
32. The LCD according to claim 22, wherein an overcoat layer is further formed on the source and drain electrodes.
33. The LCD according to claim 22, wherein a semiconductor layer is further formed beneath the data line.
34. The LCD according to claim 22, wherein the overcoat layer is made of photo acryl or inorganic material.
35. A method for manufacturing an LCD (liquid crystal display device) having a liquid crystal panel including an active region serving as a display region and an outer region serving as a non-display region, the method comprising:
forming in the active region on a first substrate a gate line, a gate pad, and a data line intersecting the gate line to define a pixel region and forming a TFT (thin film transistor) at an intersection between the gate line and the data line, the TFT including a gate electrode and an active layer and sourcedrain electrodes;
forming an ESD (electrostatic discharge) circuit in an outer region of the first substrate;
forming a black matrix on the TFT, the gate line, the data line and the outer region;
forming an RGB color filter in the pixel region;
forming an overcoat layer on the color filter;
forming a pixel electrode and a transparent common electrode on the overcoat layer;
forming a pattern spacer on the ESD circuit and the gate pad;
attaching the first substrate and a second substrate facing the first substrate together using a sealant; and
forming a liquid crystal layer between the first and second substrates.
36. The method according to claim 35, further comprising forming a metal common electrode near the data line during the forming of the gate line.
37. The method according to claim 35, further comprising forming an overcoat layer on the source and drain electrodes.
38. The method according to claim 36, wherein the metal common electrode is connected to the transparent common electrode by a common electrode link.
39. The method according to claim 38, wherein a pattern spacer is further formed on the common electrode link region.
40. The method according to claim 36, wherein the pixel electrode and the transparent common electrode are made of transparent conductive material.
41. The method according to claim 36, wherein the ESD is formed under the sealant.
42. The method according to claim 36, wherein the ESD is formed inwardly from the sealant.
43. The method according to claim 36, wherein the ESD is formed outwardly from the sealant.