1. A fuel vapor supply system configured to supply fuel vapor to an internal combustion engine having an intake passage, the fuel vapor supply system comprising:
a canister configured to store the fuel vapor;
a purge passage extending from the canister to connect to the intake passage of the internal combustion engine wherein the purge passage allows the fuel vapor stored in the canister to flow to the internal combustion engine through the purge passage;
a purge valve disposed in the purge passage wherein the purge valve is configured to regulate a flow rate of the fuel vapor flowing from the canister to the intake passage is controlled;
a check valve disposed in the purge passage between the purge valve and the intake passage wherein the check valve is configured to permit the flow of the fuel vapor from the canister to the intake passage and further wherein the check valve is configured to prevent the flow of air from the intake passage to the canister;
wherein the purge passage has an intermediate purge passage that extends from the purge valve to the check valve; and
wherein the check valve is configured to open when an intermediate purge passage pressure within the intermediate purge passage exceeds an intake passage pressure within the intake passage and the check valve is configured to close when the intermediate purge passage pressure does not exceed the intake passage pressure;
a pressure detection device configured to detect the intake passage pressure;
a controller coupled with the purge valve, wherein the controller is configured to:
control a degree of opening of the purge valve or a duty ratio wherein the duty ratio is defined as a ratio of a valve opening time to a predetermined frequency period and further wherein control of the degree of opening of the purge valve or control of the duty ratio regulates the flow rate of the fuel vapor flowing across the purge valve;
perform a purge control to control the purge valve to open with a predetermined opening degree or a predetermined duty ratio such that the fuel vapor stored in the canister flows from the canister to the internal combustion engine via the purge passage and the intake passage because of a negative pressure in the intake passage wherein the negative pressure is defined as a pressure less than an atmospheric pressure, while the fuel vapor flows across the purge valve, through the intermediate purge passage, and across the check valve in the purge passage; and
estimate the intermediate purge passage pressure within the intermediate purge passage at least partially based on the intake passage pressure detected by the pressure detection device.
2. The fuel vapor supply system according to claim 1, wherein the controller is configured to estimate the intermediate purge passage pressure to be equal to a smallest value of detected values of the intake passage pressure should the purge valve be fully closed.
3. The fuel vapor supply system according to claim 1, wherein the controller is configured to estimate the intermediate purge passage pressure to be equal to the intake passage pressure detected at a time when a predetermined pressure variation transition time has elapsed after initiating the purge control should the purge valve not be fully closed.
4. The fuel vapor supply system according to claim 3, wherein the controller is further configured to adjust a duration of the predetermined pressure variation transition time based on a difference between the intake passage pressure detected by the pressure detection device and the intermediate purge passage pressure estimated when the purge valve is fully closed.
5. The fuel vapor supply system according to claim 3, wherein the controller is configured to estimate the intermediate purge passage pressure to be equal to the atmospheric pressure provided that the intake passage pressure exceeds the atmospheric pressure at a time when the predetermined pressure variation transition time has elapsed after starting the purge control should the purge valve not be fully closed.
6. The fuel vapor supply system according to claim 1,
wherein the controller is further coupled with a fuel injector associated with the internal combustion engine and is further configured to perform a reduction control to reduce a quantity of fuel injected from the injector;
wherein the reduction control regulates the fuel injector to reduce a quantity of fuel injected from the injector to compensate for the fuel vapor supplied to the internal combustion engine during the purge control; and
wherein the reduction control begins at a time determined at least partially based on the intake passage pressure detected by the pressure detection device, the estimated pressure within the intermediate purge passage, and a predetermined arrival delay time that is a time of delay for arrival of the fuel vapor from the canister to the internal combustion engine.
7. The fuel vapor supply system according to claim 6, wherein the predetermined arrival delay time is determined based on at least one of a rotational speed of a crankshaft of the engine, a flow rate of intake air flowing through the intake passage, a degree of opening of the purge valve, and the intake passage pressure detected by the pressure detection device.
8. A system comprising:
an internal combustion engine;
an intake passage in fluid communication with the internal combustion engine wherein the intake passage is configured to supply intake air to the internal combustions engine;
a fuel tank configured to store the fuel;
a canister in fluid communication with the fuel tank wherein the canister is configured to store fuel from the fuel tank;
a purge passage extending from the canister to connect with the intake passage;
a purge valve disposed in the purge passage such that the fuel stored in the canister flows to the intake passage through the purge passage when the purge valve is open;
a check valve disposed in the purge passage at a downstream position relative to a flow of fuel from the canister to the intake passage wherein the check valve is configured to prevent flow of intake air from the intake passage to the canister through the purge passage;
a controller coupled with the purge valve wherein the controller is configured to regulate the purge valve at least partially based on an intake passage pressure within the intake passage and an intermediate purge passage pressure within an intermediate purge passage of the purge passage located between the purge valve and the check valve; and
wherein the controller is further configured to estimate the intermediate purge passage pressure to be equal to the intake passage pressure or an atmospheric pressure dependent on a controlled opening and closing state of the purge valve.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of forming a hardmask pattern over a semiconductor device semiconductor device, the method comprising:
forming a first hardmask layer and a second hardmask layer over a semiconductor substrate;
forming first and second patterns of a first type over the second hardmask layer;
forming first and second overcoats over the first and second patterns of the first type, respectively, the first and second overcoats being conformal to the corresponding patterns of the first type, the first and second overcoats defining a space therebetween and configured to expose an underlying layer;
forming a filling layer to fill the space defined between the first and second overcoats;
removing the first and second overcoats to provide the first pattern of the first type, the second pattern of the first type, and an additional pattern provided between the first and second patterns of the first type; and
etching the second hardmask layer and the first hardmask layer using the first pattern of the first type, the second pattern of the first type, and the additional pattern to obtain hardmask patterns.
2. The method of claim 1, wherein the substrate defines a dense region and an isolated region, the dense region having more transistors per area than the isolated region, the method further comprising:
providing a pattern of a second type over the filling region, wherein the pattern of the second type covers in the dense region and exposes the isolated region, so that a portion the filling layer that is provided in the isolated region is exposed; and
removing the exposed filling layer in the isolated region while leaving the filling layer in the dense region intact.
3. The method of claim 2, further comprising:
removing the pattern of the second type, wherein the first and second overcoats are removed using the same process to remove the pattern of the second type.
4. The method of claim 1, wherein the first and second overcoats are formed using amorphous carbon.
5. The method of claim 1, wherein the first and second overcoats are configured to have substantially the same thickness.
6. The method of claim 1, wherein the first hardmask layer is formed from amorphous carbon.
7. The method of claim 1, wherein the second hardmask layer is formed from SiON.
8. The method of claim 1, wherein the second hardmask layer is formed from nitride.
9. The method of claim 1, wherein the first and second patterns of the first type are formed from polysilicon, wherein the underlying layer is the second hardmask layer.
10. The method of claim 1, wherein the filling layer is formed from spin on glass (SOG).
11. A method of forming a hardmask pattern over a semiconductor device semiconductor device, the method comprising:
forming a first hardmask layer over a semiconductor substrate;
forming first and second structures over the first hardmask layer, the first and second structures formed of the same material, the first and second structures defining a first pitch;
forming first and second overcoats over the first and second structures, respectively, the first and second overcoats being conformal to the first and second structures, respectively, the first and second overcoats defining a space therebetween and configured to expose an underlying layer;
forming a filling layer to fill the space defined between the first and second overcoats;
removing the first and second overcoats to provide the first structure, the second structure, and a third structure provided between the first and second structures, the first and third structures defining a second pitch, the second and third structures defining a third pitch; and
etching the first hardmask layer using the first, second, and third structures to obtain first, second, and third hardmask patterns, respectively.
12. The method of claim 11 , further comprising:
providing a second hardmask layer below the first hardmask layer, wherein the etching step involves etching the first and second hardmask layers to obtain the first, second, and third hardmask layers, each hardmask layer including the first and second hardmask layers.
13. The method of claim 11, wherein the substrate defines a dense region and an isolated region, the dense region having more transistors per area than the isolated region, the method further comprising:
providing a pattern over the filling region, wherein the pattern covers in the dense region and exposes the isolated region, so that a portion the filling layer that is provided in the isolated region is exposed; and
removing the exposed filling layer in the isolated region while leaving the filling layer in the dense region intact.
14. The method of claim 13, wherein the filling layer includes spin on glass.
15. The method of claim 14, wherein the pattern is a photoresist pattern.
16. The method of claim 15, wherein the pattern and the first and second overcoats are removed using the same process.
17. The method of claim 11, wherein the first pitch is greater than the second pitch or the third pitch, the second and third pitch being substantially the same.
18. The method of claim 17, wherein the second or third pitch has a dimension that is less than the maximum resolution of an exposure apparatus used to form the first and second structures.