1. An optical glass comprising, in mass % on oxide basis;
SiO2: 20 to 40%
B2O3: 10 to 30%
SrO: 10 to 30%
Al2O3: 5.5 to 15%
La2O3: 0.5 to 11%
Li2O: 3 to 12%
CaO: 0 to 10%
BaO: 0 to 9.5%, and
ZnO: 0 to 10%,
the optical glass having a liquidus temperature (L.T.) of 900\xb0 C. or lower.
2. The optical glass as claimed in claim 1, wherein, in mass % on oxide basis, BaO+La2O3 is from 5 to 20%, BaOLa2O3is 3 or less, and SrO(SrO+BaO+CaO) is from 0.5 to 1.
3. The optical glass as claimed in claim 1, having a refractive index (nd) of from 1.55 to 1.65 and an Abbe number (\u03bdd) of from 55 to 65.
4. The optical glass as claimed in claim 1, having a yield point (Ts) of 600\xb0 C. or lower.
5. The optical glass as claimed in claim 1, having a transmittance reduction ratio after holding under environment of a temperature of 60\xb0 C. and a relative humidity of 90% for 100 hours of 0.2 or less.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1-25. (Cancelled)
26. A semiconductor device having a first circuit area inside a semiconductor chip and a plurality of wiring layers which are formed above a main surface of a semiconductor substrate,
said wiring layers including a first wiring layer which is comprised of copper as a main element, with a plurality of first lines being formed thereof, and a second wiring layer which is an upmost wiring layer among said wiring layers and is comprised of aluminum as a main element, with a plurality of second lines being formed thereof,
a first line of said first wiring layer being formed by a buried line,
said second lines of said second wiring layer being made larger in thickness than said first lines of said first wiring layer which is immediately below said second wiring layer,
said second lines of said second wiring layer having a plurality of external terminals, a plurality of first power lines surrounding said first circuit area, and a plurality of second power lines each of which is directly connected to an external terminal and a first power line.
27. A semiconductor device according to claim 26, wherein said second lines are lower in sheet resistance than said first lines.