Author: claimsbot

What is claimed is:

1. An image sensing apparatus which causes an image processing section to execute image processing to convert digital image data, which is obtained by AD-converting an output from an image sensing element, into output image data, wherein
said image processing section comprises a matrix arithmetic processing section and an N-dimensional (N is a positive integer) lookup table arithmetic processing section and causes said matrix arithmetic processing section to process the digital image data before said N-dimensional lookup table arithmetic processing section.
2. The apparatus according to claim 1, wherein said matrix arithmetic processing section changes a coefficient to be used for matrix arithmetic processing in accordance with a color temperature of a light source.
3. The apparatus according to claim 1, wherein said N-dimensional lookup table arithmetic processing section outputs three output signals in correspondence with three input signals.
4. The apparatus according to claim 1, wherein said N-dimensional lookup table arithmetic processing section includes a three-dimensional lookup table formed from LMN (L, M, and N are arbitrary integers) lattice points and calculates data among the lattice points by interpolation arithmetic processing.
5. An image sensing apparatus which has an image sensing element and an AD conversion section which AD-converts an output from the image sensing element, causes an image processing section to execute image processing to convert digital image data obtained from the AD conversion section into output image data, and records the output image data in a recording medium, wherein
said image processing section comprises a white balance processing section, a matrix arithmetic processing section, and an N-dimensional lookup table arithmetic processing section where N is an integer not less than 3 and causes said matrix arithmetic processing section to process the digital image data before said N-dimensional lookup table arithmetic processing section.
6. The apparatus according to claim 5, wherein in said image processing section, said white balance processing section, said matrix arithmetic processing section, and said N-dimensional lookup table arithmetic processing section are arranged in an order named.
7. The apparatus according to claim 6, wherein
the apparatus further comprises an interpolation processing section which interpolates the output from the image sensing element having a color filter comprising a plurality of colors, and
said interpolation processing section is arranged before said N-dimensional lookup table arithmetic processing section.
8. The apparatus according to claim 1, wherein said N-dimensional lookup table arithmetic processing section stores a chrominance signal which considers a memory color of an input chrominance signal.
9. An image sensing method which comprises a sensing an image of an object with an image sensing element, and an AD-converting an output from the image sensing step, and executes image processing in an image processing step to convert digital image data obtained in the AD conversion processing into output image data, wherein
the image processing step comprises a matrix arithmetic processing step and an N-dimensional (N is a positive integer) lookup table arithmetic processing step and processes the digital image data in the matrix arithmetic processing step before the N-dimensional lookup table arithmetic processing step.
10. The method according to claim 9, wherein in the matrix arithmetic processing step, a coefficient to be used for matrix arithmetic processing is changed in accordance with a color temperature of a light source.
11. The method according to claim 9, wherein in the N-dimensional lookup table arithmetic processing step, N output signals are output in correspondence with N input signals.
12. The method according to claim 9, wherein
the image processing step further comprises a white balance processing step, and
the digital image data is processed in the white balance processing step before the N-dimensional lookup table arithmetic processing step.
13. The method according to claim 12, wherein in the image processing step, the white balance processing step, the matrix arithmetic processing step, and the N-dimensional lookup table arithmetic processing step are executed in an order named.
14. The method according to claim 9, wherein
the method further comprises an interpolation processing step of interpolating the output from the image sensing element having a color filter comprising a plurality of colors, and
the interpolation processing step executes processing before the N-dimensional lookup table arithmetic processing step.
15. The method according to claim 9, wherein in the N-dimensional lookup table arithmetic processing step, an input chrominance signal is converted into a chrominance signal which considers a memory color of the input chrominance signal.
16. The method according to claim 9, wherein in the N-dimensional lookup table arithmetic processing step, a three-dimensional lookup table formed from LMN (L, M, and N are arbitrary integers) lattice points is included, data among the lattice points is calculated by interpolation arithmetic processing.
17. A program causing a computer to execute an image sensing method of claim 9.
18. A computer-readable storage medium storing a program of claim 17.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of making measurements of block error ratio in a layered protocol communications system, the block error ratio being a ratio of a number of blocks received with one or more errors to a total number of blocks received, the method comprising:
sending at least one message block which is defined at a selected layer in a protocol stack below a topmost layer thereof to open an information block flow and sending additional such message blocks to maintain the information block flow;
monitoring acknack messages sent in response to the message blocks to determine whether the message blocks have been correctly transported; and
calculating said block error ratio measurements based at least in part on the monitored acknack messages.
2. The method of claim 1, wherein the message blocks have a predetermined characteristic which causes the message blocks to be discarded upon processing at the selected protocol layer in a communications unit receiving the message blocks.
3. The method of claim 1, wherein the communications system is a general packet radio service (GPRS) and the selected protocol layer is a GPRS mobility management layer.
4. The method of claim 3, wherein the repeated message blocks are GMM_INFORMATION message blocks, said GMM_INFORMATION message blocks being information message blocks associated with the general packet radio service (GPRS).
5. The method of claim 4, wherein the predetermined characteristic comprises absence from a message block of any information elements other than a message header.
6. The method of claim 1, wherein the communications system is a general packet radio service (GPRS) and the selected protocol layer is a GPRS logical link control layer.
7. The method of claim 6, wherein the repeated message blocks are GRR_DATA_REQ message blocks, wherein said GRR_DATA_REQ message blocks are information blocks associated with the general packet radio service (GPRS).
8. The method of claim 7, wherein the predetermined characteristic comprises inclusion in a message block of an invalid frame check sequence.
9. The method of claim 1 wherein the steps of sending at least one message block to open an information block flow and sending additional such message blocks to maintain the information block flow occurs at a transmitting station and wherein the step of monitoring acknack messages sent in response to the message blocks also occurs at said transmitting station.
10. A method of making measurements of block error ratio in a layered protocol communications system, the block error ratio being a ratio of a number of blocks received with one or more errors to a total number of blocks received, the method comprising:
constructing message blocks to conform to a message structure defined at a selected layer below a topmost layer in a protocol stack of the layered protocol communications system;
sending at least one of said message blocks through the system to open an information block flow and sending additional such message blocks through the system to maintain the information block flow;
monitoring acknack messages sent in response to the message blocks to determine whether the message blocks have been correctly transported; and
measuring block error ratio as a predetermined function of occurrence of monitored nack messages.
11. The method of claim 10, wherein the message blocks are constructed to have a predetermined characteristic that causes the message blocks to be discarded upon processing at the selected protocol layer in a communications unit receiving the message blocks.
12. The method of claim 10, wherein the communications system is a general packet radio service (GPRS) and the selected protocol layer is a GPRS mobility management layer.
13. The method of claim 12, wherein the repeated message blocks are GMM_INFORMATION message blocks, wherein said GMM_INFORMATION message blocks are information message blocks associated with the general packet radio service (GPRS).
14. The method of claim 13, wherein the message blocks are constructed to have a predetermined characteristic that causes the message blocks to be discarded upon processing at the selected protocol layer in a communications unit receiving the message blocks, the predetermined characteristic comprising absence from a message block of any information elements other than a message header.
15. The method of claim 14, wherein the message blocks are constructed to have a predetermined characteristic that causes the message blocks to be discarded upon processing at the selected protocol layer in a communications unit receiving the message blocks, the predetermined characteristic comprising inclusion in a message block of an invalid frame check sequence.
16. The method of claim 10, wherein the communications system is a general packet radio service (GPRS) and the selected protocol layer is a GPRS logical link control layer.
17. The method of claim 16, wherein the repeated message blocks are GRR_DATA_REQ message blocks, wherein said GRR_DATA_REQ message blocks are information associated with the general packet radio service (GPRS).
18. A method of making measurements of block error ratio in a general packet radio service (GPRS) layered protocol communications system, the block error ratio being a ratio of a number of blocks received with one or more errors to a total number of blocks received, the method comprising:
constructing message blocks to conform to a message structure defined at a selected one of
(i) a GPRS mobility management layer and
(ii) a GPRS logical link control layer
\u2003in a protocol stack of the GPRS layered protocol communications system, said message blocks being respectively one of
(i) GMM_INFORMATION message blocks defined in the mobility management layer, wherein said GMM_INFORMATION message blocks are information message blocks associated with the general packet radio service (GPRS), and
(ii) GRR_DATA_REQ message blocks defined in the logical link control layer, wherein said GRR_DATA_REQ message blocks are information associated with the general packet radio service (GPRS);

sending at least one of said message blocks through the system to open an information block flow and sending additional such message blocks through the system to maintain the information block flow;
monitoring acknack messages sent in response to the message blocks to determine whether the message blocks have been correctly transported; and
measuring block error ratio as a predetermined function of occurrence of monitored nack messages.
19. The method of claim 18, wherein the message blocks are constructed to have a predetermined characteristic that causes the message blocks to be discarded upon processing at the selected protocol layer in a communications unit receiving the message blocks.
20. The method of claim 19, wherein the predetermined characteristic comprises:
(i) absence from a message block of any information elements other than a message header in the case of GMM_INFORMATION message blocks, wherein said GMM_INFORMATION message blocks are information message blocks associated with the general packet radio service (GPRS), and
(ii) inclusion in a message block of an invalid frame check sequence in the case of GRR_DATA_REQ message blocks, wherein said GRR_DATA_REQ message blocks are information associated with the general packet radio service (GPRS).
21. Apparatus for making measurements of block error ratio in a layered protocol communications system, the block error ratio being a ratio of a number of blocks received with one or more errors to a total number of blocks received, the apparatus comprising:
a message block transmitter for constructing message blocks to conform to a message structure defined at a selected layer below a topmost layer in a protocol stack of the layered protocol communications system, and for sending at least one of said message blocks through the system to open an information block flow and sending additional such message blocks through the system to maintain the information block flow; and
a monitor for monitoring acknack messages sent in response to the message blocks to determine whether the message blocks have been correctly transported, and for measuring block error ratio as a predetermined function of occurrence of monitored nack messages.
22. Apparatus for making measurements of block error ratio in a general packet radio service (GPRS) layered protocol communications system, the block error ratio being a ratio of a number of blocks received with one or more errors to a total number of blocks received, the apparatus comprising:
a message block transmitter for constructing message blocks to conform to a message structure defined at a selected one of
(i) a GPRS mobility management layer and
(ii) a GPRS logical link control layer
\u2003in a protocol stack of the GPRS layered protocol communications system, said message blocks being respectively one of
(i) GMM_INFORMATION message blocks defined in the mobility management layer, wherein said GMM_INFORMATION message blocks are information message blocks associated with the general packet radio service (GPRS), and
(ii) GRR_DATA_REQ message blocks defined in the logical link control layer, wherein said GRR_DATA_REQ message blocks are information blocks provided with a three-octet header and a three-octet frame check sequence,
and sending at least one of said message blocks through the system to open an information block flow and sending additional such message blocks through the system to maintain the information block flow; and
a monitor for monitoring acknack messages sent in response to the message blocks to determine whether the message blocks have been correctly transported, and for measuring block error ratio as a predetermined function of occurrence of monitored nack messages.

1. A method to create an enclosure of an electronic device, comprising:
machining a metal slab to produce a single homogenous part that serves as an integral primary enclosure configured to enclose circuitry of the electronic device, wherein, prior to machining the metal slab, the metal slab has outer surfaces that form outer dimensions and wherein machining the metal slab includes selectively removing material from the outer surfaces of the metal slab to reduce the outer dimensions of the metal slab and to form an integral top wall and side walls of the enclosure.
2. The method defined in claim 1 wherein the metal slab comprises an aluminum slab, wherein the single homogenous part provides structural support for the electronic device, wherein machining the metal slab comprises removing material from surfaces of the aluminum slab in a rough cutting operation and in at least one detailed cutting operation.
3. The method defined in claim 1 wherein machining the metal slab comprises a rough machining operation and at least one detailed machining operation, wherein the metal slab comprises an aluminum slab, wherein machining the metal slab comprises producing a flat surface on the single homogenous part, and wherein the flat surface serves as at least part of a cosmetic exterior for the electronic device.
4. The method defined in claim 1 wherein the metal slab comprises a rough aluminum casting of the single homogenous part, wherein machining the metal slab comprises performing a flycut operation to produce a flat surface on the single homogenous part, wherein the flat surface serves as at least part of a cosmetic exterior for the electronic device, and wherein performing the flycut operation to produce the flat surface comprises removing material from at least one surface of the metal slab to produce the flat surface.
5. The method defined in claim 4 wherein machining the metal slab to produce the single homogenous part comprises removing material from the metal part such that the single homogenous part has a weight that is less than fifty percent of the weight of the metal slab before the machining of the metal slab, the method further comprising performing an anodizing operation to produce the single homogenous part.
6. The method defined in claim 1 wherein machining the metal slab to produce the single homogenous part comprises removing material from the metal slab such that the single homogenous part has a weight that is less than fifty percent of the weight of the metal slab before the machining of the metal slab, the method further comprising anodizing the single homogenous part.
7. The method defined in claim 1 further comprising:
after machining the metal slab to produce the single homogenous part, anodizing the single homogenous part.
8. The method defined in claim 7 further comprising:
after anodizing the single homogenous part, creating perforations in the single homogenous part.
9. The method defined in claim 7 wherein the single homogenous part comprises aluminum, the method further comprising:
after anodizing the single homogenous part, etching anodized portions of the single homogenous part to expose aluminum portions of the single part.
10. A method of forming a single unified metal housing member, the method comprising:
obtaining a single core of metal material; and
eliminating surfaces of the single core of metal material to form the single unified metal housing member and to form integral features in the single unified metal housing member, the integral features including a top wall and side walls extending from the top wall, the top wall and side walls defining a cavity, one or more surfaces of the cavity including one or more integral attachment points.
11. The method as recited in claim 10 further comprising:
attaching electronic components within the cavity of the single unified housing member via the one or more integral attachment points, the single unified housing member being configured to act as an exoskeleton that surrounds, supports and carries the internally attached electronic components.
12. The method as recited in claim 11 wherein eliminating the surfaces comprises machining a majority of the surfaces of the single unified housing member.
13. The method as recited in claim 11 wherein the single core of metal has a first shape, wherein eliminating the surfaces comprises performing at least one machining operation to produce the single homogenous part with a second shape that is encompassed by the first shape of the single core of metal.
14. The method as recited in claim 10 wherein eliminating the surfaces of the single core of metal material to form the single unified metal housing member and to form the integral features comprises at least one rough cutting operation and at least one detailed cutting operation.
15. A method of creating an integral housing member of a portable computer, the method comprising:
obtaining an aluminum slab, the aluminum slab having a first shape that is associated with the integral housing member; and
selectively removing material from the aluminum slab via one or more machining operations, the one or more machining operations including:
forming the integral housing member as a single homogenous aluminum housing member having a second shape that is less than the first shape and including a top wall, integral side walls, and a cavity, the cavity being defined by the top wall and the integral side walls and the cavity providing for placement of various components of the portable computer.
16. The method defined in claim 15, wherein selectively removing material from the aluminum slab via the one or more machining operations comprises machining all of the surfaces of the integral housing member.
17. The method defined in claim 15, wherein the aluminum slab has a top and an underside, wherein selectively removing material from the aluminum slab via the one or more machining operations comprises machining the top of the aluminum slab to produce a substantially horizontal portion on the top wall, machining the underside of the aluminum slab to form the cavity, and machining a substantially vertical portion on the integral sidewalls, and wherein the height of the sidewalls is substantially equal to the height of the portable computer.
18. The method defined in claim 15, wherein, prior to selectively removing material from the aluminum slab, the aluminum slab has a first weight and wherein the one or more machining operations include one or more rough machining steps that reduce the weight of the aluminum slab to a second weight that is at most 60% of the first weight.
19. The method defined in claim 15, wherein the one or more machining operations comprise at least one machining operation selected from the group consisting of:
machining integral attachment features within the cavity of the integral housing member;
machining a plurality of individual openings within the top wall of the integral housing member, the openings being configured to receive individual keys of a keyboard;
machining an opening within the top wall of the integral housing member, the opening being configured to receive a touchpad assembly;
machining one or more openings within the integral sidewalls of the integral housing member, the openings being configured as access points between the cavity and the exterior of the portable computer;
machining a cut out within the integral housing member, the cut out being configured for a hinge mechanism; and
machining ribs and flanges within the cavity of the integral housing member to enhance the structural integrity of the integral housing member.
20. The method defined in claim 15 wherein the aluminum slab has first, second, and third outer dimensions that are orthogonal to each other, wherein the third outer dimension of the aluminum slab is smaller than both the first and second outer dimensions of the metal slab, and wherein the one or more machining operations also include reducing the third outer dimension of the aluminum slab.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An absolute position length measurement encoder comprising:
a scale in which an absolute (ABS) pattern based on a pseudorandom code is provided;
a light-receiving element for receiving bright and dark patterns formed by the scale, the light receiving element including an ABS light-receiving element array having an array interval PPDA; and
a signal processing circuit for processing signals sublected to output of the light-receiving element and measuring an absolute position of the scale to the light-receiving element;
wherein the signal processing circuit includes a space-dividing number conversion circuit that obtains a smaller interval D than the array interval PPDA of the ABS light-receiving element array of the light-receiving element, and simultaneously obtains and outputs a digital value for each interval D sublected to output of the ABS light-receiving element array;
wherein the signal processing circuit further includes a correlation circuit for executing arithmetic operations for correlation between the digital value subjected to output of the space-dividing number conversion circuit and a design value of the pseudorandom code;
wherein a digital value subjected to arithmetic operations for correlation by the correlation circuit is made into a value binarized by a unit of a minimum line width PABS of the ABS pattern; and
wherein the signal processing circuit comprising;
in an input side of the correlation circuit,
an edge position detection circuit for first binarizing a signal output from the space-dividing number conversion circuit;
a peak position detection circuit for preparing a histogram with respect to a position where a value obtained from a signal differentiated and made into an absolute value after being binarized becomes a local maximum value, for each of the minimum line width PABS of the ABS pattern and for obtaining a peak position PK from the histogram; and
a decoding circuit for processing the peak position PK based on the binarized value of a signal as the position where the pseudorandom code to be decoded is changed over; and

in an output side of the correlation circuit,
a position data synthesizing circuit for obtaining an accurate absolute position, with respect to a before-ABS-correction position signal output from the correlation circuit, through position correction by shifting the absolute position only by the peak position PK by means of a peak position signal obtained by the peak position detection circuit.
2. The absolute position length measurement encoder according to claim 1, wherein the peak position detection circuit obtains the peak position PK by interpolating respective values of the histogram by fitting a probability distribution function by the least-squares method.
3. The absolute position length measurement encoder according to claim 1, wherein the decoding circuit obtains respective total number of the binarized values in the minimum line width PABS, determines and decodes the code of the minimum line width PABS with a value having a greater total number.
4. The absolute position length measurement encoder according to claim 1, wherein the correlation circuit carries out arithmetic operations for correlation between the decoded pseudorandom code and the design value of the pseudorandom code, and obtains the absolute position of the scale with respect to the light-receiving element.
5. The absolute position length measurement encoder according to claim 1, wherein the position data synthesizing circuit synthesizes position data by adding the peak position PK of the peak position signal to the absolute position of the absolute position signal.