Author: claimsbot

What is claimed is:

1. A method of analyzing faults occurring in a semiconductor device, by the use of bitmap data produced as a test result by a tester which is for the semiconductor device and which comprises a first memory, the semiconductor device comprising circuitry elements which are arranged regularly in the semiconductor device and which correspond to bits having addresses in the bitmap data, respectively, the bitmap data being stored in the first memory of the tester and including fault bits which are the bits corresponding to the circuitry elements having the faults, the method being executed at a computer system including a second memory, the method comprising:
defining and initializing a plurality of difference emergence values, so that all of the difference emergence values have zeros as initial values and are stored in the second memory;
reading the bitmap data out of the first memory to write into the second memory coordinate values of all of the fault bits included in the bitmap data;
selecting a pair of the fault bits from all of the fault bits to calculate a difference value between the addresses of the pair of fault bits, with reference to the coordinate values written into the second memory;
adding one to the difference emergence value related to the difference value which is obtained as a result of the calculation in the selecting, so that the difference emergence value is updated and stored in the second memory;
repeatedly executing the selecting and the adding until all pairs of the fault bits are completely processed, so that the difference emergence values indicate the numbers of times the difference values emerge in calculation results in the selecting repeatedly executed; then
deriving from all of the difference emergence values an expectation function which represents a distribution of the fault bits;
judging, on the basis of the expectation function, whether or not the distribution of the fault bits has a regular profile; and
calculating a period of the regular profile on the basis of the expectation function when the distribution has the regular profile.
2. An analyzing method as claimed in claim 1, wherein;
the expectation function has a plurality of peaks; and
the judging comprises identifying a maximum peak among the peaks of the expectation function, so that the distribution is judged to have the regular profile when the maximum peak of the expectation function is greater than one.
3. An analyzing method as claimed in claim 2, wherein the expectation function comprises, as factors, divisors included in each of the difference values corresponding to difference emergence values, so that the calculating is carried out by the use of the factors of expectation function.
4. An analyzing method as claimed in claim 3, wherein the calculating comprises computing the period of the regular profile at a value of the factor which causes the expectation function to have the maximum peak.
5. An analyzing method as claimed in claim 3, wherein the calculating comprises:
obtaining a next maximum peak among the peaks of the expectation function, the next maximum peak being a maximum peak next to the maximum peak; and
computing the period of the regular profile at an absolute value of a difference between values of the factors which cause the expectation function to have the maximum peak and the next maximum peak, respectively.
6. An analyzing method as claimed in claim 1, wherein the judging comprising:
averaging each of values of the expectation function at each of the factors to obtain average values; and
identifying a maximum one of the average values,. so that the distribution is judged to have the regular profile when the maximum average value is greater than one.
7. An analyzing method as claimed in claim 6, wherein the calculating comprises computing the period of the regular profile at a value of the factor which relates to the maximum average value.
8. A fault analyzer which is adapted to analyze faults occurring in a semiconductor device, by the use of bitmap data produced as a test result by a tester which is for the semiconductor device and which comprises a memory, the semiconductor device comprising circuitry elements which are arranged regularly in the semiconductor device and which correspond to bits having addresses in the bitmap data, respectively, the bitmap data being stored in the memory of the tester and including fault bits which are the bits corresponding to the circuitry elements having the faults, said fault analyzer comprising:
a processor, and
a memory including software instructions adapted to enable said processor to cause the fault analyzer to perform:
defining and initializing a plurality of difference emergence values, so that all of the difference emergence values have zeros as initial values and are stored in the memory of the fault analyzer;
reading the bitmap data out of the first memory to write, into the memory of the fault analyzer, coordinate values of all of the fault bits included in the bitmap data;
selecting a pair of the fault bits from all of the fault bits to calculate a difference value between the addresses of the pair of fault bits, with reference to the coordinate values written into the memory of the fault analyzer;
adding one to the difference emergence value related to the difference value which is obtained as a result of the calculation in the selecting, so that the difference emergence value is updated and stored in the memory of the fault analyzer;
repeatedly executing the selecting and the adding until all pairs of the fault bits are completely processed, so that the difference emergence values indicate the numbers of times the difference values emerge in calculation results in the selecting repeatedly executed; then
deriving from all of the difference emergence values an expectation function which represents a distribution of the fault bits;
judging, on the basis of the expectation function, whether or not the distribution of the fault bits has a regular profile; and
calculating a period of the regular profile on the basis of the expectation function when the distribution has the regular profile.
9. A fault analyzer as claimed in claim 8, wherein:
the expectation function has a plurality of peaks; and
the memory of the fault analyzer further includes software instructions adapted to enable the fault analyzer further to perform the judging so as to include identifying a maximum peak among the peaks of the expectation function, so that the distribution is judged to have the regular profile when the maximum peak of the expectation function is greater than one.
10. A fault analyzer as claimed in claim 9, wherein the expectation function comprises, as factors, divisors included in each of the difference values corresponding to difference emergence values, so that the calculating is carried out by the use of the factors of expectation function.
11. A fault analyzer as claimed in claim 10, wherein the memory of the fault analyzer further includes software instructions adapted to enable the fault analyzer further to perform the calculating so as to include computing the period of the regular profile at a value of the factor which causes the expectation function to have the maximum peak.
12. A fault analyzer as claimed in claim 10, wherein the memory of the fault analyzer further includes software instructions adapted to enable the fault analyzer further to perform the calculating so as to include:
obtaining a next maximum peak among the peaks of the expectation function, the next maximum peak being a maximum peak next to the maximum peak; and
computing the period of the regular profile at an absolute value of a difference between values of the factors which cause the expectation function to have the maximum peak and the next maximum peak, respectively.
13. A fault analyzer as claimed in claim 8, wherein the memory of the fault analyzer further includes software instructions adapted to enable the fault analyzer further to perform the judging so as to include:
averaging each of values of the expectation function at each of the factors to obtain average values; and
identifying a maximum one of the average values, so that the distribution is judged to have the regular profile when the maximum average value is greater than one.
14. A fault analyzer as claimed in claim 13, wherein the memory of the fault analyzer further includes software instructions adapted to enable the fault analyzer further to perform the calculating so as to include computing the period of the regular profile at a value of the factor which relates to the maximum average value.
15. A computer program product for use in a computer system comprising a processor and a memory, the computer program product being for enabling a processor to perform as a fault analyzer which is adapted to analyze faults occurring in a semiconductor device, by the use of bitmap data produced as a test result by a tester which is for the semiconductor device and which comprises a memory, the semiconductor device comprising circuitry elements which are arranged regularly in the semiconductor device and which correspond to bits having addresses in the bitmap data, respectively, the bitmap data being stored in the memory of the tester and including fault bits which are the bits corresponding to the circuitry elements having the faults, said computer program product comprising:
software instructions for enabling the processor to perform predetermined operations, and
a computer readable medium bearing the software instructions:
the predetermined operations including:
defining and initializing a plurality of difference emergence values, so that all of the difference emergence values have zeros as initial values and are stored in the memory of the computer system;
reading the bitmap data out of the first memory to write, into the memory of the computer system, coordinate values of all of the fault bits included in the bitmap data;
selecting a pair of the fault bits from all of the fault bits to calculate a difference value between the addresses of the pair of fault bits, with reference to the coordinate values written into the memory of the computer system;
adding one to the difference emergence value related to the difference value which is obtained as a result of the calculation in the selecting, so that the difference emergence value is updated and stored in the memory of the computer system;
repeatedly executing the selecting and the adding until all pairs of the fault bits are completely processed, so that the difference emergence values indicate the numbers of times the difference values emerge in calculation results in the selecting repeatedly executed; then
deriving from all of the difference emergence values an expectation function which represents a distribution of the fault bits;
judging, on the basis of the expectation function, whether or not the distribution of the fault bits has a regular profile; and
calculating a period of the regular profile on the basis of the expectation function when the distribution has the regular profile.
16. A computer program product as claimed in claim 15, wherein:
the expectation function has a plurality of peaks; and
the judging is performed so as to include identifying a maximum peak among the peaks of the expectation function, so that the distribution is judged to have the regular profile when the maximum peak of the expectation function is greater than one.
17. A computer program product as claimed in claim 16, wherein the expectation function comprises, as factors, divisors included in each of the difference values corresponding to difference emergence values, so that the calculating is carried out by the use of the factors of expectation function.
18. A computer program product as claimed in claim 17, wherein the calculating is performed so as to include computing the period of the regular profile at a value of the factor which causes the expectation function to have the maximum peak.
19. A computer program product as claimed in claim 17, wherein the calculating is performed so as to include:
obtaining a next maximum peak among the peaks of the expectation function, the next maximum peak being a maximum peak next to the maximum peak; and
computing the period of the regular profile at an absolute value of a difference between values of the factors which cause the expectation function to have the maximum peak and the next maximum peak, respectively.
20. A computer program product as claimed in claim 15, wherein the judging is performed so as to include:
averaging each of values of the expectation function at each of the factors to obtain average values; and
identifying a maximum one of the average values, so that the distribution is judged to have the regular profile when the maximum average value is greater than one.
21. A computer program product as claimed in claim 20, wherein the calculating is performed so as to include computing the period of the regular profile at a value of the factor which relates to the maximum average value.
22. A method of analyzing faults occurring in a semiconductor device, by the use of bitmap data produced as a test result by a tester which is for the semiconductor device, the semiconductor device comprising circuitry elements which are arranged regularly in the semiconductor device and which corresponds to bits in the bitmap data, respectively, the bitmap data including fault bits which are the bits corresponding to the circuitry elements having the faults, the method comprising:
setting up, by the use of the bitmap data produced by the tester, an expectation function which represents a distribution of the fault bits and which has factors including a predetermined factor;
judging, on the basis of the expectation function, whether or not the distribution of the fault bits has a regular profile; and
calculating a period of the regular profile on the basis of the predetermined factor, when the distribution has the regular profile.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A video monitor mount comprising:
a wall piece having an integral bubble level, the wall piece including a first cradle and a second cradle separated from the first cradle;
a support bar configured to be supported by the first cradle and second cradle, and wherein the support bar is configured to extend between the first cradle and second cradle, and wherein the support bar is configured to rotate within the first cradle and second cradle; and
a cord management hook comprising a first loop and a second loop, the second loop separated from the first loop, the first loop configured to mate with the support bar and to slide along the support bar, and wherein the second loop is configured to receive at least one cord, wherein the wall piece comprises a wall portion, and wherein the first cradle and second cradle extend from the wall portion at an angle not parallel with the wall portion, and wherein the first cradle comprises a first latch, and wherein the second cradle comprises a second latch, and wherein the first latch is configured to alternate between an open configuration such that the support bar can be placed in the first cradle and a closed configuration such that the support bar cannot be removed from the first cradle, and wherein the second latch is configured to alternate between an open configuration such that the support bar can be placed in the second cradle and a closed configuration such that the support bar cannot be removed from the second cradle.
2. The mount of claim 1 wherein at least one of the first cradle and second cradle further comprises a screw hole and wherein at least one of the first latch and second latch comprises a screw hole matched with the screw hole of the first cradle or second cradle, and wherein the latch is locked in position when a screw is inserted between the latch and cradle.
3. A video monitor mount comprising:
a wall piece having an integral bubble level, the wall piece including a first cradle and a second cradle separated from the first cradle;
a support bar configured to be supported by the first cradle and second cradle, and wherein the support bar is configured to extend between the first cradle and second cradle, and wherein the support bar is configured to rotate within the first cradle and second cradle; and
a cord management hook comprising a first loop and a second loop, the second loop separated from the first loop, the first loop configured to mate with the support bar and to slide along the support bar, and wherein the second loop is configured to receive at least one cord further comprising a first monitor bracket including a first aperture and a second monitor bracket including a second aperture, and wherein the support bar is configured to slide within the first aperture and second aperture and wherein the first monitor bracket slides with respect to the support bar independent of the second monitor bracket and wherein the second monitor bracket slides with respect to the support bar independent of the first monitor bracket.
4. A video monitor mount comprising:
a wall piece having an integral bubble level, the wall piece including a first cradle and a second cradle separated from the first cradle;
a support bar configured to be supported by the first cradle and second cradle, and wherein the support bar is configured to extend between the first cradle and second cradle, and wherein the support bar is configured to rotate within the first cradle and second cradle; and
a cord management hook comprising a first loop and a second loop, the second loop separated from the first loop, the first loop configured to mate with the support bar and to slide along the support bar, and wherein the second loop is configured to receive at least one cord wherein the wall piece comprises a wall portion and wherein the wall piece further includes a tilt bar between the first cradle and second cradle and wherein the tilt bar is spring loaded with a knob including a position selection device configured to lock the tilt bar in a position at an angle with respect to the wall portion.
5. A video monitor mount comprising:
a wall piece having an integral bubble level, the wall piece including a first cradle and a second cradle separated from the first cradle;
a support bar configured to be supported by the first cradle and second cradle, and wherein the support bar is configured to extend between the first cradle and second cradle, and wherein the support bar is configured to rotate within the first cradle and second cradle; and
a cord management hook comprising a first loop and a second loop, the second loop separated from the first loop, the first loop configured to mate with the support bar and to slide along the support bar, and wherein the second loop is configured to receive at least one cord and wherein the wall piece further includes a tilt bar extending between the first cradle and second cradle, wherein the support bar comprises a first monitor bracket and a second monitor bracket mounted thereon, further comprising a knob to turn the tilt bar to tilt the first monitor bracket and second monitor bracket at an angle with respect to the wall piece.

1. A method of treating ballast water, comprising:
a) mixing an iron salt and an oxidizing agent in a mixing chamber to provide a mixture;
b) delivering at least a portion of the mixture to a reaction chamber;
c) continuously generating ferrate in the reaction chamber;
d) delivering at least a portion of the ferrate to a site of use that is proximal to the reaction chamber, wherein said site of use is a site where said ballast water is held;
e) contacting said ferrate with said ballast water, whereby organic matter in said ballast water is oxidized; and
f) adding additional iron salt and oxidizing agent to the mixing chamber.
2. The method of claim 1, further comprising adding a base to the mixture.
3. The method of claim 1, additionally comprising repeating steps (b) through (e).
4. The method of claim 1, wherein said additional iron salt and oxidizing agent in step (f) is added in an amount to substantially replace the portion of the mixture delivered to the reaction chamber.
5. The method of claim 2, wherein said base comprises an ion selected from the group consisting of a nitrogen base, a hydroxide ion, an oxide ion, a carbonate ion, and a combination thereof.
6. The method of claim 2, wherein said base is sodium hydroxide.
7. The method of claim 1, wherein said iron salt is selected from the group consisting of ferric nitrate, ferrous nitrate, ferric chloride, ferrous chloride, ferric bromide, ferrous bromide, ferric sulfate, ferrous sulfate, ferric phosphate, ferrous phosphate, ferric hydroxide, ferrous hydroxide, ferric oxide, ferrous oxide, ferric hydrogen carbonate, ferrous hydrogen carbonate, ferric carbonate, ferrous carbonate, and a combination thereof.
8. The method of claim 1, wherein said iron salt is ferric chloride.
9. The method of claim 1, wherein said oxidizing agent comprises at least one of the following: a hypohalite ion, a halite ion, a halate ion, a perhalate ion, ozone, potassium peroxymonopersulfate, potassium monopersulfate, halogen, a peroxide, a peracid, a salt of a peracid, Caro’s acid, and a combination thereof.
10. The method of claim 1, wherein said oxidizing agent comprises sodium hypochlorite.
11. A method of synthesizing ferrate, comprising:
a) mixing an aqueous solution comprising an iron salt and an oxidizing agent in a mixing chamber to form a solution of ferrate;
b) delivering at least a portion of the solution of ferrate to a site of use that is proximal to the mixing chamber, wherein said site of use is a site where ballast water is held; and
c) contacting said ferrate with said ballast water, whereby organic matter in said ballast water is oxidized.
12. The method of claim 11, further comprising adding a base to the aqueous solution.
13. The method of claim 12, wherein said base comprises an ion selected from the group consisting of a nitrogen base, a hydroxide ion, an oxide ion, a carbonate ion, and a combination thereof.
14. The method of claim 11, wherein said iron salt is selected from the group consisting of ferric nitrate, ferrous nitrate, ferric chloride, ferrous chloride, ferric bromide, ferrous bromide, ferric sulfate, ferrous sulfate, ferric phosphate, ferrous phosphate, ferric hydroxide, ferrous hydroxide, ferric oxide, ferrous oxide, ferric hydrogen carbonate, ferrous hydrogen carbonate, ferric carbonate, ferrous carbonate, and a combination thereof.
15. The method of claim 11, wherein said oxidizing agent comprises at least one of the following: a hypohalite ion, a halite ion, a halate ion, a perhalate ion, ozone, potassium peroxymonopersulfate, potassium monopersulfate, halogen, a peroxide, a peracid, a salt of a peracid, Caro’s acid, and a combination thereof.
16. The method of claim 11, further comprising adding additional iron salt and oxidizing agent to the mixing chamber in an amount to substantially replace the portion of the aqueous solution delivered to the site of use.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A wavelength conversion laser device comprising:
a laser light source for emitting first wavelength light;
a non-linear optical crystal for converting the first wavelength light into second wavelength light;
a rotational driver for rotating the non-linear optical crystal so as to alter an incidence angle of the first wavelength light with respect to the non-linear optical crystal;
a rotational driving controller for detecting a portion of an output of the second wavelength light, generating a rotational control signal of the non-linear optical crystal in accordance with a change in the output, and transmitting the rotational control signal to the rotational driver;
a beam location maintaining mirror for retroreflecting the second wavelength light, outputted from the non-linear optical crystal, along a substantially same path as that of the first wavelength light which travels from the laser light source to the non-linear optical crystal; and
an output beam distributor disposed between the laser light source and the non-linear optical crystal to guide the retroreflected second wavelength light in a desired output direction.
2. The wavelength conversion laser device according to claim 1, wherein the non-linear optical crystal rotational driver comprises:
an electronic controller for driving the rotational driver in accordance with the change in the output of the second wavelength light from the non-linear optical crystal so that the second wavelength light of the non-linear optical crystal is phase-matched with the first wavelength light; and
a monitor beam distributor for sampling a portion of the light outputted from the non-linear optical crystal to provide to the electronic controller.
3. The wavelength conversion laser device according to claim 2, wherein the electronic controller comprises:
an output monitor for detecting the change in the output of the second wavelength light;
a driving controller for generating a rotational control signal corresponding to a change in the incidence angle of the first wavelength light on the non-linear optical crystal in accordance with the change in the output of the second wavelength light so that the second wavelength light is phase-matched with the first wavelength light, and transmitting the rotational control signal to the rotational driver.
4. The wavelength conversion laser device according to claim 2, wherein the monitor beam distributor is disposed on an output path provided by the output beam distributor.
5. The wavelength conversion laser device according to claim 2, wherein the rotational driving controller comprises a spectral filter disposed between the electronic controller and the monitor beam distributor, the spectral filter selectively splitting the second wavelength light and providing the split second wavelength to the electronic controller.
6. The wavelength conversion laser device according to claim 1, wherein the output beam distributor selectively splits only the second wavelength light to propagate in the desired output path.
7. The wavelength conversion laser device according to claim 1, wherein the beam location maintaining mirror has a high reflectivity for the first wavelength light, and the output beam distributor has no reflectivity for the first wavelength light,
whereby the beam location maintaining mirror and the output beam distributor cooperate with a mirror disposed at an edge of the laser light source to provide an external resonator for the first wavelength light.