1460759479-6a159a4b-f2c5-479d-96ce-d3958e5002ab

1. An LED display apparatus comprising:
two LED arrays for performing as a light source wherein a plurality of LEDs are arrayed in two rows;
a housing to house the two LED arrays;
two transparent panels of which one side is attached to the housing so that the LEDs can shed light through the side of the transparent panels;
dispersion scratches on the transparent panels for refracting, reflecting and diffusing LED light wherein the dispersion scratches are configured to form a sign; and
two additional panels treated with fluorescent paint for enhancing the intensity of LED light refracted or reflected wherein each panel treated with fluorescent paint is attached to each additional transparent panel on the side having the dispersion scratch and the fluorescent paint glows by reflecting the LED light;

wherein the dispersion scratches are configured to be a letter, sign, symbol or design component for being bright as against the rest of dark plain background of the transparent panels.
2. The LED display apparatus of claim 1, wherein the two LED arrays have different light colors.
3. The LED display apparatus of claim 1, wherein the two transparent panels comprise acrylic.
4. The LED display apparatus of claim 3, wherein the acrylic has the function of edge lighting by the LED light.
5. The LED display apparatus of claim 1, wherein the dispersion scratches are made vertically by means of drill.
6. The LED display apparatus of claim 1, wherein the two additional panels treated with fluorescent paint comprise fluorescent paint which is treated on the panels at the substantially same places as the dispersion scratches are made so that the sign by the dispersion scratches lights more intensely by the fluorescent paint.
7. The LED display apparatus of claim 6, wherein the two additional panels treated with fluorescent paint comprise fluorescent paint of more than one color for various sign design effects.
8. The LED display apparatus of claim 1, wherein the circuit for the plurality of LEDs comprises a capacitor and rectifying diode for stable current.
9. The LED display apparatus of claim 1, wherein the circuit for the plurality of LEDs has an IC control chip.
10. The LED display apparatus of claim 9, wherein the IC control chip has an integrated multivibrator circuit for making the plurality of LEDs flash.
11. The LED display apparatus of claim 1, wherein the circuit for the plurality of LEDs has a photoresistor.
12. The LED display apparatus of claim 1, wherein some or all of the plurality of LEDs are bi-color LEDs.
13. The LED display apparatus of claim 1, wherein some of all of the plurality of LEDs have the function of dimming either by pulse-width modulation or lowering the forward current.
14. The LED display apparatus of claim 1, wherein the inside of housing is made of mirror for maximizing the downward light.
15. The LED display apparatus of claim 1, wherein light scattering panel is attached to the upper side of the transparent panel for evenly scattering the light from LEDs.
16. An LED display apparatus comprising:
a plurality of LED arrays for performing as a light source;
a housing to house the plurality of LED arrays;
a plurality of transparent panels of which one side is attached to the housing so that the LED light can shed light through the side of the transparent panels and the number of transparent panels is the same as the number of LED arrays;
dispersion scratches on the transparent panels for refracting, reflecting and diffusing LED light wherein the dispersion scratches are configured to form a sign; and
a plurality of panels treated with fluorescent paint for enhancing the intensity of LED light refracted or reflected wherein each panel treated with fluorescent paint is attached to each transparent panel on the side having the dispersion scratch and the fluorescent paint glows by reflecting the LED light;

wherein the dispersion scratches are configured to be a letter, sign, symbol or design component for being bright as against the rest of dark plain background of the transparent panels.
17. The LED display apparatus of claim 16, wherein the LED arrays have different light colors.
18. The LED display apparatus of claim 16, wherein the transparent panels comprise acrylic.
19. The LED display apparatus of claim 16, wherein the dispersion scratches are made vertically by means of drill.
20. The LED display apparatus of claim 16, wherein the plurality of panels treated with fluorescent paint comprise fluorescent paint which is treated on the panels at the substantially same places as the dispersion scratches are made so that the sign by the dispersion scratch lights more intensely by the fluorescent paint.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A video processing system comprising:
a wide-angle optical system configured to receive an optical image;
a high-resolution image sensor coupled to the optical system and configured to convert the optical image to an electronic image;
an image processing circuit coupled to the image sensor and configured to receive and process the electronic image, one of its tasks being to correct optical distortion on one or more regions of interest of the electronic image through reference to a table of parameters specific to a combination of the optical system and the image sensor, each of said regions of interest including at least a portion of said electronic image from anywhere within said electronic image, said image processing circuit configured to perform event detection in at least one other area of the electronic image;
a control circuit coupled to said image processing circuit and configured to receive movement and zoom commands to transmit a signal to said image processing circuit relating the movement and zoom commands specific to at least one region of interest in said electronic image, while said image sensor also performs said event detection; and
an output circuit coupled to said image processing circuit capable of outputting in a plurality of electronic signal formats.
2. The video processing system of claim 1, wherein the output circuit comprises a compression and formatting circuit.
3. The video processing system of claim 1, wherein the output circuit outputs an electronic video signal to a coupled base station, and the base station provides command inputs to the control circuit.
4. The video processing system of claim 1, wherein said image processing circuit can perform one or more of: distortion correction; filtering; color correction; or white balance adjustment.
5. The video processing system of claim 1, wherein the image processing circuit comprises: a digital signal processor, comprising an arithmetic and logic unit controlled by a coupled instruction sequencer, which fetches instructions from a memory; at least one of a coupled register storage or memory storing image data for processing; and accessed algorithms for processing an image comprising a least one of sharpening, contrast adjustment, color adjustment, resizing, or analysis.
6. The video processing system of claim 1, wherein the image processing circuit comprises: a programmable graphics processor, comprising a rasterizer producing coordinates of an output image transmitted to a coupled pixel shader calculating the pixels in the source image to use, causes the pixels to be read from a coupled memory, and filtered by a coupled filter; and accessed algorithms for processing an image comprising at least one of sharpening, contrast adjustment, color adjustment, resizing, or analysis.
7. The video processing system of claim 1, wherein the image processing circuit comprises a combination of a digital processing circuit and a graphics processor.
8. The video processing system of claim 1, wherein at least one region of interest is simultaneously monitored while maintaining visibility of the full electronic image.
9. A video processing system comprising:
at least one image sensor coupled to an optical system that captures a distorted image, said image sensor converting the optical image into an electronic image;
an image processing circuit coupled to the at least one image sensor, said image processing circuit receiving and processing the electronic image to correct the distorted image on one or more regions of interest from anywhere in said electronic image based on factors specific to the optical system and at least one image sensor, the image processing circuit also producing at least one zoomed electronic image of at least one region of interest anywhere in the image based on execution of movement and zoom commands specific to said region of interest anywhere within the image while maintaining visibility of the full electronic image, the said image processing circuit also performing event detection in at least one other area of the electronic image while producing the zoomed image;
a control circuit coupled to said image processing circuit; and
an output circuit coupled to the image processing circuit.
10. The video processing system of claim 9, wherein the control circuit receives movement and zoom commands to transmit to the image processing circuit executing the movement and zoom commands, wherein the region of interest comprises at least a portion of the electronic image.
11. The video processing system of claim 10, wherein the image processing circuit scales the region of interest up or down.
12. The video processing system of claim 9, wherein a plurality of regions of interest are simultaneously monitored while maintaining visibility of the full electronic image.
13. The video processing system of claim 9, wherein the output circuit is capable of outputting in a plurality of electronic signal formats.
14. A method for operating a video processing system, comprising the steps of:
receiving a distorted wide-angle optical image converted into an electronic signal of image frames at an image processing circuit;
processing the image frames to correct wide-angle optical distortion, which includes one or more regions of interest within the image frames, wherein view commands specific to the one or more regions of interest are executed via manipulating the image frame data to produce an electronic image frame for each of the one or more regions of interest anywhere within the full electronic image frame while maintaining visibility of the full electronic image frame; and
while executing said view commands, also performing event detection in at least one other area of the electronic image; and
outputting a plurality of electronic image frames to a coupled base station corresponding to each of the one or more regions of interest and the full electronic image.
15. The method of claim 14, wherein the view commands comprise at least one of a movement and a zoom component.
16. The method of claim 14, further comprising the steps of:
formatting the plurality of electronic image frames; and compressing the plurality of electronic image frames.
17. The method of claim 14, further comprising the step of:
transmitting the one or more regions of interest as thumbnails, interleaved fields or frames, or multiplexed.
18. The method of claim 14, further comprising the step of:
storing image frames in a memory.
19. The method of claim 18, further comprising the steps of:
transmitting stored image frames to a base station upon detection of an event; and
extracting portions of the image frames relative to the event.
20. The method of claim 14, further comprising the steps of:
automatically detecting an event using mathematical analysis of an image frame;
designating a portion of the image frame as a region of interest correlating to the event; and
executing view commands to generate an image frame of the region of interest.

1460759472-ca27feaa-7fe4-4677-999f-aa8fcf8b85e7

1. A semiconductor device comprising:
a substrate on which is formed a plurality of leads; and
a semiconductor chip having a plurality of electrodes, the leads and the electrodes being mounted on the substrate in a manner to face each other and to be electrically connected,
wherein the plurality of leads includes a plurality of lead groups, each of which are formed of at least two first leads, and a plurality of second leads,
wherein each of the second leads is positioned between an adjacent pair of the lead groups,
wherein each of an outermost pair of the first leads of each of the lead groups includes a first portion and a second portion, the first portion of each of the outermost pair of the first leads being positioned at a first spacing apart and the second portion of each of the outermost pair of the first leads being positioned at a second spacing apart which is smaller than the first spacing, and
wherein each of the second leads is disposed in a manner to avoid a region that is sandwiched between the first portion of each of the adjacent pair of the lead groups and has a portion that is disposed in a region that is sandwiched between the second portion of each of the adjacent pair of the lead groups.
2. The semiconductor device as defined by claim 1,
wherein an adjacent pair of the second leads is disposed so as to sandwich one of the lead groups, and
wherein the outermost pair of the first leads of each of the lead groups is formed so that the first spacing is greater than or equal to a spacing of the adjacent pair of the second leads.
3. The semiconductor device as defined by claim 1,
wherein the plurality of lead groups includes a first lead group and a second lead group,
wherein the second leads are formed in such a manner that an end of each of the second leads does not pass over a straight line, and
wherein the first portion of each of the outermost pair of the first leads of the first lead group is disposed at a position closer to the straight line than the first portion of each of the outermost pair of the first leads of the second group.
4. The semiconductor device as defined by claim 1,
wherein each of the lead group includes at least three of the first leads, and
wherein the outermost pair of the first leads of each lead group are of a different length from a length of a remaining one of the first leads which is sandwiched between the outermost pair of the first leads.
5. An electronic module to which is attached the semiconductor device defined by claim 1.
6. An electronic instrument having the semiconductor device defined by claim 1.
7. A wiring board comprising:
a substrate; and
a plurality of leads which are formed on the substrate,
wherein the plurality of leads includes a plurality of lead groups, each of which are formed of at least two first leads, and a plurality of second leads,
wherein each of the second leads is positioned between an adjacent pair of the lead groups,
wherein each of an outermost pair of the first leads of each of the lead groups includes a first portion and a second portion, the first portion of each of the outermost pair of the first leads being positioned at a first spacing apart and the second portion of each of the outermost pair of the first leads being positioned at a second spacing apart which is smaller than the first spacing, and
wherein each of the second leads is disposed in a manner to avoid a region that is sandwiched between the first portion of each of the adjacent pair of the lead groups and has a portion that is disposed in a region that is sandwiched between the second portion of each of the adjacent pair of the lead groups.
8. The wiring board as defined by claim 7,
wherein an adjacent pair of the second leads is disposed so as to sandwich one of the lead groups, and
wherein the outermost pair of the first leads of each of the lead groups is formed so that the first spacing is greater than or equal to a spacing of the adjacent pair of the second leads.
9. The wiring board as defined by claim 7,
wherein the plurality of lead groups includes a first lead group and a second lead group,
wherein the second leads are formed in such a manner that an end of each of the second leads does not pass over a straight line, and
wherein the first portion of each of the outermost pair of the first leads of the first lead group is disposed at a position closer to the straight line than the first portion of each of the outermost pair of the first leads of the second group.
10. The wiring board as defined by claim 7,
wherein each of the lead group includes at least three of the first leads, and
wherein the outermost pair of the first leads of each lead group are of a different length than a length of a remaining one of the first leads which is sandwiched between the outermost pair of the first leads.
11. A method of a manufacturing a semiconductor device, the method comprising:
mounting a semiconductor chip having a plurality of electrodes onto a substrate on which is formed a plurality of leads, in such a manner that the electrodes face the leads; and
bonding the electrodes and the leads,
wherein the plurality of leads includes a plurality of lead groups, each of which are formed of at least two first leads, and a plurality of second leads,
wherein each of the second leads is positioned between an adjacent pair of the lead groups,
wherein each of an outermost pair of the first leads of each of the lead groups includes a first portion and a second portion, the first portion of each of the outermost pair of the first leads being positioned at a first spacing apart and the second portion of each of the outermost pair of the first leads being positioned at a second spacing apart which is smaller than the first spacing, and
wherein each of the second leads is disposed in a manner to avoid a region that is sandwiched between the first portion of each of the adjacent pair of the lead groups and has a portion that is disposed in a region that is sandwiched between the second portion of each of the adjacent pair of the lead groups.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. Apparatus for the internal depressurization of plastic containers thermoformed by means of blowing and intended for sterile filling, characterized in that the said depressurization step is performed by means of the secondary suction circuit of a Venturi meter or ejector (15), the primary circuit of which is passed through by compressed air at pressure values regulated by a proportional valve (19) controlled by an electronic control unit (10) which detects the internal pressure or vacuum of the containers by means of a transducer (9) and which is programmed by means of a suitable programming apparatus (11) and which, upon reaching of the predetermined vacuum inside the containers, activates means (Z) for closing the end portion of the said thermoformed containers.
2. Apparatus according to claim 1, characterized in that the electronic control unit (10) intended for driving the proportional pressure valve (19) is designed to detect, in addition to the internal pressure or vacuum of the containers, by means of the said transducer (9), also the atmospheric pressure of the working environment of the thermoforming machine, by means of at least one special barometric sensor (21), the said control unit being designed to receive, via the said programming unit (11), the reference value (Vr) of the internal pressure (DPI) of the containers, correlated to a mean value (Vm) of the atmospheric pressure (PA), and also being designed to vary automatically the internal vacuum threshold, upon reaching of which the means (Z) for closing the end portion of the containers are activated, in accordance with the variations in atmospheric pressure with respect to the said mean value (Vm), following the law whereby the internal vacuum varies in an inversely proportional manner with respect to the said variations in the atmospheric pressure.
3. Apparatus according to claim 1, characterized in that the blowing nozzles (U) of the thermoforming machine are branched to a first ON-OFF valve (1) for sending the sterile compressed air for thermoforming the containers (C) and are also connected to a second ON-OFF valve (13) which is closed during the thermoforming step and which is opened at the end of this step, after closing of the said first valve, the outlet of this second valve being connected to the suction mouth of the Venturi meter (15), both the said valves (1, 13) being controlled by the electronic control unit (10) via a suitable interface (14).
4. Apparatus according to claim 1, in which a filter or silencer (16) is connected to the discharge mouth of the Venturi meter (15).
5. Apparatus according to claim 1, in which the primary circuit of the Venturi meter (15) is provided, immediately upstream of the latter, with a valve of the ON-OFF type (20) controlled by the said electronic control unit (10) which drives the proportional pressure valve (19).
6. Apparatus according to claim 1, characterized in that the line (17) which supplies the compressed air to the primary circuit of the Venturi meter (15) is provided with a pressure regulator (18) driven by the proportional pressure valve (19) controlled by the electronic control unit (10).