Author: claimsbot

1. An axial fan assembly comprising:
a motor including an output shaft rotatable about a central axis;
a shroud coupled to the motor, the shroud including a substantially annular outlet bell centered on the central axis;
an axial fan including
a hub coupled to the output shaft for rotation about the central axis;
a plurality of blades extending radially outwardly from the hub and arranged about the central axis;
a substantially circular band coupled to the tips of the blades; and

a plurality of leakage stators positioned radially outwardly from the band and adjacent the outlet bell, the leakage stators arranged about the central axis;
wherein the outlet bell includes a radially-innermost surface, a radially-outermost surface, and an end surface adjacent the radially-innermost surface, wherein the leakage stators are positioned between the radially-innermost surface and the radially-outermost surface, wherein the band includes an axially-extending, radially-innermost surface, an axially-extending, radially-outermost surface, and an end surface adjacent the axially-extending, radially-innermost surface and the axially-extending, radially-outermost surface, wherein the respective end surfaces of the band and the outlet bell are spaced by an axial gap, and wherein a ratio of the axial gap to a maximum blade diameter is about 0 to about 0.01, wherein the axially-extending, radially-outermost surface of the band is spaced radially inwardly of the radially-innermost surface of the outlet bell by a radial gap, and wherein a ratio of the radial gap to the maximum blade diameter is about 0.01 to about 0.02.
2. The axial fan assembly of claim 1, wherein the hub includes a radially-outermost surface defining a hub radius (Rhub), wherein the axially-extending, radially-innermost surface of the band defines a band radius (Rband), wherein the radially-outermost surface of the outlet bell defines an outlet radius (Rout), wherein the outlet bell is axially spaced from a downstream blockage by a length dimension (L), wherein a blockage factor is defined by the formula:
BlockageFactor
=
R
band
2

–

R
hub
2
2
\xd7
L
\xd7

R
out
wherein the ratio of the axial gap to the maximum blade diameter is about 0 to about 0.01, and the ratio of the radial gap to the maximum blade diameter is about 0.01 to about 0.02 when the blockage factor is greater than or equal to about 0.83.
3. The axial fan assembly of claim 1, wherein each of the blades includes
a root;
a tip;
a leading edge between the root and the tip; and
a trailing edge between the root and the tip;
wherein each of the blades defines a blade radius between the blade tips and the central axis, and wherein each of the blades defines a decreasing skew angle within the outer 20% of the blade radius.
4. The axial fan assembly of claim 3, wherein the skew angle of the blades continuously decreases over the outer 20% of the blade radius.
5. The axial fan assembly of claim 1, wherein each of the blades includes
a root;
a tip;
a leading edge between the root and the tip; and
a trailing edge between the root and the tip;
wherein each of the blades defines a blade radius between the blade tips and the central axis, wherein a ratio of blade pitch to average blade pitch increases from a lowest value to a highest value within the outer 20% of the blade radius, and wherein the highest value is about 30% to about 75% greater than the lowest value.
6. The axial fan assembly of claim 5, wherein the ratio of blade pitch to average blade pitch increases from a lowest value to a highest value within the outer 10% of the blade radius, and wherein the highest value within the outer 10% of the blade radius is about 20% to about 60% greater than the lowest value within the outer 10% of the blade radius.
7. The axial fan assembly of claim 1, wherein each of the blades includes
a root;
a tip;
a leading edge between the root and the tip; and
a trailing edge between the root and the tip;
wherein each of the blades defines a blade radius between the blade tips and the central axis, and wherein each of the blades defines an increasing rake within the outer 20% of the blade radius.
8. The axial fan assembly of claim 7, wherein the rake increases continuously over the outer 20% of the blade radius.
9. The axial fan assembly of claim 7, wherein a ratio of rake to maximum blade diameter comprises a non-dimensional blade rake, wherein a rate of change of the non-dimensional blade rake with respect to a non-dimensional radius over the outer 20% of the blade radius is about 0.08 to about 0.18.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A semiconductor package comprising:
a circuit board having an opening and at which a wire pattern is formed;
a metal structure including an upper metal member formed to cover a portion of the circuit board, sidewall metal members extending from the upper metal member and insertable through the opening of the circuit board, and a lower metal member extending from the sidewall metal members and locatable relative to the opening; and
a semiconductor chip electrically connectable to the wire pattern and attachable to the lower metal member.
2. The semiconductor package as set forth in claim 1, wherein the circuit board comprises organic material.
3. The semiconductor package as set forth in claim 1, further comprising at least one of conductive pins, solder balls or lands electrically connected to the wire pattern of the circuit board.
4. The semiconductor package as set forth in claim 1, further comprising a hermetic sealing member to fill a space formed by the semiconductor chip, the sidewall metal members and the lower metal member of the metal structure,
wherein the semiconductor chip has a plurality of mirrors in its surface.
5. The semiconductor package as set forth in claim 1, wherein the upper metal member has a rectangular frame shape having an opening to expose the opening of the circuit board;
the lower metal member has a rectangular shape; and
the sidewall metal members are comprised of two sidewall metal members spaced apart from each other and extending from an inner wall of the opening of the upper metal member to connect to opposite two sides of the rectangular shaped lower metal member.
6. The semiconductor package as set forth in claim 1, wherein the upper metal member has a rectangular frame shape having an opening to expose the opening of the circuit board;
the lower metal member has a rectangular shape; and
the sidewall metal members are comprised of at least two sidewall metal members spaced apart from each and other extending from an inner wall of the opening of the upper metal member to connect to opposite at least two corners of the rectangular shaped lower metal member.
7. The semiconductor package as set forth in claim 1, wherein the upper metal member comprises four metal members spaced apart from one another;
the lower metal member has a rectangular shape; and
the sidewall metal members are comprised of four spaced sidewall metal members each extending from a corresponding one of the four upper metal members to connect to corresponding four corners of the rectangular shaped lower metal member.
8. The semiconductor package as set forth in claim 1, wherein the upper metal member comprises two metal members spaced apart from one another;
the lower metal member has a rectangular shape; and
the sidewall metal members are comprised of two spaced sidewall metal members each extending from respective ones of the two metal members of the upper metal member to connect to respective ones of opposite two sides of the rectangular shaped lower metal member.
9. A semiconductor package comprising:
a circuit board having a first opening and at which a wire pattern is formed;
a metal structure having an upper metal member attached to a first portion of the circuit board to expose a second portion of the circuit board, and having a projection insertable into the first opening of the circuit board; and
a semiconductor chip attached to the projection and electrically connectable to the second portion of the circuit board.
10. The semiconductor package as set forth in claim 9, wherein the metal structure comprises an upper metal member attachable on the circuit board to expose a portion of the circuit board adjacent to the first opening, a lower metal member seated relative to the first opening, and sidewall metal members extending from the upper metal member into the first opening and connect to the lower metal member; the sidewall metal members and the lower metal member comprise the projection; and the semiconductor chip is attached to the lower metal member.
11. The semiconductor package as set forth in claim 10, wherein the circuit board is made of organic material.
12. The semiconductor package as set forth in claim 10, further comprising at least one of conductive pins, solder balls, or lands electrically connected to the wire pattern of the circuit board.
13. The semiconductor package as set forth in claim 10, further comprising a hermetic sealing member to fill a space formed by the semiconductor chip, the sidewall metal members and the lower metal member of the metal structure, and
wherein the semiconductor chip has a plurality of mirrors on its surface.
14. The semiconductor package as set forth in claim 10, wherein the first opening of the circuit board and the lower metal member of the metal structure have a rectangular shape;
the upper metal member of the metal structure has a rectangular frame shape for defining a rectangular shaped second opening and is located on the circuit board to expose a portion of the circuit board adjacent to opposite two sides of the first opening; and
the sidewall metal members of the metal structure extend from two opposite sides of the second opening to connect to corresponding opposite two sides of the rectangular shaped lower metal member.
15. The semiconductor package as set forth in claim 10, wherein the first opening of the circuit board and the lower metal member of the metal structure have a rectangular shape;
the upper metal member of the metal structure has a rectangular frame shape defining a rectangular shaped second opening locatable on the circuit board to expose a portion of the circuit board adjacent to four sides of the first opening; and
the sidewall metal members of the metal structure extend from four corners of the second opening to be connected to corresponding four corners of the rectangular shaped lower metal member.
16. The semiconductor package as set forth in claim 10, wherein the first opening of the circuit board and the lower metal member of the metal structure have a rectangular shape;
the upper metal member of the metal structure has a rectangular frame shape for defining a rectangular shaped second opening locatable on the circuit board to expose a portion of the circuit board adjacent to four sides of the first opening; and
the sidewall metal members of the metal structure extend from two corners of the second opening to connect to corresponding two corners of the rectangular shaped lower metal member.
17. The semiconductor package as set forth in claim 10, wherein the first opening of the circuit board and the lower metal member of the metal structure have a rectangular shape;
the upper metal member of the metal structure comprises spaced four upper metal members to cover the circuit board adjacent to four corners of the first opening; and
the sidewall metal member comprises four sidewall metal members extending from the spaced four upper metal members to connect to corresponding four corners of the lower metal member.
18. The semiconductor package as set forth in claim 10, wherein the first opening of the circuit board and the lower metal member of the metal structure have a rectangular shape;
the upper metal member of the metal structure comprises spaced two upper metal members to cover the circuit board adjacent to corresponding opposite two sides of the first opening of the circuit board; and
the sidewall metal members extend from the two upper metal members to connect to corresponding opposite two sides of the rectangular shaped lower metal member.
19. A semiconductor package comprising:
a rectangular frame shaped circuit board having a rectangular shaped opening and at which a wire pattern is formed;
a metal structure comprising a frame shaped upper metal member attachable to the circuit board to expose a portion of the circuit board adjacent to the opening, a rectangular shaped lower metal member locatable relative to the opening of the circuit board, and sidewall connecting members to connect an inner side of the frame shaped upper metal member to a periphery of the lower metal member; and
a semiconductor chip attachable to the lower metal member and electrically connectable to the portion of the circuit board exposed by the upper metal member.
20. The semiconductor package as set forth in claim 19, wherein the upper metal member has a rectangular frame shape; and
the sidewall connecting members comprise spaced two sidewall metal members to connect corresponding opposite two inner sides of the rectangular frame shaped upper metal member with corresponding opposite two sides of the lower metal member.
21. The semiconductor package as set forth in claim 19, wherein the upper metal member has a rectangular frame shape; and
the sidewall connecting members comprise spaced at least two sidewall metal members to connect corresponding at least two corners of the rectangular frame shaped upper metal member with corresponding at least two corners of the lower metal member.
22. A semiconductor package comprising:
a generally planar circuit board having a first side facing a first direction and a second side facing a second direction opposite the first direction;
a metal structure having a first generally planar surface area facing the first direction and having a second generally planar surface area facing the second direction, the second generally planar surface area coupled face-to-face with a first portion of the first side of the circuit board while leaving exposed a second portion of the first side of the circuit board; and
a semiconductor chip attached to the first generally planar surface of the metal structure and in relation to the second portion of the first side of the circuit board for electrical connection thereto.
23. A semiconductor package as set forth in claim 22, wherein the circuit board includes an opening and the metal structure includes a projection insertable into the opening, the projection comprising the first generally planar surface area.
24. A semiconductor package as set forth in claim 22, wherein the first generally planar surface area is a rectangular area.
25. A semiconductor package as set forth in claim 22, wherein the second generally planar surface area comprises at least two spaced areas.
26. A semiconductor package as set forth in claim 22, wherein the second generally planar surface area comprises a continuous frame shaped area.
27. The semiconductor package as set forth in claim 22, further comprising at least one of conductive pins, solder balls, and lands electrically connected to the circuit board and conductively accessible at the second side of the circuit board.
28. The semiconductor package as set forth in claim 22, wherein the circuit board comprises a bonding region at the second portion of the first side of the circuit board and the semiconductor is electrically connectable to the wiring pattern.

What we claim is

1. A spindle device comprising,
a housing,
a spindle rotatably supported on said housing,
a rotary sleeve fixedly mounted on said spindle,
a fixed sleeve mounted on said housing and faced said rotary sleeve in a given bearing gap, the fixed sleeve forming a radial dynamic pressure bearing together with said rotary sleeve,
a turbine rotor fixedly mounted on said spindle so as to give a rotation to said spindle, the turbine rotor having a plurality of turbine blades,
a drive fluid blown to said turbine blade of said turbine rotor in a radial direction toward a radial outside of said turbine rotor, a drive fluid passage formed along an axis of said spindle so as to send said drive fluid to said turbine rotor,
supply holes formed in said fixed sleeve along a radial direction for supplying said drive fluid to said drive fluid passage of said spindle from a housing side, and
receiving holes formed in said rotary sleeve along a radial direction and received said drive fluid from said supply holes for introducing said drive fluid into said drive fluid passage.
2. A spindle device according to claim 1, wherein a pair of dynamic pressure generating grooves are formed in an outer peripheral surface of said rotary sleeve or an inner peripheral surface of said fixed sleeve such that said dynamic pressure generating grooves sandwich said receiving holes and said supply holes.
3. A spindle device according to claim 1, wherein a plurality of supply holes and a plurality of receiving holes are respectively formed in said fixed sleeve and said rotary sleeve in the circumferential direction such that any one of said supply holes and any one of the receiving holes are always communicated with each other irrespective of a rotational position of said spindle.
4. A spindle device according to claim 1, wherein said rotary sleeve which constitutes said radial dynamic pressure bearing is provided with a flange portion and said flange portion faces an axial end surface of said fixed sleeve in an opposed manner by way of a given bearing gap thus constituting a thrust dynamic pressure bearing which restricts the movement of said spindle in the axial direction.
5. A spindle device according to claim 4, wherein a free disc which is rotatable relative to both of said housing and said spindle is disposed between said fixed sleeve and a flange portion of said rotary sleeve, and said free disc, said fixed sleeve and a thrust plate constitute a pair of thrust dynamic pressure bearings, and means for rotatably driving said free disc independently from said spindle is provided to said spindle device.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A static random access memory (SRAM), comprising:
a cross coupled pair of inverters, wherein each inverter includes a p-type pull up transistor and an n-type pull down transistor coupled to a first static storage node, wherein gates of each inverter in the pair are coupled to the first static storage node of the other inverter; and
wherein each inverter includes a second non-volatile storage node coupled to the first static storage node, wherein the second storage node comprises a two terminal magnetic tunnel junction (MTJ) device, wherein the MTJ device includes:
a first unpinned ferromagnetic layer coupled to the first storage node such that a polarization of an associated spin value can rotate; and
a second pinned ferromagnetic layer in contact with an anti-ferromagnetic layer coupled to a control line such that a polarization of an associated spin value is fixed in one direction;
wherein the first unpinned ferromagnetic layer and the second pinned ferromagnetic layer are separated by a dielectric.
2. The SRAM of claim 1, wherein the MTJ device can alternate between a first resistance and a second resistance according to spin value states in the first and the second ferromagnetic layers.
3. A method for operating a static random access memory (SRAM), comprising:
transferring data from a pair of static storage nodes of the SRAM to a pair of non-volatile storage nodes when the SRAM is placed in a standby mode; wherein the pair of non-volatile storage nodes comprise a pair of two terminal magnetic tunnel junction (MTJ) devices, and wherein the MTJ devices include:
a first unpinned ferromagnetic layer coupled to the first storage node such that a polarization of an associated spin value can rotate; and
a second pinned ferromagnetic layer in contact with an anti-ferromagnetic layer coupled to a control line such that a polarization of an associated spin value is fixed in one direction;
wherein the first unpinned ferromagnetic layer and the second pinned ferromagnetic layer are separated by a dielectric; and
transferring data from the pair of non-volatile storage nodes to the pair of static storage nodes when the SRAM exits the standby mode;
wherein transferring data includes changing a potential applied to the pair of non-volatile storage nodes between a first potential and a second potential using a control circuit coupled by a control line to the pair of non-volatile storage nodes.
4. The method of claim 3, wherein the method includes utilizing spin torque transfer magnetization switching for transferring data between the pair of static storage nodes and the pair of non-volatile storage nodes.
5. A method for operating a static random access memory (SRAM), comprising:
applying a first potential to a pair of non-volatile storage nodes coupled to a pair of static storage nodes of the SRAM in order to store data from the pair of static storage nodes to the pair of non-volatile storage nodes; wherein the pair of non-volatile storages nodes comprise a pair of two terminal magnetic tunnel junction (MTJ) devices, and wherein the MJT devices include:
a first unpinned ferromagnetic layer coupled to the first storage node such that a polarization of an associated spin value can rotate; and
a second pinned ferromagnetic layer in contact with an anti-ferromagnetic layer coupled to a control line such that a polarization of an associated spin value is fixed in one direction;
wherein the first unpinned ferromagnetic layer and the second pinned ferromagnetic layer are separated by a dielectric;
applying a second potential to the pair of non-volatile storage nodes to return data from the pair of non-volatile storage nodes to the pair of static storage nodes; and
applying a third potential to reset the pair of non-volatile storage nodes.
6. The method of claim 5, wherein:
applying the first potential includes applying a ground to the pair of non-volatile storage nodes;
applying the second potential includes applying a power supply potential; and
applying the third potential includes applying a potential which is higher in magnitude than the power supply potential.
7. The method of claim 6, wherein the method includes:
applying the first potential before powering down the SRAM;
applying the second potential before powering up the SRAM; and
applying the third potential after powering up the SRAM.
8. The method of claim 5, wherein the method includes coupling the second potential to the pair of non-volatile storage nodes for reading from and writing to the static storage nodes when the SRAM is powered up.
9. A method for forming a memory, comprising:
cross coupling a pair of inverters to form a static random access memory (SRAM) cell, each inverter including a p-type pull up transistor and an n-type pull down transistor coupled to a static storage node, wherein gates of each inverter in the pair are coupled to the static storage node of the other inverter; and
connecting a pair of non-volatile storage nodes to a pair of static storage nodes by forming the pair of non-volatile storage nodes above a layer in which the static storage nodes of the SRAM are formed to conserve SRAM cell area; wherein the pair of non-volatile storage nodes comprise a pair of two terminal magnetic tunnel junction (MTJ) devices, and wherein the MTJ devices include:
a first unpinned ferromagnetic layer coupled to the first storage node such that a polarization of an associated spin value can rotate; and
a second pinned ferromagnetic layer in contact with an anti-ferromagnetic layer coupled to a control line such that a polarization of an associated spin value is fixed in one direction;
wherein the first unpinned ferromagnetic layer and the second pinned ferromagnetic layer are separated by a dielectric.
10. The method of claim 9, wherein the method includes connecting a control line to the pair of non-volatile storage nodes.
11. The method of claim 10, wherein connecting the pair of non-volatile storage nodes includes connecting the pair of MTJ devices such that the first ferromagnetic layer in each device is connected to the static storage node and the second ferromagnetic layer in each device is connected to the control line.
12. The method of claim 11, wherein the method includes connecting an anti-ferromagnetic layer between the second ferromagnetic layer and the control line to fix a polarization of an associated spin value of the second ferromagnetic layer in one direction.
13. The method of claim 12, wherein the method includes:
forming a number of SRAM cells in an array wherein each SRAM cell includes a complementary pair of sense lines coupled to a static storage node in each inverter; and
wherein connecting the control line to the pair of non-volatile storage nodes includes connecting the control line to the pair of non-volatile storage nodes in a block of SRAM cells.
14. A method for operating a static random access memory (SRAM), comprising:
transferring data from a pair of static storage nodes of the SRAM to a pair of non-volatile storage nodes when the SRAM is placed in a standby mode by coupling a ground to the pair of non-volatile storage nodes; wherein the pair of non-volatile storage nodes comprise a pair of two terminal magnetic tunnel junction (MTJ) devices, and wherein the MTJ devices include:
a first unpinned ferromagnetic layer coupled to the first storage node such that a polarization of an associated spin value can rotate; and
a second pinned ferromagnetic layer in contact with an anti-ferromagnetic layer coupled to a control line such that a polarization of an associated spin value is fixed in one direction;
wherein the first unpinned ferromagnetic layer and the second pinned ferromagnetic layer are separated by a dielectric; and
transferring data from the pair of non-volatile storage nodes to the pair of static storage nodes when the SRAM exits the standby mode by coupling a first positive potential to the pair of non-volatile storage nodes.
15. The method of claim 14, wherein the method includes coupling a second positive potential that is higher in magnitude than the first positive potential to at least partially halt transferring data between to the pair of static storage nodes and the pair of non-volatile storage nodes.
16. The method of claim 15, wherein the method includes coupling the first positive potential to the pair of non-volatile storage nodes for reading from and writing to the static storage nodes when the SRAM is powered up.