Author: claimsbot

1. A dishwasher appliance comprising:
a tub that defines a wash chamber;
a rack assembly mounted within the wash chamber and configured for receipt of articles for cleaning;
a silverware basket removably mounted to a front of said rack assembly, said silverware basket extending between a first side and a second side along a horizontal direction, said silverware basket further extending between a top and a bottom along a vertical direction, said silverware basket also extending between a front and a back along a transverse direction, the transverse direction being perpendicular to the horizontal and vertical directions, wherein said silverware basket comprises:
a bottom wall;
a front wall extending from said bottom wall along the vertical direction;
a back wall extending from said bottom wall, along the vertical direction and spaced apart from said front wall along the transverse direction, wherein said bottom wall, said back wall, and said front wall assist in defining a cavity for receipt of articles for cleaning;
a divider positioned within the cavity and extending between and connecting said front wall and said back wall along the transverse direction;
a mounting assembly positioned on said back wall where said divider connects with said back wall, said mounting assembly configured for selectively securing said silverware basket to said rack assembly;
a handle mounted adjacent said divider, wherein said mounting assembly urges said rack assembly along the transverse direction when a user pulls on said handle in the transverse direction; and
wherein said mounting assembly comprises a hook extending into an opening defined by said back wall, the hook being configured for receipt of a projection that extends away from said rack assembly along the transverse direction.
2. The dishwasher appliance of claim 1, wherein said handle is positioned adjacent said front wall.
3. The dishwasher appliance of claim 1, wherein said divider comprises a first divider and a second divider positioned within the cavity and spaced apart along the horizontal direction, wherein said first and second dividers extend between and connect said front wall and said back wall along the transverse direction in order to divide the cavity into a plurality of cavities, wherein said handle extends between said first and second dividers along the horizontal direction.
4. The dishwasher appliance of claim 3, wherein said handle extends between a first end and a second end along the horizontal direction, the first end of said handle mounted to said first divider, the second end of said handle mounted to said second divider.
5. The dishwasher appliance of claim 3, wherein said handle is positioned adjacent the front of said silverware basket.
6. The dishwasher appliance of claim 1, Wherein the opening of said mounting assembly is positioned on said back wall where said divider connects with said back wall.
7. The dishwasher appliance of claim 6, wherein said divider extends between a top and a bottom of the opening of said mounting assembly.
8. The dishwasher appliance of claim 1, wherein the hook extends away from said back wall along the transverse and vertical directions towards said front wall.
9. The dishwasher appliance of claim 1, wherein said silverware basket defines a plurality of holes for permitting a flow of fluid out of the cavity of said silverware basket.
10. The dishwasher appliance of claim 1, wherein said silverware basket is constructed of plastic.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A medical device, the medical device comprising a spinal rod receiving channel and a rod retaining set screw; wherein,
the spinal rod receiving channel comprises at least a first circular hole, a second circular hole, and a third circular hole;
the first circular hole, the second circular hole, and the third circular hole are parallel;
the first circular hole, the second circular hole, and the third circular hole have offset centers disposed along a single line;
the first circular hole forms an upper arc of the rod receiving channel;
the second circular hole forms a middle arc of the rod receiving channel;
the third circular hole forms a lower arc of the rod receiving channel;
the middle arc and the lower arc are connected by a connecting slant; and
the rod retaining set screw secures a spinal rod disposed in the spinal rod receiving channel into the medical device.
2. The medical device of claim 1, wherein the medical device comprises a plurality of rod receiving channels disposed in parallel arrangement.
3. The medical device of claim 1, wherein the medical device comprises a single rod retaining set screw in combination with each rod receiving channel.
4. The medical device of claim 1, wherein the medical device comprises two rod retaining set screws in combination with each rod receiving channel.
5. (canceled)
6. (canceled)
7. The medical device of claim 1, wherein the medical device comprises a hook for engagement with the lamina of a vertebra.
8. The medical device of claim 1, wherein the medical device comprises a lateral connector rod with a diameter of approximately 4.75 mm or 5.5 mm for engagement with a spinal pedicle screw.
9. A medical device, the medical device comprising a first cross connector rod hook and a second cross connector hook for securing spinal rods, two conical screw receiving ports, and two rod retaining conical screws; wherein,
the first and second cross connector rod hooks each comprise at least a first circular bore, a second circular bore, and a third circular bore which in combination form a hook with an open portion;
the first circular bore, the second circular bore, and the third circular bore are parallel;
the first circular bore, the second circular bore, and the third circular bore have offset centers disposed along a single line;
the first circular bore forms an upper arc of each of the first cross connector rod hook and the second cross connector rod hook;
the second circular bore forms a middle arc of each of the first cross connector rod hook and the second cross connector rod hook;
the third circular hole forms a lower arc of each of the first cross connector rod hook and the second cross connector rod hook;
the middle arc and the lower arc are connected by a connecting slant; and
the rod retaining conical screws secure a spinal rod disposed in the first and second cross connector rod hooks into the medical device.
10. (canceled)
11. (canceled)
12. The medical device of claim 9, wherein the medical device further comprises a first linkage, a second linkage, a pivot post, and a midline nut; wherein,
the first linkage comprises the first cross connector hook, one of the conical screw receiving ports and a bi-axial cross connector extension rod;
the bi-axial cross connector extension rod is a round shaft extending from the conical screw receiving port of the first linkage;
the second linkage comprises the second cross connector hook, one of the conical screw receiving ports and a bi-axial cross connector extension plank having a linkage retaining orifice;
the linkage retaining orifice is disposed proximal an end of the bi-axial cross connector extension plank distal the conical screw receiving port of the second linkage;
the pivot post comprises a bi-axial cross connector extension rod channel, a threaded post, and a linkage retaining shoulder;
the bi-axial cross connector extension rod channel is configured to allow the bi-axial cross connector extension rod to pass through unimpeded; and
the bi-axial cross connector extension rod is disposed in the bi-axial cross connector extension rod channel, the linkage retaining orifice is disposed over the threaded post, and the midline nut is disposed on the threaded post.
13. The medical device of claim 12, wherein the bi-axial cross connector extension rod comprises a flared portion with a diameter larger than the diameter of bi-axial cross connector extension rod channel disposed at the end of the bi-axial cross connector extension rod distal from the first cross connector hook.
14. The medical device of claim 12, wherein the bi-axial cross connector extension rod channel comprises a first surface and a second surface; the first surface is disposed proximal the threaded shaft and is an arc with a diameter of approximately 0.6 to approximately 1.4 mm larger than the diameter of the bi-axial cross connector extension rod and the second surface is disposed distal the threaded shaft and is an arc with a diameter of approximately 0.03 to approximately 0.3 mm larger than the diameter of the bi-axial cross connector extension rod.
15. The medical device of claim 9, wherein the open portion of the first cross connector hook and the open portion of the second cross connector hook are oriented in the same direction.
16. The medical device of claim 9, wherein the open portion of the first cross connector hook and the open portion of the second cross connector hook are oriented in opposite directions.
17. The medical device of claim 9, wherein the first cross connector hook, the second cross connector hook, and their respective conical screw receiving ports are connected by a cross connector extension rod of a predetermined length.
18. A medical instrument, the medical instrument comprising a rod reduction assembly and a pedicle screw engaging assembly; wherein,
the rod reduction assembly comprises a rod reduction sleeve, a reduction rod, and an advancing knob;
the reduction sleeve comprises a hollow, cylindrical shaped body having an internal reduction sleeve channel, reduction rod engagement slots on a first end, and rod engagement radii on a second end;
the reduction rod comprises external reduction rod threads on a first end and first and second extenders extending radial from the outer surface proximal a second end;
the first and second extenders engage with the reduction rod engagement slots;
the advancing knob comprises internal threads matched to the external reduction rod threads;
the pedicle screw engaging assembly comprises fingers for engagement with the head of a pedicle screw, finger cam pins, an inner tube, and a release ring;
the fingers each comprise a finger hook having a finger hook undercut, a finger slot, and a finger aperture;
the finger slot having a first end distal the finger hook with a width sufficient to permit finger cam pin to slide through but not enough for substantial lateral movement transverse to the sliding direction and a second end proximal the finger hook with a larger width to form a clearance fit with the finger cam pin;
the finger aperture disposed between the finger hook and the finger slot;
the inner tube comprises a hollow, cylindrical body having a first inner tube end and a second inner tube end, a first inner tube slot and a second inner tube slot diametrically opposed across the cylindrical body, and a first finger slot and a second finger slot diametrically opposed across the cylindrical body;
the first inner tube slot and the second inner tube slot are open toward the second inner tube end;
the fingers are disposed in the first finger slot and the second finger slot with the fingers oriented to dispose the finger hooks proximal the second inner tube end and the finger hook undercuts toward the interior of the inner tube; and
movement of the release ring from a first position to a second position moves the finger cam pins from the second end of the finger slot to the first end of the finger slot thereby positioning the fingers for insertion of the head of a pedicle screw.
19. The medical instrument of claim 18, wherein the pedicle screw engaging assembly further comprises finger springs to bias the finger hooks toward the interior of the inner tube.
20. The medical instrument of claim 18, wherein the first finger slot and second finger slot are circumferentially offset 90 degrees from the first inner tube slot and the second inner tube slot.
21. The medical instrument of claim 18, wherein the finger hook undercut comprises an angle between approximately 20 degrees and 90 degrees.
22. The medical instrument of claim 18, wherein the pedicle screw engaging assembly further comprises a retractor sleeve mechanically connecting the release ring and the fingers; the retractor sleeve comprising a first retractor sleeve arm and a second retractor sleeve arm with first and second retractor sleeve arm screw apertures for connection of the release ring and a third retractor sleeve arm and a fourth retractor sleeve arm with third and fourth retractor sleeve arm cross pin apertures for connection to the fingers via the finger cam pins.
23. The medical instrument of claim 18, wherein the reduction rod further comprises an annular bulbous portion with an increased outer diameter compared to the rest of the reduction rod.
24. The medical instrument of claim 18, wherein the medical instrument further comprises finger covers disposed over the first finger slot and the second finger slot to conceal and protect the fingers.

1. A semiconductor integrated circuit device comprising:
(a) a first memory array area which includes a plurality of first memory cells and first data lines which are formed on a first layer and connected with said first memory cells;
(b) a second memory array area which includes a plurality of second memory cells and second data lines which are formed on said first layer and connected with said second memory cells;
(c) a sense amplifier area which includes sense amplifiers;
(d) a first connecting area located between said first memory array area and said sense amplifier area; and
(e) a second connecting area located between said second memory array area and said sense amplifier area,
wherein said semiconductor integrated circuit device further includes:
(f) first lines which are formed on a second layer different from said first layer and connected with said first data lines in said first connecting area; and
(g) second lines which are formed on said second layer and connected with said second data lines in said second connecting area,
said sense amplifiers being connected between said first lines and said second lines and adapted to amplify voltage differences between said first lines and said second lines.
2. A semiconductor integrated circuit device according to claim 1, wherein said first memory array area, said first connecting area, said sense amplifier area, said second connecting area, and said second memory array area are located to align in this order in the extending direction of said first and second data lines.
3. A semiconductor integrated circuit device according to claim 1, wherein said first memory array area, said first connecting area, said sense amplifier area, said second connecting area, and said second memory array area are areas having virtually rectangular shapes,
wherein said semiconductor integrated circuit device further includes a switch forming area which is located between said first memory array area and said first connecting area,
wherein said switch forming area includes data transfer lines (IO) and switch circuits having signal transfer paths which are connected between said first data lines and said data transfer lines, said data transfer lines being formed on said second layer to extend in a direction which intersects said first lines.
4. A semiconductor integrated circuit device according to claim 2, wherein said first and second lines are laid out over said sense amplifier area.
5. A semiconductor integrated circuit device according to claim 2, wherein at least part of said first and second lines are laid out over said sense amplifier area.
6. A semiconductor integrated circuit device according to claim 2, wherein said second layer is an upper layer relative to said first layer.
7. A semiconductor integrated circuit device according to claim 2, wherein said first and second lines are formed to extend in the extending direction of said first and second data lines.
8. A semiconductor integrated circuit device according to claim 1 further including word lines which intersect said first and second data lines at right angles, said memory cells being formed at all intersections of said first and second data lines and said word lines and each made up of a data transfer MISFET and a capacitor, with the gate electrode of said MISFET being connected to a word line.
9. A semiconductor integrated circuit device according to claim 1, wherein said first lines, second lines, first data lines and second data lines are formed by use of a Levenson’s line-and-space mask which is coated with shifters of alternately different phases.
10. A semiconductor integrated circuit device according to claim 1, wherein said first and second data lines have a virtually equal line spacing.
11. A semiconductor integrated circuit device according to claim 1, wherein said first and second lines and said first and second data lines have a line spacing which is equal to a minimum working dimension.
12. A semiconductor integrated circuit device according to claim 1, wherein said memory cells are each formed in an area having a size of 4F2 (where F denotes a minimum working dimension).
13. A semiconductor integrated circuit device comprising:
(a) first data lines which are formed to extend in a first direction on a first layer and connected with a plurality of first memory cells;
(b) second data lines which are formed to extend in the first direction on said first layer and connected with a plurality of second memory cells;
(c) first lines which are formed to extend straight in the first direction on a second layer different from said first layer and connected with said first data lines;
(d) second lines which are formed to extend straight in the first direction on said second layer and connected with said second data lines; and
(e) sense amplifiers which are connected to said first lines and said second lines and adapted to amplify voltage differences between said first lines and said second lines.
14. A semiconductor integrated circuit device according to claim 13 further including word lines which intersect said first and second data lines at right angles, said memory cells being formed at all intersections of said first and second data lines and said word lines and each made up of a data transfer MISFET and a capacitor, with the gate electrode of said MISFET being connected to a word line.
15. A semiconductor integrated circuit device according to claim 13, wherein said first lines, second lines, first data lines and second data lines are formed by use of a Levenson’s line-and-space mask which is coated with shifters of alternately different phases.
16. A semiconductor integrated circuit device according to claim 13, wherein said first and second data lines have a virtually equal line spacing.
17. A semiconductor integrated circuit device according to claim 13, wherein said first and second lines and said first and second data lines have a line spacing which is equal to a minimum working dimension.
18. A semiconductor integrated circuit device according to claim 13, wherein said memory cells are each formed in an area having a size of 4F2 (where F denotes a minimum working dimension).
19. A semiconductor integrated circuit device comprising:
(a) first data lines which are formed to extend in a first direction on a first layer and connected with a plurality of first memory cells;
(b) second data lines which are formed to extend in the first direction on said first layer and connected with a plurality of second memory cells;
(c) first lines which are formed to extend straight only in the first direction on a second layer different from said first layer and connected with said first data lines;
(d) second lines which are formed to extend straight only in the first direction on said second layer and connected with said second data lines; and
(e) sense amplifiers which are connected to said first lines and said second lines and adapted to amplify voltage differences between said first lines and said second lines, said first and second lines being laid out over said sense amplifiers.
20. A semiconductor integrated circuit device comprising:
(a) first data lines which are formed to extend in a first direction on a first layer and connected with a plurality of first memory cells;
(b) second data lines which are formed to extend in the first direction on said first layer and connected with a plurality of second memory cells;
(c) sense amplifiers which amplify voltage differences between said first data lines and said second data lines;
(d) first lines which are formed to extend in the first direction on a second layer which is an upper layer relative to said first layer, and are connected between said first data lines and said sense amplifiers;
(e) second lines which are formed to extend in the first direction on said second layer and connected between said first data lines and said sense amplifiers; and
(f) precharge lines (VBLR) adapted to feed a precharge voltage to said first and second data lines,
wherein said precharge lines are formed to extend in a second direction perpendicular to the first direction on said first layer.
21. A semiconductor integrated circuit device comprising:
(a) first data lines which are formed to extend in a first direction on a first layer and connected with a plurality of first memory cells;
(b) second data lines which are formed to extend in the first direction on said first layer and connected with a plurality of second memory cells;
(c) sense amplifiers which amplify voltage differences between said first data lines and said second data lines;
(d) first lines which are formed to extend in the first direction on a second layer which is an upper layer relative to said first layer, and are connected between said first data lines and said sense amplifiers;
(e) second lines which are formed to extend in the first direction on said second layer and connected between said second data lines and said sense amplifiers; and
(f) power lines (CSN) adapted to feed a power voltage to said sense amplifiers,
wherein said power lines are formed to extend in a second direction perpendicular to the first direction on said first layer.
22. A semiconductor integrated circuit device comprising:
(a) first data lines which are formed to extend in a first direction on a first layer and connected with a plurality of first memory cells;
(b) second data lines which are formed to extend in the first direction on said first layer and connected with a plurality of second memory cells;
(c) sense amplifiers which amplify voltage differences between said first data lines and said second data lines;
(d) first lines which are formed to extend in the first direction on a second layer which is an upper layer relative to said first layer, and are connected between said first data lines and said sense amplifiers;
(e) second lines which are formed to extend in the first direction on said second layer and connected between said second data lines and said sense amplifiers; and
(f) ground lines (CSP) which are formed to extend in a second direction perpendicular to the first direction on said first layer and adapted to feed a ground voltage to said sense amplifiers.
23. A semiconductor integrated circuit device comprising:
(a) first data lines which are formed on a first layer and connected with first memory cells;
(b) second data lines which are formed on said first layer and connected with second memory cells;
(c) sense amplifiers which amplify voltage differences between said first data lines and said second data lines;
(d) first lines which are formed on a second layer which is an upper layer relative to said first layer, and are connected between said first data lines and said sense amplifiers;
(e) second lines which are formed on said second layer and connected between said second data lines and said sense amplifiers; and
(f) voltage lines (CSP, CSN) adapted to feed voltages to said sense amplifiers,
wherein said voltage lines are formed on said first layer to extend in a direction which intersects said first lines.
24. A semiconductor integrated circuit device comprising:
(a) a first memory array area which includes a plurality of first memory cells and first data lines which are formed on a first layer and connected with said first memory cells;
(b) a second memory array area which includes a plurality of second memory cells and second data lines which are formed on said first layer and connected with said second memory cells;
(c) a sense amplifier area which includes sense amplifiers;
(d) a first connecting area located between said first memory array area and said sense amplifier area;
(e) a second connecting area located between said second memory array area and said sense amplifier area; and
(f) a switch forming area which is located between said first memory array area and said first connecting area,
wherein said semiconductor integrated circuit device further includes:
(g) first lines which are formed on a second layer different from said first layer and connected in said first connecting area to said first data lines;
(h) second lines which are formed on said second layer and connected in said second connecting area to said second data lines,
said switch forming area including data transfer lines (IO) and switch circuits having signal transfer paths which are connected between said first data lines and said data transfer lines, and
said data transfer lines being formed on said first layer to extend in a direction which intersects said first lines.
25. A semiconductor integrated circuit device comprising:
(a) a first memory array area which includes a plurality of first memory cells and first data lines which are formed on a first layer and connected with said first memory cells;
(b) a second memory array area which includes a plurality of second memory cells and second data lines which are formed on said first layer and connected with said second memory cells;
(c) a sense amplifier area which includes sense amplifiers;
(d) a first connecting area located between said first memory array area and said sense amplifier area;
(e) a second connecting area located between said second memory array area and said sense amplifier area; and
(f) a switch forming area which includes switch circuits connected between said first data lines and data transfer lines,
wherein said semiconductor integrated circuit device further includes:
(g) first lines which are formed on a second layer different from said first layer and connected in said first connecting area to said first data lines; and
(h) second lines which are formed on said second layer and connected in said second connecting area to said second data lines,
said switch forming area being formed between said sense amplifier area and said first connecting area, with lines different from said first and second lines and formed on said second layer over said switch forming area.
26. A semiconductor integrated circuit device comprising:
(a) a first memory array area which includes a plurality of first memory cells and first data lines which are formed on a first layer and connected with said first memory cells;
(b) a second memory array area which includes a plurality of second memory cells and second data lines which are formed on said first layer and connected with said second memory cells;
(c) a sense amplifier area which includes sense amplifiers;
(d) a first connecting area located between said first memory array area and said sense amplifier area;
(e) a second connecting area located between said second memory array area and said sense amplifier area;
(f) a switch forming area which includes switch circuits connected between said first data lines and data transfer lines; and
(g) a precharge circuit forming area which includes precharge circuits connected between said first data lines and said second data lines,
wherein said semiconductor integrated circuit device further includes:
(h) first lines which are formed on a second layer different from said first layer and connected in said first connecting area to said first data lines; and
(i) second lines which are formed on said second layer and connected in said second connecting area to said second data lines,
said switch forming area being formed between said sense amplifier area and said first connecting area, with lines different from said first and second lines and formed on said second layer over said switch forming area and said precharge circuit forming area.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A device for measuring sexual function comprising:
an adjustable ring forming an opening to receive a penis;
at least one diagnostic sensor positioned on an inner surface of the adjustable ring, wherein the ring automatically couples the diagnostic sensor to the penis throughout a range of ring diameters, wherein the at least one diagnostic sensor includes a temperature sensor configured to measure penile temperature data; and
a microcontroller in communication with the at least one diagnostic sensor,
wherein the at least one diagnostic sensor measures data during sexual activity and communicates the data and the penile temperature data to the microcontroller.
2. The device of claim 1 wherein at least a portion of the adjustable ring is an elastic circumferential gauge, wherein the microcontroller is configured to receive data from the elastic circumferential gauge.
3. The device of claim 1 further comprising a power supply module.
4. The device of claim 1 further comprising a wireless communication module.
5. The device of claim 1 wherein the data includes blood flow data, rigidity data, temperature data, 3-axis acceleration data, or combinations thereof.
6. The device of claim 1 wherein the at least one diagnostic sensor includes a blood flow sensor configured to measure blood flow data.
7. The device of claim 6 wherein the blood flow sensor includes an ultrasound transducer.
8. The device of claim 1 wherein the at least one diagnostic sensor includes a rigidity sensor configured to measure penile rigidity data, wherein the rigidity sensor includes an ultrasound transducer.
9. The device of claim 1 wherein the device further includes an accelerometer, wherein the microcontroller is configured to receive 3-axis acceleration data from the accelerometer.
10. The device of claim 1 wherein the device includes a pulse oximeter sensor configured to measure oxygenation data, wherein the microcontroller is configured to receive oxygenation data from the pulse oximeter sensor.
11. The device of claim 1 wherein the device further includes a strain gauge used to determine circumferential data.
12. The device of claim 1 wherein the device is configured to be worn by a user during sexual activity.
13. The device of claim 1 wherein the microcontroller adjusts the diameter of the adjustable ring based on received data.
14. A system for measuring sexual function comprising:
a device comprising:
an adjustable ring forming an opening to receive a penis, and at least one diagnostic sensor positioned on an inner surface of the adjustable ring, wherein the adjustable ring automatically couples the diagnostic sensor to the penis throughout a range of ring diameters, and wherein the at least one diagnostic sensor includes an accelerometer for monitoring movement of the penis;
a microcontroller in communication with the at least one diagnostic sensor, wherein the at least one diagnostic sensor measures data during sexual activity and communicates the data to the microcontroller; and
an application in communication with the microcontroller, wherein the application is configured to display the data received from the microcontrollers;
wherein the microcontroller is configured to receive 3-axis acceleration data from the accelerometer.
15. The system of claim 14 wherein the at least one diagnostic sensor includes a blood flow sensor including an ultrasound transducer.
16. The system of claim 14 wherein the at least one diagnostic sensor includes a rigidity sensor including an ultrasound transducer.
17. The system of claim 14 wherein the device further includes a strain gauge used to determine circumferential data.
18. The system of claim 14 wherein the microcontroller, in response to the data, is configured to adjust a diameter of the ring to enable a user to maintain an erection during sexual activity.