Author: claimsbot

1. An organic light emitting display device comprising:
a substrate having a pixel region and a transparent region;
a semiconductor device disposed on the substrate;
an insulation layer disposed on the semiconductor device, the insulation layer including an inclined structure;
a first electrode disposed on the insulation layer;
a pixel defining layer disposed on the insulation layer and the first electrode, the pixel defining layer having a pixel opening exposing the first electrode positioned on the inclined structure;
to an organic light emitting layer disposed on the exposed first electrode and the pixel defining layer; and
a second electrode disposed on the organic light emitting layer and the pixel defining layer,
wherein light generated from the organic light emitting layer is directed in different directions by the inclined structure.
2. The organic light emitting display device of claim 1, wherein the inclined structure includes an upper face of the insulation layer having portions inclined by different inclination angles relative to the substrate.
3. The organic light emitting display device of claim 2, wherein a first portion of the upper face of the insulation layer is parallel to an upper surface of the substrate, and a second portion of the upper face of the insulation layer is inclined toward the upper surface of the substrate.
4. The organic light emitting display device of claim 3, wherein the second portion of the upper face of the insulation layer has an inclination angle of about 30\xb0 to about 60\xb0 with respect to the upper surface of the substrate.
5. The organic light emitting display device of claim 4, wherein a first portion of the first electrode on the first portion of the upper face of the insulation layer is parallel to the upper surface of the substrate, and a second portion of the first electrode on the second portion of the upper face of the insulation layer has an inclination angle substantially identical to the inclination angle of the second portion of the upper face.
6. The organic light emitting display device of claim 5, wherein a first portion of the organic light emitting layer on the first portion of the first electrode is parallel to the upper surface of the substrate, and a second portion of the organic light emitting layer on the second portion of the first electrode has an inclination angle substantially identical to the inclination angle of the second portion of the first electrode.
7. The organic light emitting display device of claim 3, wherein the organic light emitting layer extends onto a sidewall of the pixel opening.
8. The organic light emitting display device of claim 3, wherein the organic light emitting display device is a top emission type.
9. The organic light emitting display device of claim 2, wherein a first portion of the upper face of the insulation layer is parallel to an upper surface of the substrate, and a second the upper face of the insulation layer is inclined away from the upper surface of the substrate.
10. The organic light emitting display device of claim 9, wherein the second the upper face of the insulation layer has an inclination angle of about 120\xb0 to about 150\xb0 with respect to the upper surface of the substrate.
11. The organic light emitting display device of claim 9, wherein the organic light emitting display device is a bottom emission type.
12. The organic light emitting display device of claim 1, further comprising an opening provided through the insulation layer and the pixel defining layer in the transparent region, wherein openings of adjacent pixels are symmetrically arranged each other.
13. The organic light emitting display device of claim 1, wherein a first portion of a sidewall of the pixel opening has an inclination angle greater than an inclination angle of a second portion of the sidewall of the pixel opening.
14. The organic light emitting display device of claim 13, wherein a ratio between the inclination angle of the first portion and the inclination angle of the second portion is in a range of about 1.0:0.5 to about 1.0:1.7.
15. A method of manufacturing an organic light emitting display device, comprising:
providing a substrate having a pixel region and a transparent region;
forming a semiconductor device on the substrate;
forming an insulation layer including an inclined structure on the semiconductor device;
forming a first electrode on the insulation layer;
forming a pixel defining layer on the insulation layer and the first electrode, the pixel defining layer having a pixel opening exposing the first electrode positioned on the inclined structure;
forming an organic light emitting layer on the exposed first electrode and the pixel defining layer; and
forming a second electrode on the organic light emitting layer and the pixel defining layer.
16. The method of claim 15, wherein the inclined structure is formed in a configuration to cause light generated from the organic light emitting layer to be directed in different directions.
17. The method of claim 15, wherein forming the insulation layer includes:
forming the insulation layer on the substrate to cover the semiconductor device;
pressing the insulation layer using a mold having a profile opposed to the inclined structure; and
curing the insulation layer.
18. The method of claim 15, wherein forming the insulation layer includes:
forming the insulation layer on the substrate to cover the semiconductor device; and
partially removing the insulation layer using a mask having mask patterns disposed at different distances.
19. The method of claim 15, further comprising forming an opening by partially removing the pixel defining layer and the insulation layer in the transparent region, wherein openings of adjacent pixels are symmetrically arranged with each other.
20. The method of claim 19, wherein the organic light emitting layer is formed to extend onto a sidewall of the pixel defining layer.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. Circuitry for use with a general purpose performance counter (\u201cGPPC\u201d) connected to a bus carrying a plurality of encoded state coverage signals indicative of test coverage in a logic design, said circuitry for decoding and capturing coverage information, comprising:
a selection circuit operating to select said plurality of encoded state coverage signals from a multi-bit event signal carried on said bus;
a line decoder operating to decode said plurality of encoded state coverage signals into N one-hot signals, wherein each one-hot signal is asserted when a corresponding state in said logic design is covered during a test; and
a capture circuit coupled to said line decoder for capturing said N one-hot signals.
2. The circuitry as recited in claim 1, wherein said capture circuit comprises:
an OR logic block for bit-wise ORing said N one-hot signals with an N-bit mask value stored in a register block, said OR logic block operating to generate an N-bit output; and
a Multiplexer (MUX) block operating to select said N-bit output from said OR logic block under control of at least one control signal, wherein said N-bit output is operable to be stored into said register block when selected by said MUX block.
3. The circuitry as recited in claim 2, wherein said OR logic block comprises N 2-input OR gates.
4. The circuitry as recited in claim 2, wherein said MUX block comprises N MUX elements, each for selecting a particular bit of said N-bit output.
5. The circuitry as recited in claim 2, wherein said MUX block comprises N MUX elements, each operating responsive to two control signals for selecting among four MUX inputs, including a particular bit of said N-bit output.
6. The circuitry as recited in claim 5, wherein one of said MUX inputs comprises a value stored in a control status register (CSR).
7. The circuitry as recited in claim 5, wherein one of said MUX inputs comprises said mask value stored in said register block.
8. The circuitry as recited in claim 5, wherein one of said MUX inputs comprises a fixed binary 0 value.
9. The circuitry as recited in claim 1, wherein N is 80.
10. A method of capturing state coverage information in a logic design, comprising:
encoding state coverage information generated when said logic design is exercised under test onto a segment of a bus connected to a general purpose performance counter (\u201cGPPC\u201d);
selecting said segment of said bus for processing;
decoding said segment of said bus into N one-hot signals, wherein each one-hot signal is asserted when a corresponding state in said logic design has been covered during test;
bit-wise ORing said N one-hot signals with an N-bit mask value stored in a register block for generating an N-bit output; and
selecting said N-bit output by a Multiplexer (MUX) block operating under control of at least one control signal, wherein said N-bit output is operable to be stored into said register block when selected by said MUX block.
11. The method of capturing state coverage information in a logic design as recited in claim 10, wherein said bit-wise ORing operation is performed by an OR logic block comprising N 2-input OR gates.
12. The method of capturing state coverage information in a logic design as recited in claim 10, wherein said selecting of said N-bit output is performed by a MUX block comprising N MUX elements, each operating responsive to two control signals for selecting among four MUX inputs, including a particular bit of said N-bit output.
13. The method of capturing state coverage information in a logic design as recited in claim 12, wherein one of said MUX inputs comprises a value stored in a control status register (CSR).
14. The method of capturing state coverage information in a logic design as recited in claim 12, wherein one of said MUX inputs comprises said mask value stored in said register block.
15. The method of capturing state coverage information in a logic design as recited in claim 12, wherein one of said MUX inputs comprises a fixed binary 0 value.
16. The method of capturing state coverage information in a logic design as recited in claim 10, wherein N is 80.
17. A system for capturing state coverage information in a logic design, comprising:
means for encoding state coverage information generated when said logic design is exercised under test onto a segment of bus connected to a general purpose performance counter (\u201cGPPC\u201d);
means for selecting said segment of said bus for processing;
means for decoding said segment of said bus into N one-hot signals, wherein each one-hot signal is asserted when a corresponding state in said logic design has been covered during test;
means for generating an N-bit output based on a logic operation between said N one-hot signals and an N-bit mask value stored in a register block; and
a Multiplexer (MUX) block operating to select said N-bit output under control of at least one control signal, wherein said N-bit output is operable to be stored into said register block when selected by said MUX block.
18. The system for capturing state coverage information in a logic design as recited in claim 17, wherein said means for generating said N-bit output comprises an OR logic block that includes N 2-input OR gates for performing a bit-wise logic OR operation.
19. The system for capturing state coverage information in a logic design as recited in claim 17, wherein said MUX block comprises N MUX elements, each operating in response to two control signals for selecting among four MUX inputs, including a particular bit of said N-bit output.
20. The system for capturing state coverage information in a logic design as recited in claim 19, wherein one of said MUX inputs comprises a value stored in a control status register (CSR).
21. The system for capturing state coverage information in a logic design as recited in claim 19, wherein one of said MUX inputs comprises said mask value stored in said register block.
22. The system for capturing state coverage information in a logic design as recited in claim 19, wherein one of said MUX inputs comprises a fixed binary 0 value.
23. The system for capturing state coverage information in a logic design as recited in claim 17, wherein N is 80.

1. A magnetic motor axle for a skateboard, comprising:
a truck for mounting on a step board;
an elongated rotor assembly rotatably carried by said truck;
a plurality of rotor magnets carried by said rotor assembly, wherein said rotor magnets are not electro-magnets;
a plurality of truck magnets carried by said truck for magnetically repelling said plurality of rotor magnets, respectively;
wherein said truck magnets are not electro-magnets;
at least one drive wheel drivingly engaged by said rotor assembly; and
at least one magnetic disk assembly having a plurality of disk magnets carried by said rotor assembly and a plurality of stationary magnets carried by said truck for magnetically repelling said plurality of disk magnets, respectively, wherein said disk magnets and stationary magnets are non-electro-magnets.
2. The magnetic motor axle of claim 1 wherein said at least one magnetic disk assembly comprises a pair of magnetic disk assemblies.
3. The magnetic motor axle of claim 1 wherein said at least one magnetic disk assembly comprises a disk carried by said rotor assembly and wherein said plurality of disk magnets is carried by said disk.
4. The magnetic motor axle of claim 1 further comprising a free wheel carried by said rotor assembly.
5. The magnetic motor axle of claim 4 further comprising at least one magnetic disk assembly having a plurality of disk magnets carried by said rotor assembly and a plurality of stationary magnets carried by said truck for magnetically repelling said plurality of stationary magnets, respectively.
6. The magnetic motor axle of claim 5 wherein said at least one magnetic disk assembly comprises a pair of magnetic disk assemblies.
7. The magnetic motor axle of claim 6 wherein said pair of magnetic disk assemblies each comprises a disk carried by said rotor assembly and wherein said plurality of disk magnets is carried by said disk.
8. A magnetic motor axle for a skateboard, comprising:
a truck for mounting on a step board;
an elongated rotor assembly rotatably carried by said truck;
a plurality of rotor magnets carried by said rotor assembly, wherein said rotor magnets are non electro-magnets;
a first set of truck magnets carried by said truck on a first side of said rotor assembly and a second set of truck magnets carried by said truck on a second side of said rotor assembly for magnetically repelling said plurality of rotor magnets, respectively, wherein said truck magnets are non electro-magnets;
at least one drive wheel drivingly engaged by said rotor assembly; and
at least one magnetic disk assembly having a plurality of disk magnets carried by said rotor assembly and a plurality of stationary magnets carried by said truck for magnetically repelling said plurality of disk magnets, respectively, wherein said disk magnets and stationary magnets are non-electro-magnets.
9. The magnetic motor axle of claim 8 wherein said at least one magnetic disk assembly comprises a pair of magnetic disk assemblies.
10. The magnetic motor axle of claim 9 wherein said pair of magnetic disk assemblies each comprises a disk carried by said rotor assembly and wherein said plurality of disk magnets is carried by said disk.
11. The magnetic motor axle of claim 8 further comprising a free wheel carried by said rotor assembly.
12. The magnetic motor axle of claim 11 further comprising at least one magnetic disk assembly having a plurality of disk magnets carried by said rotor assembly and a plurality of stationary magnets carried by said truck for magnetically repelling said plurality of stationary magnets, respectively.
13. The magnetic motor axle of claim 12 wherein said at least one magnetic disk assembly comprises a pair of magnetic disk assemblies.
14. The magnetic motor axle of claim 13 wherein said pair of magnetic disk assemblies each comprises a disk carried by said rotor assembly and wherein said plurality of disk magnets is carried by said disk.
15. A magnetic motor axle for a skateboard, comprising:
a truck for mounting on a step board;
an elongated, generally cylindrical rotor assembly rotatably carried by said truck;
a plurality of spaced-apart rotor magnets carried by said rotor assembly, said rotor magnets arranged in a generally staggered relationship to each other around a circumference of said rotor assembly, wherein said rotor magnets are non electro-magnets;
a plurality of truck magnets carried by said truck for magnetically repelling said plurality of rotor magnets, respectively, wherein said truck magnets are non electro-magnets;
at least one drive wheel drivingly engaged by said rotor assembly; and
at least one magnetic disk assembly having a plurality of disk magnets carried by said rotor assembly and a plurality of stationary magnets carried by said truck for magnetically repelling said plurality of disk magnets, respectively, wherein said disk magnets and stationary magnets are non electro-magnets.
16. The magnetic motor axle of claim 15 wherein said at least one magnetic disk assembly comprises a pair of magnetic disk assemblies.
17. The magnetic motor axle of claim 16 further comprising a free wheel carried by said rotor assembly.
18. The magnetic motor axle of claim 17 wherein said rotor assembly comprises an elongated central segment, a pair of disk mount segments extending from said central segment and a pair of axle segments extending from said pair of disk mount segments, respectively; and wherein said plurality of rotor magnets is carried by said central segment, said pair of magnetic disk assemblies is carried by said pair of disk mount segments, respectively, and said at least one drive wheel and said free wheel are carried by said pair of axle segments, respectively.
19. The magnetic motor axle of claim 15 wherein said plurality of truck magnets comprises a first set of truck magnets carried by said truck on a first side of said rotor assembly and a second set of truck magnets carried by said truck on a second side of said rotor assembly.
20. The magnetic motor axle of claim 19 further comprising a pair of magnetic disk assemblies each having a plurality of disk magnets carried by said rotor assembly and a plurality of stationary magnets carried by said truck for magnetically repelling said plurality of disk magnets, respectively.
21. The magnetic motor axle of claim 20 further comprising a free wheel carried by said rotor assembly.
22. The magnetic motor axle of claim 21 wherein said rotor assembly comprises an elongated central segment, a pair of disk mount segments extending from said central segment and a pair of axle segments extending from said pair of disk mount segments, respectively; and wherein said plurality of rotor magnets is carried by said central segment, said pair of magnetic disk assemblies is carried by said pair of disk mount segments, respectively, and said at least one drive wheel and said free wheel are carried by said pair of axle segments, respectively.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An apparatus for monitoring container activity, the apparatus comprising:
a housing that can be attached to a container;
a processing unit communicatively coupled to a memory device and embedded in the housing;
an actuator interface on the housing that is communicatively coupled to the processing unit;
an indicator on the housing that is communicatively coupled to the processing unit;
an accelerometer communicatively coupled to the processing unit and operative to provide signals to the processing unit when the container to which the housing is attached is moved;
the processing unit, in response to instructions read from the memory device is operative to:
receive programming data identifying scheduled times at which the container should be accessed;
monitor activity based on signals received from the accelerometer; and
if activity is not detected proximate to a scheduled time, send an alert signal to the indicator.
2. The apparatus of claim 1, wherein the processing unit is operative to receive programming data by:
receiving a first actuation of the actuator interface;
in response to the first actuation, entering a learning mode for a given period of time;
monitor signals from the accelerometer to identify container access activity;
for each container access activity, creating a scheduled time that corresponds to the activity time; and
exiting the learning mode after the given period of time expires.
3. The apparatus of claim 2, wherein the processing unit, in response to instructions read from the memory device, is further operative to, if activity is detected that is not proximate to a scheduled time, sending an alert signal to the indicator.
4. A activity monitor that can be affixed to a medicine bottle, the disposable activity monitor comprising:
a housing including at least one button accessible on the exterior of the housing and at least one indicator;
an activity detector;
a processing unit coupled to the at least one button, the at least one indicator, a memory device and the activity detector; and
a schedule, stored within the memory device, that includes data which at least defines a time of the day at which medicine is supposed to be dispensed.
5. The activity monitor of claim 4, wherein the activity detector comprises an accelerometer.
6. The activity monitor of claim 4, wherein the activity detector comprises a sensor operable to detect when a cap has been removed from the medicine bottle.
7. The activity monitor of claim 4, wherein the processing unit, in response to instructions read from the memory device, is operative to enter a learning mode in which activity associated with the medicine bottle over a certain period of time is used to generate the schedule.
8. The activity monitor of claim 4, wherein the processing unit, in response to instructions read from the memory device, is operative to:
enter a learning mode in which activity associated with the medicine bottle over a certain period of time is used to generate the schedule; and
enter an operational mode in which activity associated with the medicine bottle in view of the schedule, causes the processing unit to:
send an alert signal to the indicator if scheduled activity does not occur; and
send an alert signal to the indicator if activity outside of the schedule occurs.
9. The activity monitor of claim 4, wherein the processing unit, in response to instructions read from the memory device, is operative to:
detect activity signals from the activity detector;
analyze the detected activity signals in view of the schedule;
if activity that does not correspond with the schedule is detected, generating a tamper alert signal; and
if activity does not occur in accordance with the schedule, generating an attention alert signal.
10. The activity monitor of claim 9, further comprising a transmitter that is communicatively coupled to the processing unit and, the processing unit is further operative to send the generated tamper alert signal or the attention alert signal over the transmitter.
11. The activity monitor of claim 9, wherein the processing unit is further operative to send the generated alert signals to the indicator.
12. The activity monitor of claim 9, further comprising a transceiver and, wherein the processing unit is further operative to:
send the generated alert signals to a device over the transceiver; and
receive programming data for the schedule over the transceiver.
13. The activity monitor of claim 4, wherein the memory device includes multiple schedules, and the processing unit, in response to instructions read from the memory device, is operative to:
detect a first actuation of the at least one button;
identifying the actuation;
selecting a schedule from the multiple schedules based at least in part on the identity of the actuation.
14. The activity monitor of claim 13, wherein the processing unit, in response to instructions read from the memory device, is operative to:
detect activity signals from the activity detector;
analyze the detected activity signals in view of the schedule;
if activity that does not correspond with the schedule is detected, generating a tamper alert signal; and
if activity does not occur in accordance with the schedule, generating an attention alert signal.
15. The activity monitor of claim 14, further comprising a transmitter that is communicatively coupled to the processing unit and, the processing unit is further operative to send the generated tamper alert signal or the attention alert signal over the transmitter.
16. The activity monitor of claim 14, wherein the processing unit is further operative to send the generated alert signals to the indicator.
17. A tamper detector that can be attached to a container to monitor activity associated with the container, the tamper detector comprising:
a housing including at least one button accessible on the exterior of the housing and at least one indicator;
an activity detector;
a processing unit coupled to the at least one button, the at least one indicator, a memory device and the activity detector; and
a schedule, stored within the memory device, that includes data which defines at least one window of time during which activity associated with the container is permissible and at least one window of time during which activity associated with the container is not permissible.
18. The tamper detector of claim 17 wherein the activity detector is an accelerometer.
19. The tamper detector of claim 17, wherein the processing unit, in response to instructions read from the memory device, is operative to:
detect activity signals from the activity detector;
analyze the detected activity signals in view of the schedule; and
if activity occurs during a not permissible window, generating an alarm signal.
20. The activity monitor of claim 19, further comprising a wireless transmitter that is communicatively coupled to the processing unit and, the processing unit is further operative to send the generated alarm signal over the transmitter.