Author: claimsbot

1. An apparatus, comprising:
a processor; and
memory including computer program code
said memory and said computer program code configured to, with said processor, cause said apparatus to perform at least the following:
determine a current mobility state from a plurality of mobility states of said apparatus in an idle mode or a connected mode;
determine whether or not to collect, store, and report measurement data in said memory depending on said current mobility state;
at least one of collect, store, or report based on said current mobility state; and
determining the mobility state by determining at least one of a velocity in accordance with a global positioning system or a number of cell reselectionscell handovers in a period of time.
2. The apparatus as recited in claim 1 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to collect and store said measurement data in said memory when said apparatus is in a predefined mobility state.
3. The apparatus as recited in claim 1 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to transmit said measurement data to a base station in a connected mode.
4. The apparatus as recited in claim 1 wherein said measurement data comprises signal quality or power received at said apparatus.
5. The apparatus as recited in claim 1 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to determine said mobility state of said apparatus, and collect and store said measurement data in said memory in accordance with a control strategy from a base station.
6. The apparatus as recited in claim 5 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to receive said control strategy from said base station through radio resource control signaling when said apparatus is in a connected mode or a system information broadcast message when said apparatus is in an idle mode.
7. A method, comprising:
determining a current mobility state from a plurality of mobility states of a user equipment in an idle mode or a connected mode;
determining whether or not to undergo collecting, storing, and reporting measurement data in memory depending on said current mobility state;
at least one of collecting, storing, reporting based on said current mobility state; and
determining the mobility state by determining at least one of a velocity in accordance with a global positioning system or a number of cell reselectionscell handovers in a period of time.
8. The method as recited in claim 7 wherein said collecting and storing said measurement data is performed when said user equipment is in a predefined mobility state.
9. An apparatus, comprising:
a processor; and
memory including computer program code
said memory and said computer program code configured to, with said processor, cause said apparatus to perform at least the following:
determine a current mobility state from a plurality of mobility states of a user equipment in an idle mode or a connected mode, wherein the mobility state is determined by at least one of a velocity in accordance with a global positioning system or a number of cell reselectionscell handovers in a period of time;
direct said user equipment to determine whether or not to collect, store, and report measurement data depending on said current mobility state; and
at least one of collect, store, and report based on said current mobility state.
10. The apparatus as recited in claim 9 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to direct said user equipment to collect and store said measurement data when said user equipment is in a predefined mobility state.
11. The apparatus as recited in claim 9 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to receive said measurement data when said user equipment is in a connected mode.
12. The apparatus as recited in claim 9 wherein said measurement data comprises signal quality or power received at said user equipment.
13. The apparatus as recited in claim 9 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to direct said user equipment to collect and store said measurement data in accordance with a control strategy.
14. The apparatus as recited in claim 13 wherein said memory and said computer program code is configured to, with said processor, cause said apparatus to transmit said control strategy to said user equipment through radio resource control signaling when said user equipment is in a connected mode or a system information broadcast message when said user equipment is in an idle mode.
15. A method, comprising:
determining a current mobility state from a plurality of mobility states of a user equipment in an idle mode or a connected mode, wherein the mobility state is determined by at least one of a velocity in accordance with a global positioning system or a number of cell reselectionscell handovers in a period of time;
directing said user equipment to determine whether or not to collect, store, and report measurement data depending on said current mobility state; and
at least one of collect, store, or report based on current mobility state.
16. The method as recited in claim 15 wherein said directing said user equipment to collect and store said measurement data occurs when said user equipment is in a predefined mobility state.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An integrated circuit comprising:
a first controllable current sink having a first input and a first output, the first output configured to drive a first end of a primary winding of a transformer;
a second controllable current sink having a second input and a second output, the second output configured to drive a second end of the primary winding of the transformer;
modulator circuitry configured to drive the first input of the first current sink and drive the second input of the second current sink based upon an input signal and limited by first and second feedback signals; and
protection circuitry configured to produce the first and second feedback signals to limit operations of the first controllable current sink and the second controllable current sink to protect the integrated circuit from voltage levels greater than a protection voltage of the integrated circuit at the first output and the second output.
2. The integrated circuit of claim 1, wherein the transformer comprises a center tap that is electrically connected to a voltage of between two to five times greater than a supply voltage of the integrated circuit.
3. The integrated circuit of claim 1, wherein at least one of the first and second controllable current sinks comprises an active circuit.
4. The integrated circuit of claim 1, wherein the protection circuitry comprises:
a first main protection circuit configured to connect in series between the first end of the primary winding of the transformer and the modulator circuitry; and
a second main protection circuit configured to connect in series between the second end of the primary winding of the transformer and the modulator circuitry.
5. The integrated circuit of claim 4, wherein:
the first protection circuit comprises a first attenuator having a first input configured to couple to the first end of the primary winding and a second input coupled to a first reference voltage; and
the second protection circuit comprises a second attenuator having a first input configured to couple to the second end of the primary winding and a second input coupled to a second reference voltage.
6. The integrated circuit of claim 5, wherein the first reference voltage comprises one of:
a same voltage as the second reference voltage; or
a different voltage than the second reference voltage.
7. The integrated circuit of claim 1, wherein:
the first controllable current sink comprises a first transistor; and
the second controllable current sink comprises a second transistor.
8. The integrated circuit of claim 1, wherein the modulator circuitry is configured so that one of the first controllable current sink and the second controllable current sinks current at any time.
9. An integrated circuit comprising:
a first controllable current sink having a first input and a first output, the first output configured to drive a first end of a primary winding of a transformer;
a second controllable current sink having a second input and a second output, the second output configured to drive a second end of the primary winding of the transformer;
a first main protection circuit configured to connect in series between the first end of the primary winding of the transformer and the first input of the first controllable current sink; and
a second main protection circuit configured to connect in series between the second end of the primary winding of the transformer and the second input of the second controllable current sink,
wherein the first and second main protection circuits are configured to limit operations of the first controllable current sink and the second controllable current sink to protect the integrated circuit from voltage levels greater than a protection voltage of the integrated circuit at the first and second output.
10. The integrated circuit of claim 9, wherein the transformer comprises a center tap that is electrically connected to a voltage of between two to five times greater than a supply voltage of the integrated circuit.
11. The integrated circuit of claim 9, wherein at least one of the first and second current sinks comprises an active circuit.
12. The integrated circuit of claim 9, wherein an input signal that drives the first controllable current sink and the second controllable current sink comprises a differential information signal.
13. The integrated circuit of claim 12, wherein:
the first protection circuit comprises a first attenuator having a first input configured to couple to the first end of the primary winding and a second input coupled to receive a positive input of the differential information signal; and
the second protection circuit comprises a second attenuator having a first input configured to couple to the second end of the primary winding and a second input coupled to receive a negative input of the differential information signal.
14. The integrated circuit of claim 9, wherein:
the first controllable current sink comprises a first transistor; and
the second controllable current sink comprises a second transistor.
15. An integrated circuit comprising:
a first transistor having a gate receiving a first input, a drain providing a first output, and a source coupled to a reference voltage, the first output configured to drive a first end of a primary winding of a transformer;
a second transistor having a gate receiving a second input, a drain providing a second output, and a source coupled to a reference voltage, the second output configured to drive a second end of the primary winding of the transformer;
a first main protection circuit configured to connect in series between the first end of the primary winding of the transformer and the first input of the first transistor; and
a second main protection circuit configured to connect in series between the second end of the primary winding of the transformer and the second input of the second transistor,
wherein the first and second main protection circuits are configured to limit operations of the first transistor and the second transistor to protect the integrated circuit from voltage levels greater than a protection voltage of the integrated circuit at the first and second output.
16. The integrated circuit of claim 15, wherein the transformer comprises a center tap that is electrically connected to a voltage of between two to five times greater than a supply voltage of the integrated circuit.
17. The integrated circuit of claim 15, wherein an input signal that drives the first transistor and the second transistor comprises a differential information signal.
18. The integrated circuit of claim 17, wherein:
the first protection circuit comprises a first attenuator having a first input configured to couple to the first end of the primary winding and a second input coupled to receive a positive input of the differential information signal; and
the second protection circuit comprises a second attenuator having a first input configured to couple to the second end of the primary winding and a second input coupled to receive a negative input of the differential information signal.
19. The integrated circuit of claim 17, wherein an input signal that drives the first and second transistors comprises a Power Line Communication (PLC) information signal.
20. The integrated circuit of claim 9, wherein an input signal that drives the first and second controllable current sinks comprises a Power Line Communication (PLC) information signal.

1-28. (canceled)
29. A semiconductor package substrate configured to support a damage-sensitive device having a base and at least one side, the semiconductor package substrate including a package substrate core having a first surface with a first conductive layer formed thereon, the first conductive layer including a first conductive support zone and including a plurality of routing lines for electrically interconnecting the damage-sensitive device to other electronic devices, the first conductive support zone including no routing lines and being configured so that when the damage-sensitive device is attached to the semiconductor package substrate at least one side of the damage-sensitive device is positioned over the first conductive support zone and a substantial portion of the base of the damage-sensitive is positioned over the first conductive support zone.
30. The semiconductor package substrate of claim 29 wherein the first conductive layer further comprises a plurality of conductive layers that collectively form a first conductive layer group, the first conductive layer group including the first conductive support zone.
31. The semiconductor package substrate of claim 29 further comprising a second conductive layer formed on a second surface of the package substrate core opposite the first surface, the second conductive layer including a second conductive support zone having no routing lines and the second conductive layer including a plurality of routing lines outside the second conductive support zone.
32. The semiconductor package substrate of claim 29 further comprising a solder mask layer formed on the first conductive layer.
33. The semiconductor package substrate of claim 29 wherein the first conductive support zone is configured so that when the damage-sensitive device is attached to the semiconductor package substrate at least three sides of the base of the damage-sensitive device are positioned over the first conductive support zone.
34. The semiconductor package substrate of claim 29 wherein the first conductive support zone is configured so that when the damage-sensitive device is attached to the semiconductor package substrate the entire base of the damage-sensitive device is positioned over the first conductive support zone.
35. The semiconductor package substrate of claim 30 wherein the first conductive layer comprises a metal layer.
36. The semiconductor package substrate of claim 35 wherein the metal layer comprises copper.
37. The semiconductor package substrate of claim 36 wherein the conductive support zone comprises a copper mesh.
38. The semiconductor package substrate of claim 29 wherein at least one of the sides the damage-sensitive device positioned over the first conductive support zone includes bonding pads of the damage-sensitive device.
39. An electronic system, comprising:
an electronic chip, including,
a damage sensitive device;
a semiconductor package substrate configured supporting the damage-sensitive device and having a base and at least one side, the semiconductor package substrate including a package substrate core having a first surface with a first conductive layer formed thereon, the first conductive layer including a first conductive support zone and including a plurality of routing lines for electrically interconnecting the damage-sensitive device to other electronic devices, the first conductive support zone including no routing lines and being configured so that when the damage-sensitive device is attached to the semiconductor package substrate at least one side of the damage-sensitive device is positioned over the first conductive support zone and a substantial portion of the base of the damage-sensitive is positioned over the first conductive support zone.
40. The electronic system of claim 39 wherein the damage-sensitive device comprises a MEMS device.
41. The electronic system of 39 wherein the electronic system comprises one of a bar code scanner, optical displays, computer system, digital still camera, and digital video camera.
42. A method of making a semiconductor package substrate including a damage-sensitive device, the damage-sensitive device having a base and at least one side and the semiconductor package substrate including a package substrate core, the method comprising:
forming a first conductive layer on a first surface of the package substrate core;
forming routing lines in the first conductive layer;
forming a first conductive support zone in the first conductive layer, the first conductive support zone being free of routing lines; and
attaching the damage-sensitive device to the semiconductor package substrate with at least one side of the damage-sensitive device positioned over the first conductive support zone and the majority of an area of the base of the damage-sensitive also being positioned over the first conductive support zone.
43. The method of claim 42 wherein forming a first conductive layer on a first surface of the package substrate core further comprises forming a plurality of conductive layers that collectively form a first conductive layer group, the first conductive layer group including the first conductive support zone.
44. The method of claim 42 further comprising forming a second conductive layer on a second surface of the package substrate core opposite the first surface, the second conductive layer including a second conductive support zone having no routing lines and the second conductive layer including a plurality of routing lines outside the second conductive support zone.
45. The method of claim 42 further comprising forming a solder mask layer on the first conductive layer.
46. The method of claim 42 wherein attaching the damage-sensitive device to the semiconductor package substrate comprises attaching the damage-sensitive device to the semiconductor package with at least three sides of the base of the damage-sensitive device positioned over the first conductive support zone.
47. The method of claim 42 wherein attaching the damage-sensitive device to the semiconductor package substrate comprises attaching the damage-sensitive device to the semiconductor package with the entire base of the damage-sensitive device positioned over the first conductive support zone.
48. The method of claim 47 wherein forming a first conductive layer on a first surface of the package substrate core comprises forming a copper mesh that corresponds to the first conductive support zone.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A catalyst composition for vapor phase ammoxidation of alkanes and olefins comprising a compound of the formula:
VWaBibMcOx
wherein M is one or more elements selected from sodium, cesium, magnesium, calcium, barium, boron, yttrium, indium, aluminum, gallium, tin, titanium, silicon, zirconium, germanium, niobium and tantalum, a is 0.2 to 10, b is 0.5 to 5, c is 0 to 10 and x is determined by the valence requirements of the elements present and
wherein antimony and molybdenum are not present.
2. The catalyst composition of claim 1 wherein M is one element selected from the group consisting of sodium, magnesium, gallium, yttrium, boron, titanium, tin, silicon, zirconium, germanium, aluminum and niobium.
3. The catalyst composition of claim 1 wherein M are two elements, one selected from the group consisting of aluminum and niobium and one selected from the group consisting of gallium, indium, sodium, tantalum, aluminum and niobium, with the two elements being different.
4. The catalyst composition of claim 1 wherein one or more mixed oxide selected from the group consisting of BiVO4 and Bi2WO6 is present.
5. The catalyst composition of claim 1 wherein the mixed oxide Bi3W1Nb9O30 is present.
6. The catalyst composition of claim 1 wherein the compound is VW0.2Bi1.6Ox, VW0.5Bi1.6Ox, VW0.8Bi1.6Ox, VW2Bi1.6Ox, VW0.8Bi0.5Ox, VW0.8Bi1Ox, VW0.8Bi2Ox, VW0.8Bi1.6Na0.05Ox, VW0.8Bi1.6Mg0.05Ox, VW0.8Bi1.6Ga0.5Ox, VW0.8Bi1.6Y0.5Ox, VW0.8Bi1.6B0.5Ox, VW0.8Bi1.6Ti0.5Ox, VW0.8Bi1.6Sn0.5Ox, VW0.8Bi1.6Si1Ox, VW0.8Bi1.6Zr2Ox, VW0.8Bi1.6Ge0.5Ox, VW0.8Bi1.6Al1Ox, VW0.8Bi1.6Nb0.5Ox, VW0.8Bi1.6Nb1.5Ox, VW0.8Bi1.6Nb0.5Ga0.2Ox, VW0.8Bi1.6Al1In0.5Ox, VW0.8Bi1.6Al1Ga0.1Ox, VW0.8Bi1.6Al1Na0.05Ox, VW0.8Bi1.6Al1Nb0.5Ox or VW0.8Bi1.6Al1Ta1Ox.
7. A process of making a catalyst composition for vapor phase ammoxidation of alkanes and olefins comprising:
a) forming a solution of a vanadium compound, a tungsten compound, a bismuth compound and, optionally, one or more compounds of M wherein M is selected from the group consisting of sodium, cesium, magnesium, calcium, barium, boron, yttrium, indium, aluminum, gallium, tin, titanium, silicon, zirconium, germanium, niobium and tantalum
wherein the solution does not contain an antimony compound or a molybdenum compound;
b) precipitating a catalyst precursor to form a suspension;
c) separating the catalyst precursor from the suspension;
d) drying the catalyst precursor; and
e) calcining the catalyst precursor to form a catalyst of the formula:
VWaBibMcOx
wherein M is one or more elements selected from sodium, cesium, magnesium, calcium, barium, boron, yttrium, indium, aluminum, gallium, tin, titanium, silicon, zirconium, germanium, niobium and tantalum, a is 0.2 to 10, b is 0.5 to 5, c is 0 to 10 and x is determined by the valence requirements of the elements present,
and wherein the catalyst does not contain antimony or molybdenum.
8. The process of claim 7 wherein the solution is formed by:
a) preparing a separate solution of the vanadium compound, a separate solution of the tungsten compound, a separate solution of the a bismuth compound and, optionally a separate solution of one or more compounds of M; and
b) mixing the separate solutions together.
9. The process of claim 7 wherein the vanadium compound, the tungsten compound, the bismuth compound and, optionally, one or more compounds of M are commonly dissolved in solution.
10. The process of claim 7 wherein the vanadium compound, the tungsten compound, the bismuth compound and, optionally, one or more compounds of M are dissolved in water to form the solution.
11. The process of claim 7 further comprising adding an acid or an alkali to the solution to form the solution.
12. The process of claim 7 further comprising heating to a temperature of from 30 to 90\xb0 C. to form the solution.
13. The process of claim 7 wherein the vanadium compound is ammonium metavanadate, vanadyl acetylacetonate, vanadyl chloride or vanadium pentafluoride.
14. The process of claim 7 wherein the tungsten compound is ammonium tungstate or tungstic acid.
15. The process of claim 7 wherein the bismuth compound is bismuth nitrate, a bismuth halide, a bismuth oxyhalide, bismuth sulfate or bismuth acetate.
16. The process of claim 7 wherein the compound of M is a nitrate, chloride, carbonate, oxalate or hydroxide.
17. The process of claim 7 additionally comprising obtaining and maintaining a pH of the solution in a range from 5 to 10.
18. The process of claim 17 wherein the pH is 8.
19. The process of claim 7 further comprising heating to a temperature in the range from 30\xb0 C. to 90\xb0 C. to precipitate the catalyst precursor to form a suspension.
20. The process of claim 7 wherein the catalyst precursor is separated from the suspension by filtration or evaporation.
21. The process of claim 20 wherein the catalyst precursor is separated from the suspension by evaporation by heating the suspension to a temperature in the range from 30\xb0 C. to 200\xb0 C.
22. The process of claim 21 wherein a viscous paste is formed after evaporation.
23. The process of claim 22 wherein the paste is dried at a temperature in the range from 30\xb0 C. to 200\xb0 C.
24. The process of claim 23 wherein the paste is dried at a temperature in the range from 100\xb0 C. to 150\xb0 C. and at one atmosphere pressure.
25. The process of claim 7 wherein the catalyst precursor is calcined at a temperature from 500 to 900\xb0 C.
26. The process of claim 25 wherein the catalyst precursor is calcined at a temperature from 550 to 650\xb0 C.
27. The process of claim 7 wherein the hydroxides are calcined in air.
28. The process of claim 7 wherein the catalyst composition is VW0.2Bi1.6Ox, VW0.5Bi1.6Ox, VW0.8Bi1.6Ox, VW2Bi1.6Ox, VW0.8Bi0.5Ox, VW0.8Bi1Ox, VW0.8Bi2Ox, VW0.8Bi1.6Na0.05Ox, VW0.8Bi1.6Mg0.05Ox, VW0.8Bi1.6Ga0.5Ox, VW0.8Bi1.6Y0.5Ox, VW0.8Bi1.6B0.5Ox, VW0.8Bi1.6Ti0.5Ox, VW0.8Bi1.6Sn0.5Ox, VW0.8Bi1.6Si1Ox, VW0.8Bi1.6Zr2Ox, VW0.8Bi1.6Ge0.5Ox, VW0.8Bi1.6Al1Ox, VW0.8Bi1.6Nb0.5Ox, VW0.8Bi1.6Nb1.5Ox, VW0.8Bi1.6Nb0.5Ga0.2Ox, VW0.8Bi1.6Al1In0.5Ox, VW0.8Bi1.6Al1Ga0.1Ox, VW0.8Bi1.6Al1Na0.05Ox, VW0.8Bi1.6Al1Nb0.5Ox or VW0.8Bi1.6Al1Ta1Ox.
29. The process of claim 7 wherein the molar ratio of bismuth:vanadium:molybdenum in the solution it at least 3:1:1.
30. A process for ammoxidation of alkanes and olefins comprising:
contacting a mixture of an alkane or olefin, ammonia and molecular oxygen in the gas phase with a catalyst composition of the formula:
VWaBibMcOx
wherein M is one or more elements selected from sodium, cesium, magnesium, calcium, barium, boron, yttrium, indium, aluminum, gallium, tin, titanium, silicon, zirconium, germanium, niobium and tantalum, a is 0.2 to 10, b is 0.5 to 5, c is 0 to 10 and x is determined by the valence requirements of the elements present and
wherein antimony and molybdenum are not present.
31. The process of claim 30 herein the catalyst is in a fixed bed, fluidized bed or a moving bed.
32. The process of claim 30 wherein the mole ratio of alkane to ammonia is in the range from 0.5 to 10.
33. The process of claim 30 wherein the mole ratio of alkane to ammonia is in the range from 1 to 2.5.
34. The process of claim 30 wherein the mole ratio of alkane to oxygen is in the range from 0.1 to 10.
35. The process of claim 34 wherein the mole ratio of alkane to oxygen is in the range from 0.5 to 2.
36. The process of claim 30 additionally comprising a diluent in the gas phase selected from the group consisting of nitrogen, helium, argon, carbon dioxide and water.
37. The process of claim 36 wherein the mole ratio of alkane to diluent is in the range from 0 to 20.
38. The process of claim 37 wherein the mole ratio of alkane to diluent is in the range from 0 to 10.
39. The process of claim 30 wherein the alkane has from two to eight carbon atoms.
40. The process of claim 39 wherein the alkane is propane or isobutane.
41. The process of claim 30 wherein contacting the mixture of the alkane or olefin, ammonia and molecular oxygen in the gas phase with the catalyst occurs at a temperature in the range from 350 to 550\xb0 C.
42. The process of claim 41 wherein the temperature is in the range from 425 to 500\xb0 C.
43. The process of claim 30 wherein contacting the mixture of the alkane or olefin, ammonia and molecular oxygen in the gas phase with the catalyst occurs at a pressure in the range from 1 to 40 psig.
44. The process of claim 43 wherein the pressure is in the range from 1 to 20 psig.
45. The process of claim 44 wherein the pressure is atmospheric.
46. The process of claim 30 wherein contacting the mixture of the alkane or olefin, ammonia and molecular oxygen in the gas phase with the catalyst is at a time in the range from 0.01 to 10 seconds.
47. The process of claim 46 wherein the contact time is from 0.05 to 8 seconds.
48. The process of claim 47 wherein the contact time is from 0.1 to 5 seconds.
49. The process of claim 30 wherein M is one element selected from the group consisting of sodium, magnesium, gallium, yttrium, boron, titanium, tin, silicon, zirconium, germanium, aluminum and niobium.
50. The process of claim 30 wherein M are two elements, one selected from the group consisting of aluminum and niobium and one selected from the group consisting of gallium, indium, sodium, tantalum, aluminum and niobium, with the two elements being different.
51. The process of claim 30 wherein one or more mixed oxide selected from the group consisting of BiVO4 and Bi2WO6 is present in the catalyst composition.
52. The process of claim 30 wherein the mixed oxide Bi3W1Nb9O30 is present in the catalyst composition.
53. The process of claim 30 wherein the catalyst composition is VW0.2Bi1.6Ox, VW0.5Bi1.6Ox, VW0.8Bi1.6Ox, VW2Bi1.6Ox, VW0.8Bi0.5Ox, VW0.8Bi1Ox, VW0.8Bi2Ox, VW0.8Bi1.6Na0.05Ox, VW0.8Bi1.6Mg0.05Ox, VW0.8Bi1.6Ga0.5Ox, VW0.8Bi1.6Y0.5Ox, VW0.8Bi1.6B0.5Ox, VW0.8Bi1.6Ti0.5Ox, VW0.8Bi1.6Sn0.5Ox, VW0.8Bi1.6Si1Ox, VW0.8Bi1.6Zr2Ox, VW0.8Bi1.6Ge0.5Ox, VW0.8Bi1.6Al1Ox, VW0.8Bi1.6Nb0.5Ox, VW0.8Bi1.6Nb1.5Ox, VW0.8Bi1.6Nb0.5Ga0.2Ox, VW0.8Bi1.6Al1In0.5Ox, VW0.8Bi1.6Al1Ga0.1Ox, VW0.8Bi1.6Al1Na0.05Ox, VW0.8Bi1.6Al1Nb0.5Ox or VW0.8Bi1.6Al1Ta1Ox.