Author: claimsbot

1. A method of promoting hair growth in a subject, the method comprising:
delivering to the subject at least 5 mg of fulvic acid per day.
2. The method according claim 1, wherein the fulvic acid is purified or substantially purified.
3. The method according to claim 2, wherein the fulvic acid is purified or substantially purified using a XAD-8.
4. The method according to claim 2, wherein the fulvic acid is purified or substantially purified from an aquatic source.
5. The method according to claim 2, wherein the fulvic acid is not purified or substantially purified from coal, shilajit, or peat.
6. The method according to claim 1, wherein the fulvic acid is not oxifulvic acid.
7. The method according to claim 1, wherein from 20 to 30 mg of fulvic acid is delivered to the subject per day.
8. The method according to claim 1, wherein 25 mg of fulvic acid is delivered to the subject per day.
9. A composition for human use, the composition comprising at least 700 mgL fulvic acid.
10. The composition of claim 9, wherein the composition is in a form selected from the group consisting of tablets, capsules, granules, sprays, inhalers, suppositories, sprays, patches, balms, drops, cosmetics, supplements, foods, creams, ointments, liquids, drinks, beverages, lotions, milky lotions, facial packs, bathing agents, bath detergents, facial cleansing agents, shaving creams, hair lotions, hair-care compositions, and shampooing agents.
11. The composition of claim 9, wherein the composition further comprises a carrier or an adjuvant.
12. The composition of claim 9, wherein the composition comprises from 700 to 20,000 mgL fulvic acid.
13. The composition of claim 9, wherein the composition comprises from 700 to 1000 mgL fulvic acid.
14. The composition of claim 9, wherein the composition comprises 3000 mgL fulvic acid.
15. The composition of claim 9, wherein the fulvic acid is purified or substantially purified.
16. The composition of claim 9, wherein the fulvic acid is purified or substantially purified using XAD-8.
17. The composition of claim 16, wherein the fulvic acid is purified or substantially purified from an aquatic source.
18. The composition of claim 16, wherein the fulvic acid is not purified or substantially purified from coal, shilajit, or peat.
19. The composition of claim 9, wherein the fulvic acid is not oxifulvic acid.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A processor comprising:
a first set of registers allocated to a first process;
a circuit to selectively store contents of a first subset of the first set of registers to a memory upon making current a second process, wherein the stored contents of the first subset of the first set of registers are modified registers during the first process.
2. The processor of claim 1 wherein the circuit loads a second subset of the first set of registers for the second process, where the second subset of the first set of registers are non-modified registers during the first process.
3. The processor of claim 2 wherein the circuit initiates a miss signal when the second process requests the modified registers of the first process.
4. The processor of claim 3 wherein the circuits loads the modified registers to a register file upon receiving the miss signal.
5. The processor of claim 1 wherein each register in the first set of registers includes a valid bit, a poison bit and a modify bit.
6. The processor of claim 5 wherein the valid bit indicates if the register in a register file is valid.
7. The processor of claim 5 wherein the poison bit indicates if the register is to be reissued.
8. The processor of claim 5 wherein the modify bit indicates if the register has been written to in the first process.
9. A method comprising:
allocating a first set of registers for a first process;
storing content of a first subset of the first set of registers;
switching to a second process;
requesting the content of the first subset of the first set of registers by the second process; and
reading content of the first subset of the first set of registers upon request by the second process.
10. The method of claim 9 wherein said storing includes saving valid, poison and modify bits stored therein.
11. The method of claim 10 wherein said requesting includes determining if valid bit is set for the requested registers.
12. The method of claim 11 wherein said determining includes incurring a miss if valid bit is not set and setting the poison bit.
13. The method of claim 12 wherein said incurring includes sending a signal to an instruction queue to indicate a miss flow for the register.
14. The method of claim 13 wherein said sending includes finding new architectural register for the register incurring a miss.
15. The method of claim 14 wherein said sending includes issuing the new register value to an execution unit.
16. The method of claim 15 wherein said issuing includes writing the new register value to the architectural register and setting the valid bit.
17. The method of claim 16 wherein said setting the valid bit includes reissuing the requested register.
18. A system comprising:
A processor including a first set of registers allocated to a first process, and a circuit to selectively store contents of a first subset of the first set of registers to a memory upon making current a second process, wherein the stored contents of the first subset of the first set of registers are modified registers during the first process;
an interconnect to couple the processor to inputoutput devices; and
an audio inputoutput device coupled to the interconnect and to the processor.
19. The system of claim 18 wherein the circuit loads a second subset of the first set of registers for the second process, where the second subset of the first set of registers are non-modified registers during the first process.
20. The system of claim 19 wherein the circuit initiates a miss signal when the second process requests the modified registers of the first process.
21. The system of claim 20 wherein the circuits loads the modified registers to a register file upon receiving the miss signal.
22. The system of claim 21 wherein each register in the first set of registers includes a valid bit, a poison bit and a modify bit.
23. The system of claim 22 wherein the interconnect is a point to point interconnect.

1. In a loader including a frame supported on front and rear axles carrying front and rear sets of wheels, a hydraulically operated extension arm mounted to the frame for swinging vertically between lowered and raised positions, an extensible and retractable hydraulic cylinder coupled between said frame and said extension arm for selectively moving said arm between said lowered and raised positions, a first supply line coupled to a piston rod side of said hydraulic cylinder, a second supply line coupled to a piston side of said hydraulic cylinder, a pressurized hydraulic fluid source, a hydraulic fluid tank, at least one mechanically switchable control device coupled, on the one hand, to said first and second supply lines and coupled, on the other hand, to said fluid source and fluid tank and being selectively operable for controlling the flow of hydraulic fluid to and from said hydraulic cylinder, a load sensor located on said loader for monitoring a load condition on the loader and operable for creating an electrical load signal representing said load condition, and an electronic control unit coupled to said load sensor for receiving said electrical signal and comparing it with a critical load stored in memory in said electronic control unit and for generating a control signal representing a difference between said load signal and said critical load, the improvement comprising: a load holding valve including a pressure limiting valve located in said second supply line and normally preventing flow toward said control device from said hydraulic cylinder: first and second control pressure lines respectively connecting the rod and piston sides of said hydraulic cylinder to said pressure limiting valve such that the respective pressures therein act in a direction tending to open said pressure limiting valve; one of a connecting line or a discharge line having a first end coupled to said first supply line, with said connecting line having a second end coupled to said second supply line, and with said discharge line having a second end coupled directly to said tank; an electrically operable variable restriction device being coupled in said one of said connecting line or discharge line for establishing a variable restricted flow path away from said first supply line and including a proportional electrical controller connected for receiving said control signal from said electronic control unit and being operable in response to said control signal for gradually reducing a restriction afforded by said restricted flow path when said sensed load increases toward a value equal to said critical load.
2. The loader, as defined in claim 1, wherein said variable restriction device includes at least one electro-hydraulic overpressure valve connected so as to be subject to the pressure in said first supply line for urging said overpressure valve to an open position, with said overpressure valve further being connected for receiving said control signal from said electronic control unit for establishing a bias resisting opening, with said overpressure valve being located in said one of said connecting line or said discharge line, whereby said overpressure valve permits flow from said second supply line through said one of said connecting line or discharge line when in said open position.
3. The loader, as defined in claim 1, wherein said variable restriction device is located in said connecting line; and a check valve being located in said connecting line between said second supply line and said variable restriction device and blocking flow toward said first supply line.
4. The loader, as defined in claim 1, wherein said variable restriction device includes at least one electro-hydraulic overpressure valve connected for receiving said control signal from said electronic control unit and being located in said a discharge line.
5. The loader, as defined in claim 1, wherein said loader is configured as a telescopic loader.
6. The loader, as defined in claim 1, wherein said loader is configured as a front loader.
7. The loader, as defined in claim 1, wherein said load sensor is mounted on one of said front and rear axles of said loader.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An oxide semiconductor thin film comprising:
an oxide including indium and tungsten,
the oxide semiconductor thin film having a tungsten content in a WIn atomic ratio of 0.005 to 0.12; being crystalline; having only an In2O3 phase of bixbyite structure; and having a carrier density of 1 \xd71018 cm\u22123 or less and a carrier mobility of higher than 1 cm2Vsec.
2. An oxide semiconductor thin film comprising:
an oxide including indium, zinc and tungsten, the oxide semiconductor thin film having a tungsten content in a WIn atomic ratio of 0.005 to 0.12 and a zinc content in a ZnIn atomic ratio of 0.05 or less; being crystalline; having only an In2O3 phase of bixbyite structure; and having a carrier density of 1\xd71018 cm\u22123 or less and a carrier mobility of higher than 1 cm2Vsec.
3. The oxide semiconductor thin film according to claim 1, wherein the tungsten content in the WIn atomic ratio is 0.01 to 0.05.
4. The oxide semiconductor thin film according to claim 2, wherein the tungsten content in the WIn atomic ratio is 0.01 to 0.05, and the zinc content in the ZnIn atomic ratio is 0.003 to 0.03.
5. The oxide semiconductor thin film according to claim 1, having a film thickness of 15 to 200 nm.
6. The oxide semiconductor thin film according to claim 1, having a film thickness of 40 to 100 nm.
7. The oxide semiconductor thin film according to claim 1, having an average crystal grain size of 10 nm or greater.
8. The oxide semiconductor thin film according to claim 1, wherein the carrier mobility is 3 cm2Vsec or greater.
9. The oxide semiconductor thin film according to claim 1, wherein the carrier mobility is 10 cm2Vsec or greater.
10. The oxide semiconductor thin film according to claim 1, wherein the carrier density is within the range 1\xd71016 to 1\xd71017 cm\u22123.
11. A thin film transistor comprising:
a source electrode,
a drain electrode,
a gate electrode,
a channel layer; and
a gate insulating layer,
wherein the channel layer comprises an oxide semiconductor thin film having an oxide including indium and tungsten,
the oxide semiconductor thin film having a tungsten content in a WIn atomic ratio of 0.005to 0.12; being crystalline; having only an In2O3 phase of bixbyite structure; and having a carrier density of 1\xd71018 cm\u22123 or less and a carrier mobility of higher than 1 cm2 Vsec.