1460731669-1672b317-7c6e-4212-ae2c-aa741131781c

1. A laminated thin film, comprising:
a substrate; and
at least two types of materials laminated on the substrate,
the laminated thin film has a transmittance of 95% or higher in a working wavelength band with respect to both P-polarized light and S-polarized light, and
the following expression (1) is satisfied with respect to a light ray of a specific wavelength \u03bb0 contained in the working wavelength band, and the following expressions (2) and (3) are always satisfied in a range of 0<\u03b8\u226615 degrees,
0.25
<
(
n
H

\xb7

d
H
+
n
L

\xb7

d
L
)
\u03bb
0
<
0.5
(
1
)
0.95
\u2264
\u0394
\u2061

(
\u03b8
)
A
\u2062
\u2062

sin
2

\u2062
\u03b8
\u2264
1.05
(
2
)
where
,

A
=
\u0394
\u2061

(

10
\u2062
\xb0

)
sin
2

\u2061

(

10
\u2062
\xb0

)
,
\uf603

\u0394
\u2061

(

10
\u2062
\xb0

)
\uf604

\u2265

2.0
\u2062

(
degrees
)
(
3
)
where an average film thickness of a material having relatively high refractive index nH is represented by dH, an average film thickness of a material having relatively low refractive index nL is represented by dL of the materials forming the laminated thin film, and a phase difference received by a light ray entering at an angle \u03b8 with respect to a normal of a surface of the laminated thin film is represented by \u0394(\u03b8).
2. A laminated thin film according to claim 1, wherein a film thickness ratio m expressed by the following equation is 0.43 or larger,
m=dH(dH+dL).
3. A laminated thin film according to claim 1, wherein the laminated thin film is formed on a flat surface.
4. A laminated thin film according to claim 1, wherein the laminated thin film is made of inorganic materials.
5. A phase plate comprising:
a substrate;
a one-dimensional periodical structure with a period that is a minimum wavelength or smaller in a working wavelength band in an in-plane direction of the substrate; and
a laminated thin film including at least two or more types of materials laminated on one another,
the following expression (1) is satisfied with respect to a light ray of a specific wavelength \u03bb0 contained in the working wavelength band, and the following expressions (5) and (6) are always satisfied in a range of 0<\u03b8\u226615 degrees;
0.25
<
(
n
H

\xb7

d
H
+
n
L

\xb7

d
L
)
\u03bb
0
<
0.5
(
1
)
0.95
\u2264
B

\u0394
\u2061

(
\u03b8
)
A
\u2062
\u2062

sin
2

\u2062
\u03b8
\u2264

1.05
\u2062
\u2062
where
(
5
)
A
=
B

\u0394
\u2061

(

10
\u2062
\xb0

)
sin
2

\u2061

(

10
\u2062
\xb0

)
,
\uf603

B

\u0394
\u2061

(

10
\u2062
\xb0

)
\uf604

\u2265

2.0
\u2062

(
degrees
)
,

B
=

\u0394
\u2061

(

0
\u2062
\xb0

)
(
6
)
where an average film thickness of a material having relatively high refractive index nH is represented by dH, an average film thickness of a material having relatively low refractive index nL, is represented by dL, of the materials forming the laminated thin film, and a phase difference received by a light ray entering at an angle \u03b8 with respect to a normal of a surface of the laminated thin film is represented by \u0394(\u03b8).
6. A phase plate according to claim 5, wherein the phase plate acts as a \xbc wavelength plate.
7. A phase plate according to claim 5, wherein a film thickness ratio m expressed by the following equation is 0.43 or larger,
m=dH(dH+dL).
8. A phase plate according to claim 5, wherein the phase plate is formed on a flat surface.
9. A phase plate according to claim 5, wherein the phase plate is made of inorganic materials.
10. A reflective liquid crystal display apparatus, comprising:
a light source;
a polarization beam splitter which transmits P-polarized light and reflects S-polarized light in illumination light emitted from the light source;
a reflection type liquid crystal display device which converts the illumination light into image light and reflects the image light;
a \xbc wavelength plate disposed between the polarization beam splitter and the reflection type liquid crystal display device;
the laminated thin film according to claim 1 disposed between the \xbc wavelength plate and the reflection type liquid crystal display device; and
a projection optical system which projects the image light, wherein:
the reflection type liquid crystal display device has positive refractive index anisotropy;
when a three-dimensional space is expressed by a c-axis representing a normal direction of a surface of the reflection type liquid crystal display device, a b-axis in a direction that is perpendicular to both a normal direction of a polarization separation surface of the polarization beam splitter and the c-axis, and an a-axis in a direction that is perpendicular to both the c-axis and the b-axis,
an optical axis direction of the reflection type liquid crystal display device in a black display state has a pretilt angle with respect to the c-axis;
both of normal directions of surfaces of the \xbc wavelength plate and the laminated thin film are parallel to the c-axis; and
an optical axis of the \xbc wavelength plate forms an angle of one of 0.5 to 5 degrees and \u22125 to \u22120.5 degrees with one of the a-axis and the b-axis.
11. A reflective liquid crystal display apparatus according to claim 10, wherein the polarization separation surface of the polarization beam splitter includes a form biregringence layer formed of a one-dimensional periodical structure with a period that is a minimum wavelength or smaller in a working wavelength band in a direction parallel to the polarization separation surface.
12. A reflective liquid crystal display apparatus, comprising:
a light source;
a polarization beam splitter which transmits P-polarized light and reflects S-polarized light in illumination light emitted from the light source;
a reflection type liquid crystal display device which converts the illumination light into image light and reflects the image light;
the phase plate according to claim 5 disposed between the polarization beam splitter and the reflection type liquid crystal display device; and
a projection optical system which projects the image light, wherein:
the reflection type liquid crystal display device has positive refractive index anisotropy;
when a three-dimensional space is expressed by a c-axis representing a normal direction of a surface of the reflection type liquid crystal display device, a b-axis in a direction that is perpendicular to both a normal direction of a polarization separation surface of the polarization beam splitter and the c-axis, and an a-axis in a direction that is perpendicular to both the c-axis and the b-axis;
an optical axis direction of the reflection type liquid crystal display device in a black display state has a pretilt angle with respect to the c-axis;
a normal direction of a surface of the phase plate is parallel to the c-axis; and
a periodic direction of the one-dimensional periodical structure of the phase plate forms an angle of one of 0.5 to 5 degrees and \u22125 to \u22120.5 degrees with one of the a-axis and the b-axis.
13. A reflective liquid crystal display apparatus according to claim 12, wherein the polarization separation surface of the polarization beam splitter includes a form biregringence layer formed of a one-dimensional periodical structure with a period that is a minimum wavelength or smaller in a working wavelength band in a direction parallel to the polarization separation surface.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A lens assembly comprising:
a first lens comprising a first optically active part, a first optically inactive part surrounding the first optically active part, and a first annular protrusion formed on the first optically inactive part, the first annular protrusion defining an accommodating room;
a second lens comprising a second optically active part, a second optically inactive part surrounding the second optically active part, a second annular protrusion formed on the second optically inactive part, and an annular light blocking layer formed on a surface of the second annular protrusion facing the first lens, the second annular protrusion being engaged in the first annular protrusion in such a manner that the second annular protrusion and the light blocking layer is received in the accommodating room to fix the first lens to the second lens.
2. The lens assembly of claim 1, wherein the second lens further comprises another annular light blocking layer formed on a surface of the second optically inactive part facing the first lens.
3. The lens assembly of claim 1, wherein a material of the light blocking layer is black ink.
4. The lens assembly of claim 1, wherein the black ink contains carbon black.
5. The lens assembly of claim 1, wherein a thickness of the light blocking layer is in approximate range from 1 micron to 100 microns.
6. The lens assembly of claim 1, wherein the first annular protrusion is formed on a surface of the first optically inactive part facing the second lens.
7. The lens assembly of claim 1, wherein the second annular protrusion is formed on a surface of the second optically inactive part facing the first lens.
8. The lens assembly of claim 1, wherein an inner surface of the first annular protrusion is in contact with an outer surface of the second annular protrusion.
9. The lens assembly of claim 1, wherein a surface of the first annular protrusion facing the second lens is in contact with a surface of the second optically inactive part facing the first lens.
10. The lens assembly of claim 1, wherein a surface of the light blocking layer facing the first lens is in contact with a surface of the first optically inactive part facing the second lens.
11. The lens assembly of claim 1, wherein the accommodating room is substantially cylindrical.
12. The lens assembly of claim 1, wherein the light blocking layer blocks light from the second optically inactive part and the second annular protrusion.
13. The lens assembly of claim 1, wherein the light blocking layer is formed by inkjet printing.
14. The lens assembly of claim 8, wherein the inner surface of the first annular protrusion is directly contact the outer surface of the second annular protrusion.
15. The lens assembly of claim 9, wherein the surface of the first annular protrusion facing the second lens is directly contact the surface of the second optically inactive part facing the first lens.
16. The lens assembly of claim 10, wherein the surface of the light blocking layer facing the first lens is directly contact with the surface of the first optically inactive part facing the second lens.

1460731661-d207d291-e9a0-470c-aa2f-3cb04a2e8e1e

1. A system for error correction of a pipeline analog to digital converter (\u201cADC\u201d), wherein the pipeline ADC converts a voltage signal to a digital version of the voltage signal, comprising:
a coarse ADC wherein an input terminal of the coarse ADC receives the voltage signal and a reference signal and provides a digital version of the voltage signal value relative to the reference signal to a digital to analog converter (\u201cDAC\u201d)
input terminal;
a first adder for combining the voltage signal and an output signal from the DAC, wherein the first adder result is provided to a residue amplifier;
a backend ADC, wherein the backend ADC provides a digital version of an output voltage signal received from the residue amplifier;
a second adder for summing digital values received from the coarse ADC, a digital to analog converter noise cancellation (\u201cDNC\u201d) circuit, and a harmonic distortion correction (\u201cHDC\u201d) circuit, thereby providing a pipelined ADC output;
a circuit for estimating distortion parameters from the residue amplifier and digital to analog converter comprising:
the HDC, wherein the HDC, responsive to the pipelined ADC output, corrects distortion components due to the residue amplifier present in the digital signal from the backend ADC; and
the DNC circuit, wherein the DNC circuit, responsive to the pipelined ADC output, corrects the distortion components due to the DAC present in the digital signal from the backend ADC; and
a circuit for modifying the reference signal to the coarse analog to digital converter.
2. The system of claim 1, wherein the circuit for modifying the reference signal comprises:
a voltage divider for dividing a reference source voltage;
a dynamic element matching (\u201cDEM\u201d) circuit receiving the divided voltage signals, each divided voltage signal connected to a corresponding switch, wherein each switch is controlled by the DEM circuit and further wherein all output terminals from the switches are connected in parallel to a first side of a high side capacitor; and
a sequences adder block receiving HDC signals, each HDC signal connected to a corresponding switch, wherein each switch is controlled by the HDC circuit and further wherein all output terminals from the switches are connected in parallel to a second side of the high side capacitor.
3. The system of claim 1, wherein the ADC and the DAC are n bit devices.
4. A pipeline analog-to-digital (ADC) converter, comprising:
a back end analog-to-digital (ADC) converter configured to receive a residue output; and
at least one stage circuit, the stage circuit comprising;
a coarse ADC coupled to receive an input signal and provide a coarse digital output to a digital-to-analog (DAC) converter;
a residue amplifier configured to receive the input signal and an output of the DAC and provide a residue output to the backend ADC;
a circuit for estimating distortion parameters from the residue amplifier and DAC, comprising:
an amplifier configured to receive an output of the backend DAC;
a harmonic distortion correction circuit (HDC) coupled to the amplifier and configured to correct distortion components due to the residue amplifier present in the digital signal from the backend ADC, the HDC circuit providing an output to an adder, the adder receiving the coarse digital output; and
a DAC noise cancellation circuit (DNC) configured to provide an output to the adder, wherein the DNC circuit is configured to correct the distortion components due to the DAC present in the digital signal from the backend ADC;
wherein the output of the adder is an ADC digital output and wherein the ADC digital output forms an input to the HDC and the DNC; and
a circuit for modifying a reference signal to the coarse ADC.
5. The pipeline analog-to-digital (ADC) converter of claim 4, wherein the circuit for modifying the reference signal comprises:
a voltage divider for dividing a reference source voltage into a plurality of divided voltage signals;
a dynamic element matching (\u201cDEM\u201d) circuit receiving the divided voltage signals, each divided voltage signal connected to a corresponding switch, wherein each switch is controlled by the DEM circuit and further wherein all output terminals from the switches are connected in parallel to a first side of a high side capacitor; and
a sequences adder block receiving HDC signals, each HDC signal connected to a corresponding switch, wherein each switch is controlled by the HDC circuit and further wherein all output terminals from the switches are connected in parallel to a second side of the high side capacitor.
6. The pipeline analog-to-digital (ADC) converter of claim 5, wherein the ADC and the DAC are n bit devices.
7. A pipeline analog-to-digital converter (ADC) for converting an input signal, comprising:
a coarse analog-to-digital converter (ADC) configured to provide a coarse digital output to a digital-to-analog converter (DAC);
a residue amplifier configured to receive an output of the DAC and the input signal and generate a residue for a next pipeline stage;
a circuit for estimating distortion parameters from a residue amplifier and the DAC, the circuit including:
a harmonic distortion correction (HDC) circuit configured to provide an output to an adder, the adder receiving as an input an output of the coarse ADC; and
a feedback loop including a DAC noise cancellation (DNC) circuit configured to provide an output to the adder;
wherein an output of the adder is an ADC digital output and is an input to the DNC circuit; and
a circuit for modifying a reference signal to the coarse ADC.
8. The pipeline analog-to-digital converter (ADC) of claim 7, wherein the HDC circuit is configured to receive one or more random sequences for estimating nonlinearities.
9. The pipeline analog-to-digital converter (ADC) of claim 8, wherein the HDC circuit is configured to provide an output to the circuit for modifying the reference signal to the coarse ADC.
10. The pipeline analog-to-digital converter (ADC) of claim 8, wherein the circuit for modifying the reference signal comprises:
a voltage divider for dividing a reference source voltage;
a dynamic element matching (\u201cDEM\u201d) circuit receiving the divided voltage signals, each divided voltage signal connected to a corresponding switch, wherein each switch is controlled by the DEM circuit and further wherein all output terminals from the switches are connected in parallel to a first side of a high side capacitor; and
a sequences adder block receiving HDC signals, each HDC signal connected to a corresponding switch, wherein each switch is controlled by the HDC circuit and further wherein all output terminals from the switches are connected in parallel to a second side of the high side capacitor.
11. A method for operating a pipeline analog-to-digital converter (ADC) for converting an input signal, comprising:
providing a coarse digital output from a coarse analog-to-digital converter (ADC) to a digital-to-analog converter (DAC)
receiving an output of the DAC and the input signal at a residue amplifier and generating a residue for a next pipeline stage;
estimating distortion parameters from the residue amplifier output and the DAC output, the estimating including:
performing a harmonic distortion correction as an output to an adder, the adder receiving as another input an output of the coarse ADC; and
implementing a feedback loop including a DAC noise cancellation (DNC) providing an output to the adder;
wherein an output of the adder is an ADC digital output and is an input to the DNC circuit.
12. A method for operating a pipeline analog-to-digital converter (ADC) for converting an input signal in accordance with claim 11, further including modifying a reference signal to the coarse ADC.
13. A method for operating a pipeline analog-to-digital converter (ADC) for converting an input signal in accordance with claim 11, wherein the HDC circuit receives one or more random sequences for estimating nonlinearities.
14. A method for operating a pipeline analog-to-digital converter (ADC) for converting an input signal in accordance with claim 13, wherein the HDC circuit provides an output to the circuit for modifying the reference signal to the coarse ADC.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

The embodiments of an invention in which an exclusive property or right is claimed are defined as follows:

1. A method of forming a composite diaphragm for a pressure device, the method comprising the steps of:
providing a substrate layer having a first conductivity type, the substrate layer having a first surface;
depositing implants in the first surface of the substrate layer;
growing an epitaxial layer on the first surface of the substrate layer, the implants forming diffusions in the epitaxial layer;
forming an oxide pattern on the epitaxial layer;
depositing a top layer over the epitaxial layer and oxide pattern; and
etching the substrate layer and diffusions of the epitaxial layer to form the composite diaphragm.
2. The method of claim 1, wherein the implants are positive implants and the diffusions are positive diffusions.
3. The method of claim 1, in which the substrate layer comprises a p-type single crystal silicon material.
4. The method of claim 1, in which the positive implants are deposited using an ion implanter.
5. The method of claim 1, in which the top layer comprises silicon nitride.
6. The method of claim 5, in which the substrate layer comprises a p-type single crystal silicon material.
7. The method of claim 1, in which the etching step comprises a stop-etch process.
8. The method of claim 2, in which portions of the epitaxial layer not formed with the positive diffusions form a pattern.
9. The method of claim 8, in which the pattern comprises a plurality of bosses.
10. The method of claim 9, in which the pattern further comprises a plurality of battens extending between adjacent bosses.
11. The method of claim 10, in which the substrate layer comprises a p-type single crystal silicon material.
12. The method of claim 10, in which the top layer comprises silicon nitride.
13. The method of claim 12, in which the substrate layer comprises a p-type single crystal silicon material.
14. A composite diaphragm for use in a pressure device, the diaphragm comprising:
a first layer of silicon nitride; and
a second layer attached to the silicon nitride layer and comprising a pressure sensor pattern of silicon material.
15. The diaphragm of claim 14, further comprising a third layer intermediate the first and second layers, wherein the third layer comprises an epitaxial layer of single crystal silicon.
16. The diaphragm of claim 15, further comprising a patterned oxide layer deposited between the second and third layers.
17. The diaphragm of claim 14, in which the second layer comprises a p-type single crystal silicon.
18. The diaphragm of claim 14, in which the pattern comprises a plurality of bosses.
19. The diaphragm of claim 18, in which the pattern further comprises a plurality of battens extending between adjacent bosses.
20. The diaphragm of claim 19, in which each batten includes a pair of intersecting leg portions and a pair of connecting portions adapted to engage adjacent bosses.
21. The diaphragm of claim 14, wherein the second layer comprises a pressure sensor pattern of single crystal silicon.
22. A silicon based diaphragm for a piezoresistor capable of producing a usable, substantially linear output signal at less than 5 inches of H2O of input pressure.
23. The silicon based diaphragm of claim 22 being capable of producing the usable, substantially linear output signal substantially through a range of 0 to 5 inches of H2O of input pressure.
24. The silicon based diaphragm of claim 22 comprising a silicon nitride layer abutting a single crystal silicon layer.
25. The silicon based diaphragm of claim 22 being capable of producing the usable, substantially linear output signal substantially through a range of 0 to 5 inches of H2O of input pressure.
26. A method of forming a composite diaphragm for a pressure device, the method comprising the steps of:
providing a substrate layer having a first conductivity type, the substrate layer having a first surface;
depositing positive implants in the first surface of the substrate layer;
growing an epitaxial layer on the first surface of the substrate layer, the positive implants forming positive diffusions in the epitaxial layer;
forming an oxide pattern on the epitaxial layer;
depositing a silicon nitride layer over the epitaxial layer and oxide pattern; and
etching the substrate layer and diffusions of the epitaxial layer to form the composite diaphragm.