1460721920-8a10e11b-e7ee-40f8-946b-af02fdb7b6d9

1. A semiconductor device, comprising:
a semiconductor substrate;
a lower structure formed on the semiconductor substrate;
a first insulation film formed on the lower structure;
a first metal layer coupled to the lower structure through a first metal contact in the first insulation film;
a second metal layer formed on the first metal layer; and
first inside dummy metal layers formed inside a pad region on the second metal layer.
2. The semiconductor device of claim 1, wherein the first inside dummy metal layers are formed in the shape of a mesh or a plurality of concentric squares.
3. The semiconductor device of claim 1, further comprising a plurality of inside dummy gates formed inside the pad region in the shape of a plurality of concentric squares or a plurality of islands.
4. The semiconductor device of claim 3, wherein the inside dummy gates do not overlap with the first inside dummy metal layers.
5. The semiconductor device of claim 3, wherein the inside dummy gates are separated by 0.5 \u03bcm to 3.0 \u03bcm when overlapping with the first inside dummy metal layers.
6. The semiconductor device of claim 1, further comprising an outside dummy gate for surrounding the pad region at a predetermined interval from the pad region outside the pad region.
7. The semiconductor device of claim 6, further comprising a first dummy metal contact formed in a line shape on the outside dummy gate outside the pad region.
8. The semiconductor device of claim 1, wherein a width of the first inside dummy metal layers ranges from 0.2 \u03bcm to 1.0 \u03bcm.
9. The semiconductor device of claim 1, wherein an interval between the first inside dummy metal layers ranges from 2.0 \u03bcm to 5.0 \u03bcm.
10. The semiconductor device of claim 1, wherein the edges of the first inside dummy metal layers are aligned in the vertical direction to the edges of the pad region.
11. The semiconductor device of claim 1, wherein the first inside dummy metal layers are inwardly formed at an interval of 0.5 \u03bcm to 2.0 \u03bcm from the edges of the second metal layer.
12. The semiconductor device of claim 7, further comprising a first outside dummy metal layer for surrounding the pad region in a line shape outside the pad region, and a second dummy metal contact formed on the first outside dummy metal layer.
13. The semiconductor device of claim 12, wherein a width of the first outside dummy metal layer ranges from 0.5 \u03bcm to 1.0 \u03bcm.
14. The semiconductor device of claim 12, wherein a width of the second dummy metal contact ranges from 0.20 \u03bcm to 0.50 \u03bcm.
15. The semiconductor device of claim 12, further comprising a second dummy metal layer formed on the second dummy metal contact, wherein an interval between the second dummy metal layer and the second metal layer ranges from 3.0 \u03bcm to 10.0 \u03bcm.
16. The semiconductor device of claim 15, wherein a width of the second dummy metal layer ranges from 0.5 \u03bcm to 1.0 \u03bcm.
17. The semiconductor device of claim 12, wherein a horizontal interval between the first dummy metal contact and the second dummy metal contact ranges from 1.0 \u03bcm to 5.0 \u03bcm.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A backlight module, comprising:
a housing having at least one first locating portion;
a flat light source disposed on the housing;
a diffuser positioned over the flat light source; and
a spacer disposed between the housing and the diffuser to maintain a distance therebetween and comprising a supporting portion to support the diffuser and a base connected to the supporting portion, extending through the flat light source and fixed on the housing;
wherein the supporting portion has a reflective layer thereon to reflect the light from the flat light source and a first supporting element contacting the diffuser and extending in a first direction parallel to the diffuser.
2. The backlight module as claimed in claim 1, wherein the base comprises a latching element engaging the housing and a connecting portion connecting the supporting portion and the latching element.
3. The backlight module as claimed in claim 1, wherein the first supporting element further has a contacting portion contacting the diffuser and at least one lateral surface inclined toward the diffuser at a predetermined angle; and the reflecting layer is formed on the lateral surface.
4. The backlight module as claimed in claim 3, wherein the first supporting element has two lateral surfaces conjugated at an angle of 20\xb0 to 60\xb0.
5. The backlight module as claimed in claim 3, wherein the supporting portion further has a second supporting element having the same structure as the first supporting element but extending in a second direction parallel to the diffuser and different from the first direction.
6. The backlight module as claimed in claim 2, wherein the first locating portion comprises a locating hole receiving the connecting portion.
7. The backlight module as claimed in claim 2, wherein the first locating portion comprises a locating groove receiving the connecting portion.
8. The backlight module as claimed in claim 2, wherein the flat light source is a flat light.
9. The backlight module as claimed in claim 8, wherein the flat light source has at least one second locating portion corresponding to the first locating portion.
10. The backlight module as claimed in claim 9, wherein the supporting portion has a first supporting element contacting the diffuser and extending in a first direction parallel to the diffuser.
11. The backlight module as claimed in claim 10, wherein the first supporting element further has a contacting portion contacting the diffuser and at least one lateral surface inclined toward the diffuser at a predetermined angle; and the reflecting layer is formed on the lateral surface.
12. The backlight module as claimed in claim 11, wherein the first supporting element has two lateral surfaces conjugated at an angle of 20\xb0 to 60\xb0.
13. The backlight module as claimed in claim 11, wherein the supporting portion further has a second supporting element having the same structure as the first supporting element but extending in a second direction parallel to the diffuser and different from the first direction.
14. The backlight module as claimed in claim 9 or 10, wherein the first locating portion comprises a first locating hole receiving the connecting portion.
15. The backlight module as claimed in claim 14, wherein the second locating portion comprises a second locating hole aligned with the first locating hole receiving the connecting portion.
16. The backlight module as claimed in claim 10, wherein the first locating portion comprises a first locating groove receiving the connecting portion.
17. The backlight module as claimed in claim 16, wherein the second locating portion comprises a second locating groove aligned with the first locating groove receiving the connecting portion.

1460721912-9abc117e-f795-4e71-b1cf-883ed5bdb446

1. A word line block select circuit comprising:
a dummy repair logic unit including a dummy logic circuit configured to output a first control signal and having a first delay path for a repair address decision; and
a word line activation unit for activating a word line in response to the first control signal and an active command signal.
2. The circuit of claim 1, wherein the first control signal is activated when an output signal of the dummy logic circuit is activated.
3. The circuit of claim 1, wherein said first delay path of the dummy repair logic unit is a same as a second delay path of a repair address decision circuit for the repair address decision.
4. The circuit of claim 1, wherein the word line activation unit includes:
a repair address decision unit for performing the repair address decision to decide whether an inputted address is a repair address;
a word line block select unit for outputting a word line block select signal in response to the active command signal, the first control signal and an output signal of the repair address decision unit;
a normal word line decoder for outputting a decoding signal to drive a normal word line in response to an output signal of the word line block select unit; and
a redundancy word line decoder for outputting a decoding signal to drive a redundancy word line in response to the output signal of the repair address decision unit.
5. The circuit of claim 4, wherein the word line block select unit includes:
a control unit driven in response to the active command signal and the first control signal; and
an operation unit for performing a logic operation in response to an output signal of the control unit and the output signal of the repair address decision unit.
6. The circuit of claim 5, wherein the control unit includes:
a first driving unit driven in response to the active command signal; and
a second driving unit driven in response to the first control signal.
7. The circuit of claim 6, wherein the first driving unit includes:
a pull-up unit for pull-up driving an output node of the first driving unit in response to the active command signal; and
a pull-down unit for pull-down driving the output node of the first driving unit in response to the active command signal.
8. The circuit of claim 6, wherein the second driving unit includes a pull-down unit for pull-down driving an output node of the first driving unit in response to the first control signal.
9. The circuit of claim 5, wherein the operation unit includes a logic element for performing a NAND operation in response to the output signal of the control unit and the output signal of the repair address decision unit.
10. The circuit of claim 5, further comprising a latch unit for latching the output signal of the control unit.
11. The circuit of claim 5, further comprising a buffer unit for buffering an output signal of the operation unit.
12. A word line block select circuit comprising:
a dummy repair logic unit including a dummy logic circuit to output a first control signal and having a first delay path for a repair address decision;
a repair address decision unit for performing the repair address decision to decide whether an inputted address is a repair address;
a word line block select unit for outputting a word line block select signal in response to an active command signal, the first control signal and an output signal of the repair address decision unit;
a normal word line decoder for outputting a decoding signal to drive a normal word line in response to an output signal of the word line block select unit; and
a redundancy word line decoder for outputting a decoding signal to drive a redundancy word line in response to the output signal of the repair address decision unit.
13. The circuit of claim 12, wherein the first control signal is activated when the output signal of the repair address decision unit is activated.
14. The circuit of claim 12, wherein the first delay path of the dummy repair logic unit is a same as a second delay path of the repair address decision unit.
15. The circuit of claim 12, wherein the word line block select unit includes:
a control unit driven in response to the active command signal and the first control signal; and
an operation unit for performing a logic operation in response to an output signal of the control unit and the output signal of the repair address decision unit.
16. The circuit of claim 15, wherein the control unit includes:
a first driving unit driven in response to the active command signal; and
a second driving unit driven in response to the first control signal.
17. The circuit of claim 16, wherein the first driving unit includes:
a pull-up unit for pull-up driving an output node of the first driving unit in response to the active command signal; and
a pull-down unit for pull-down driving the output node of the first driving unit in response to the active command signal.
18. The circuit of claim 16, wherein the second driving unit includes a pull-down unit for pull-down driving an output node of the first driving unit in response to the first control signal.
19. The circuit of claim 15, wherein the operation unit includes a logic element for performing a NAND operation in response to the output signal of the control unit and the output signal of the repair address decision unit.
20. The circuit of claim 15, further comprising a latch unit for latching the output signal of the control unit.
21. The circuit of claim 15, further comprising a buffer unit for buffering an output signal of the operation unit.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for machining a workpiece, the method comprising:
guiding a conductor, which carries a time-variable current along its longitudinal axis, by an upper guide and a lower guide, a magnetic field being produced by an external source and applied to the conductor between the guides; and
locating the upper guide at a first distance above the magnetic field and the lower guide at a second distance below the magnetic field;
wherein the magnetic field causes a lateral movement of the conductor between the guides and a corresponding lateral movement of an end of the conductor; and
wherein the magnetic field is rotated.
2. The method of claim 1, wherein a selection of at least one of the first distance and the second distance causes an amplitude of a movement of an end of the conductor to be regulated.
3. The method of claim 1, wherein at least one of the first distance and the second distance is changed.
4. The method of claim 1, wherein an electrical field is present between an end of the conductor and a machining location of the workpiece, and material is removed from the workpiece at the machining location in the presence of a machining fluid.
5. The method of claim 1, wherein a pulsed current is passed through the conductor.
6. The method of claim 1, wherein a direction of the current is changed.
7. The method of claim 1, wherein the rotation of the magnetic field changes a direction of the lateral movement of the conductor between the guides and the corresponding lateral movement of the end of the conductor.
8. The method of claim 7, wherein a plurality of hole shapes are produced in the workpiece via the changing of the direction of the corresponding lateral movement of the end of the conductor in accordance with the rotation of the magnetic field.
9. A device for machining a workpiece comprising:
a guiding arrangement for guiding a conductor, which carries a time-variable current along its longitudinal axis, by an upper guide and a lower guide, a magnetic field being produced by an external source, which includes at least one rotatable magnet., and applied to the conductor between the guides; and
a positioning arrangement for positioning the upper guide at a first distance above the magnetic field and the lower guide at a second distance below the magnetic field;
wherein the magnetic field produced by the external source causes a lateral movement of the conductor between the guides and a corresponding lateral movement of an end of the conductor.
10. The device of claim 9, wherein at least one of the two guides is movable.
11. The device of claim 9, wherein a source produces a time-variable current flowing through the conductor.
12. The device of claim 9, wherein rotation of the magnetic field produced by the external source changes .a direction of the lateral movement of the conductor between the guides and the corresponding lateral movement of the end of the conductor.
13. The device of claim 12, wherein a plurality of hole shapes are produced in the workpiece via the changing of the direction of the corresponding lateral movement of the end of the conductor in accordance with the rotation of the magnetic field produced by the external source.