Author: claimsbot

1. A semiconductor memory device, comprising:
a memory cell array;
a redundant element;
an address specifying circuit configured to select one of a plurality of addresses as a redundancy address in response to a switchover signal;
a decoder circuit configured to select the redundant element in response to an externally applied address that matches the redundancy address selected by the address specifying circuit; and
a test mode setting circuit configured to change the switchover signal in response to an externally applied input, thereby to cause the redundancy address assigned to the redundant element to be switched between different ones of the plurality of addresses.
2. The semiconductor memory device as claimed in claim 1, wherein the address specifying circuit includes:
a first address specifying circuit configured to specify a first address;
a second address specifying circuit configured to specify a second address; and
a select circuit configured to select one of an output of the first address specifying circuit and an output of the second address specifying circuit in response to the switchover signal.
3. The semiconductor memory device as claimed in claim 2, wherein the first address specifying circuit produces as the output thereof a first bit pattern indicative of bitwise matches or mismatches between the first address and an externally applied address, and the second address specifying circuit produces as the output thereof a second bit pattern indicative of bitwise matches or mismatches between the second address and the externally applied address.
4. The semiconductor memory device as claimed in claim 3, further comprising a memory circuit configured to store a defective address in a nonvolatile manner, and wherein the first address specifying circuit is configured to selectively invert bits of the first bit pattern in response to respective bit values of an output of the memory circuit.
5. The semiconductor memory device as claimed in claim 1, wherein the address specifying circuit includes:
an address specify circuit configured to specify a first address;
a register configured to store an address bit pattern that is externally applied; and
a select circuit configured to select one of the first address and a second address responsive to the address bit pattern stored in the register in response to the switchover signal.
6. The semiconductor memory device as claimed in claim 5, wherein the address specify circuit is configured to produce a bit pattern indicative of bitwise matches or mismatches between the first address and an externally applied address in response to selection of the first address by the select circuit, and to produce a bit pattern obtained by selectively inverting respective bits of the bit pattern indicative of bitwise matches or mismatches depending on respective bit values of the address bit pattern in response to selection of the second address by the select circuit.
7. The semiconductor memory device as claimed in claim 6, further comprising a memory circuit configured to store a defective address in a nonvolatile manner, and wherein the address specify circuit is configured to selectively invert bits of the bit pattern indicative of bitwise matches or mismatches in response to respective bit values of an output of the memory circuit.
8. The semiconductor memory device as claimed in claim 1, wherein the address specifying circuit includes:
an address specify circuit configured to specify a first address;
a pattern specify circuit configured to produce an address bit pattern responsive to an externally applied signal; and
a select circuit configured to select, in response to the switchover signal, one of the first address and a second address that is obtained by modifying a value of the first address in response to the address bit pattern produced by the pattern specify circuit.
9. The semiconductor memory device as claimed in claim 8, wherein the address specify circuit is configured to produce a bit pattern indicative of bitwise matches or mismatches between the first address and an externally applied address in response to selection of the first address by the select circuit, and to produce a bit pattern obtained by selectively inverting respective bits of the bit pattern indicative of bitwise matches or mismatches depending on respective bit values of the address bit pattern in response to selection of the second address by the select circuit.
10. A system, comprising:
a CPU; and
a memory,
wherein the memory includes:
a memory cell array;
a redundant element;
an address specifying circuit configured to select one of a plurality of addresses as a redundancy address in response to a switchover signal;
a decoder circuit configured to select the redundant element in response to an address specified by the CPU that matches the redundancy address selected by the address specifying circuit; and
a test mode setting circuit configured to change the switchover signal in response to instruction from the CPU, thereby to cause the redundancy address assigned to the redundant element to be switched between different ones of the plurality of addresses.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A cytometer system comprising:
a flow channel having an axis;
a hydrodynamic focusing channel connected to the flow channel;
an injection channel connected to the hydrodynamic focusing channel;
a first sheath fluid channel connected to the hydrodynamic focusing channel; and
a second sheath fluid channel connected to the hydrodynamic focusing channel;
2. The system of claim 1, further comprising:
a light source proximate to the flow channel; and
a detector proximate to the flow channel.
3. The system of claim 2, further comprising:
a first pressure control mechanism connected to the first sheath fluid channel; and
a second pressure control mechanism connected to the second sheath fluid channel.
4. The system of claim 3, further comprising a processor connected to the detector, the first pressure control mechanism and the second pressure control mechanism.
5. The system of claim 4, wherein:
the detector may provide a signal to the processor indicating a position of a core stream relative to the axis of the flow channel;
the first and second pressure mechanisms may affect an alignment of the core stream relative to the axis of the flow channel; and
the processor may provide signals to the first and second pressure mechanisms in response to a signal from the detector to effect the alignment of the core stream relative to the axis of the flow channel.
6. The system of claim 5, wherein the signals to the first and second pressure mechanisms in response to the signal from the detector may align the core stream with the axis of the flow channel.
7. A method of alignment for a cytometer, comprising:
providing a sample fluid;
providing a first sheath fluid proximate to the sample fluid;
providing a second sheath fluid proximate to the sample fluid; and
hydrodynamically focusing the sample fluid into a core stream with the first and second sheath fluids into a flow channel.
8. The method of claim 7, further comprising affecting the first and second sheath fluids proximate to the sample fluid to affect an alignment of the core stream relative to the flow channel.
9. The method of claim 8, further comprising differentially affecting flows of the first and sheath fluids to align the core stream with an axis of the flow channel.
10. The method of claim 9, further comprising determining the alignment of the core stream with a light source and detector proximate to the flow channel.
11. The method of claim 10, wherein:
the core stream comprises particles that may scatter light from the light source;
the detector detects the light scattered by the particles; and
a magnitude of scattered light by the particles is indicative of a position of the core stream with the axis of the flow channel.
12. A means for alignment in a cytometer, comprising:
means for providing a sample fluid;
means for providing a plurality of sheathing fluids;
means for hydrodynamically focusing the sample fluid into a core steam with the multitude of sheathing fluids; and
means for individually affecting the flows of the plurality the sheathing fluids to effect an amount of alignment of the core stream with an axis in a flow channel.
13. The means of claim 12, further comprising means for detecting the amount of alignment of the core steam with the axis in the flow channel.
14. The means of claim 13, further comprising means for providing information from the means for detecting the amount of alignment of the core stream to the means for individually affecting the flows of the plurality of the sheathing fluids to maintain an alignment of the core stream.
15. The means of claim 14, wherein:
the core stream comprises particles; and
the particles flow in a single file through the flow channel.
16. A fluid positioning system, comprising:
a hydrodynamic focusing region;
a plurality of sheathing fluid regions proximate to the hydrodynamic focusing region;
a core fluid region proximate to the hydrodynamic focusing region;
an illumination and detection region proximate to the hydrodynamic focusing region; and
a parameter controller proximate to each region of the plurality of sheathing fluid regions.
17. The system of claim 16, wherein a core fluid from the core fluid region is sheathed with a sheathing fluid from each region of the plurality of sheathing fluid regions into a core stream in the hydrodynamic focusing region.
18. The system of claim 17, wherein:
each sheathing fluid from each region of the plurality of regions has a parameter changeable by the parameter controller proximate to the respective region; and
the core stream has a position that is changeable by a variable parameter of at least one sheathing fluid.
19. The system of claim 18, wherein the core stream may be positioned in the illumination and detection region.
20. The system of claim 19, further comprising an interface connecting at least two parameter-controllers to the illumination and detection region for positioning the core stream in the illumination and detection region.

1. A strategic-response control system for operation of an air conditioning system in an environment with increased power rates during a designated peak period, the air conditioning system including a power board for alternately operating the air conditioning system in an operating state and an \u201coff\u201d state, the control system comprising:
a controller having a processor and a real time clock for coordinating operations of the processor with the timing of the designated peak period;
an indoor temperature sensor electronically connected to the controller unit for generating an input signal to the processor representing the indoor temperature;
an outdoor temperature sensor electronically connected to the controller unit for generating an input signal to the processor representing the outdoor temperature; and,
an operating program having operating parameters including a maximum comfort level temperature, a minimum comfort level temperature and a warmup rate for the environment in which the air conditioner operates, and, having a processing procedure for determining a time period for precooling the environment before the peak period begins;
wherein on activation, the processor determines a time period of precooling the environment before the peak period begins and signals the power board at the determined times to enter an operating state for precooling and an \u201coff\u201d state at the beginning of the peak period.
2. The strategic-response control system of claim 1 wherein the air conditioning system has an operating state with multiple power levels of operation including a low power level of operation, and the processing procedure includes a process for determining if the maximum comfort level will be exceeded during the peak period in the off state of operation and determining a time period for low power level of operation during the peak period to prevent the environment from exceeding the maximum comfort level, and, signaling the power board at the determined time to enter a low power level of operation.
3. The strategic-response control system of claim 1 wherein the operating program includes an algorithm for calculating the warmup rate for the environment for a particular indoor temperature and an outdoor temperature.
4. The strategic-response control system of claim 1 wherein the controller includes an updatable memory and a look-up table for recording and retrieving data on indoor temperature, outdoor temperature and warmup rates wherein cooling time constants can be determined for determining cooling rates at particular indoor and outdoor temperatures.
5. The strategic-response control system of claim 4 wherein the air conditioning system has multiple power levels of operation and the look-up table has data for determining warmup rates and cooling rates at each power level of operation.
6. The strategic-response control system of claim 1 wherein the air conditioning system includes an air conditioner with a compressor having a compressor fan and an evaporator having an evaporator fan, the control system further comprising an adjustable fan speed control that controls the compressor fan and an adjustable fan speed control controls the evaporator fan.
7. The strategic-response control system of claim 6 wherein the air conditioning system has multiple power levels of operation and the operating program has a processing procedure for determining the most efficient fan speed for optimizing cost savings at each power level of operation of the air conditioning system.
8. The strategic-response control system of claim 1 wherein the air conditioning system has a normal mode under thermostatic control and the strategic-response control system is activated to override the thermostatic control by the user of the environment.
9. The strategic-response control system of claim 8 wherein the strategic-response control system is alternately activated remotely by a power utility.
10. The strategic-response control system of claim 2 wherein the control system further comprises a humidity sensor electronically connected to the controller unit for generating an input signal to the processor representing an outdoor humidity level and the operating program has a procedure for adjusting the operating parameters in response to the outdoor humidity level.
11. A method for strategically controlling an air conditioning system in an environment with increased power rates during a designated peak period that is alternately operated in an operating state and an \u201coff\u201d state by the steps of:
(1) designating a minimum comfort level temperature in the environment;
(2) precooling the environment to a temperature no less than the designated comfort level temperature before the beginning of the designated peak period by operating the air conditioning system in the operating state; and,
(3) operating the air conditioning system in the \u201coff\u201d state after the peak period begins.
12. The method for strategically controlling an air conditioning system of claim 11 wherein the operating state of the air conditioning system has multiple power levels including a low power level by the further steps of:
(1) designating a maximum comfort level temperature in the environment;
(2) determining if the maximum comfort level temperature will be exceeded in the peak period by operating the air conditioning system in the \u201coff\u201d state during the peak period; and,
(3) operating the air conditioning system in the low power level for at least a part of the peak period.
13. The method for strategically controlling an air conditioning system of claim 12 by the further step of:
(1) determining the period of time the air conditioning system is to be operated at the low power level of operation to maintain the temperature in the environment below the maximum comfort level temperature during the peak period; and,
(2) operating the air conditioning system at the low power level of operation for the determined period of time during the peak period.
14. The method for strategically controlling an air conditioning system of claim 13 wherein the step of determining the period of time the air conditioning system is to be operated at the low power level includes the steps of:
(1) sensing the indoor temperature;
(2) sensing the outdoor temperature;
(3) determining the warmup rate for the environment at the sensed indoor temperature and outdoor temperature; and,
(4) calculating the time period for cooling at the low power level to prevent the environment from reaching the maximum comfort level temperature before the end of the peak period.
15. The method for strategically controlling an air conditioning system of claim 14 wherein the air conditioning system has at least three levels of operation and the additional step of:
(1) determining if the calculated time period for cooling at the low power level exceeds the time remaining in the peak period at the time of the calculation;
(2) if the calculated time period for cooling at the low power level does exceed the time remaining in the peak period, then determining the period of time the air conditioning system is to be operated at the next power level above the low power level;
(3) operating the air conditioning system at the next power level above the low power level for the determined period of time during the peak period.
16. The method for strategically controlling an air conditioning system of claim 14 wherein the step of determining the period of time the air conditioning system is to be operated at the low power level is repeated periodically before and during the peak period.
17. The method for strategically controlling an air conditioning system of claim 14 wherein the step of determining the period of time the air conditioning system is to be operated at the low power level includes the further steps of:
(1) sensing the outdoor humidity level,
(2) adjusting the maximum comfort level temperature if the outdoor humidity level exceeds a predetermined level.
18. The method for strategically controlling an air conditioning system of claim 12 wherein the air conditioning system includes a compressor with a compressor fan and an evaporator with an evaporator fan with a speed control for the compressor fan and the evaporator fan, including the added steps of:
(1) determining the optimum operating speeds of the compressor fan and evaporator fan for each of the multiple power levels of operating; and,
(2) operating the compressor fan and evaporator fan at the optimum operating speed for each power level of operating the air conditioning system.
19. The method for strategically controlling an air conditioning system of claim 11 wherein the air conditioning system is operated in a normal mode under conventional thermostatic mode and is operated in a strategically controlled method when pre-set by a user of the environment.
20. The method for strategically controlling an air conditioning system of claim 11 wherein the air conditioning system is operated in a normal mode under conventional thermostatic mode and is operated in a strategically controlled method when remotely activated by a utility.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for manufacturing a shallow trench isolation (STI) structure, comprising:
providing a substrate with a mask material layer thereon;
forming trenches in the substrate and in the mask material layer;
forming a first insulation layer to simultaneously cover the substrate and completely fill the trenches;
forming a protection layer on the first insulation layer and a sidewall of each of the trenches;
forming a second insulation layer above the first insulation layer to allow the second insulation layer to be surrounded by the protection layer, wherein the method for forming the second insulation layer comprises:
forming an insulating material layer on the substrate; and
implementing a chemical mechanical polishing process by using the mask material layer as a polishing stop layer; and

removing the mask material layer, a portion of the protection layer and the second insulation layer entirely to form the shallow trench isolation.
2. The method for manufacturing the STI structure of claim 1, wherein the material of the protection layer comprises silicon oxynitride.
3. The method for manufacturing the STI structure of claim 1, wherein the method for removing the mask material layer, a portion of the protection layer and the second insulation layer entirely comprises a wet etching process.
4. The method for manufacturing the STI structure of claim 1, further comprising implementing a wet etching process after the first insulation layer is formed and before the protection layer is formed.
5. The method for manufacturing the STI structure of claim 1, wherein the method for forming the first insulation layer comprises:
forming an insulating material layer on the substrate; and
implementing a chemical mechanical polishing process by using the mask material layer as a polishing stop layer.
6. The method for manufacturing the STI structure of claim 1, wherein the material of the mask material layer comprises silicon nitride.
7. The method for manufacturing the STI structure of claim 1, wherein the material of the first insulation layer comprises silicon oxide.
8. The method for manufacturing the STI structure of claim 1, wherein the material of the second insulation layer comprises silicon oxide.