Author: claimsbot

What is claimed is:

1. An optical pickup device comprising:
a housing having an upper-open recess,
a plurality of optical components mounted at their predetermined positions in the recess of the housing, and
a resin member capable of transmitting laser light, wherein the resin member is provided for covering the optical components and fixing them at their predetermined positions in the recess.
2. The optical pickup device according to claim 1, wherein the housing is a thin-walled container.
3. The optical pickup device according to claim 1 or 2, wherein the resin member comprises a transparent resin portion which occupies at least an optical path and a lightproof resin portion which covers a surface of the transparent resin portion in order to block external light.
4. The optical pickup device according to claim 3, wherein the transparent resin portion is made of a photocurable resin composition.
5. The optical pickup device according to claim 1, wherein the plurality of optical components include at least a semiconductor laser element, a grating lens, a beam splitter, a collimator lens, a rising mirror, a condenser lens and a spot adjusting lens.
6. A manufacturing method of an optical pickup device comprising the steps of:
(a) placing optical components at their predetermined positions in an upper-open recess of a housing and adjusting the positions of the optical components,
(b) injecting a transparent resin composition into the recess before andor after the above Step (a), and
(c) curing the injected transparent resin composition to fix the optical components at their predetermined positions in the recess.
7. The manufacturing method of an optical pickup device according to claim 6, wherein the transparent resin composition is injected into the recess so as to cover an optical path in Step (b) to be cured in Step (c) and then the method further comprises the steps of:
(d) injecting a lightproof resin composition into the recess so as to cover a surface of the cured transparent resin composition, and
(e) curing the injected lightproof resin composition.
8. The manufacturing method of an optical pickup device according to claim 6 or 7, wherein the transparent resin composition contains a photocurable resin composition and is cured by an ultraviolet irradiating machine in Step (c).

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An assembly for mounting a circuit board, comprising:
a floating circuit board carrier comprising a bottom surface and at least three mounting surfaces elevated from the bottom surface, wherein the at least three mounting surfaces are configured to mount to respective at least three adjacent edges of a cutout in a surface of a device housing, and the bottom surface is configured to locate the circuit board with respect to the surface of the device housing to align or substantially align two notches located at or near respective two corners of the circuit board with respective two holes located on the surface of the device housing.
2. The assembly of claim 1, wherein the bottom surface of the floating circuit board carrier is configured to hold the circuit board at a distance from the surface of the device housing to allow a first electrical connector built into the circuit board to engage with a second electrical connector built into a modular component when the modular component is mounted flush or substantially flush with the surface of the device housing.
3. The assembly of claim 2, wherein the two holes correspond with respective two posts built into the modular component.
4. The assembly of claim 3, wherein the floating circuit board carrier is configured to locate the circuit board with respect to the surface of the device housing to cause the two posts to pass through the two holes and the notches located at or near the respective two corners of the circuit board.
5. The assembly of claim 1, wherein the surface of the device housing comprises a removable adaptor plate.
6. The assembly of claim 5, wherein the removable adaptor plate is configured to mount to a side of the device housing, and the floating circuit board carrier, when mounted to the removable adaptor plate, causes the circuit board to be disposed inside the device housing.
7. The assembly of claim 5, wherein the device housing comprises a bezel assembly for a human-machine interface device.
8. The assembly of claim 1, wherein the floating circuit board carrier comprises at least one attachment mechanism configured to attach the circuit board to the bottom surface of the floating circuit board carrier, and wherein the at least one attachment mechanism comprises at least one of attachment hardware, one or more snap connectors built into the floating circuit board carrier, or one or more spring-loaded connectors built into the floating circuit board carrier.
9. A method for alignment of electrical connectors in an electronic device, comprising:
attaching at least three mounting surfaces of a floating circuit board carrier to respective at least three adjacent edges of a cutout of a surface of a device housing, wherein the at least three mounting surfaces are elevated with respect to a bottom surface of the floating circuit board carrier; and
mounting a circuit board to the bottom surface of the floating circuit board carrier,
wherein the floating circuit board carrier orients the circuit board to align or substantially align two notches on or near respective two corners of the circuit board with respective two holes located on the surface of the device housing.
10. The method of claim 9, wherein the surface comprises an adapter plate, and the circuit board mounted to the floating circuit board carrier is disposed within the device housing while the adapter plate is mounted to the device housing.
11. The method of claim 9, wherein the mounting the circuit board to the bottom surface of the floating circuit board carrier comprises mounting the circuit board using at least one of attachment hardware, one or more snap connectors built into the floating circuit board carrier, or one or more spring-loaded connectors built into the floating circuit board carrier.
12. The method of claim 9, further comprising:
attaching a modular component having a first electrical connector to the surface of the device housing by inserting two posts projecting from the modular component through the two holes located on the surface of the device housing, wherein the attaching the modular component causes the first electrical connector and a second electrical connector built into the circuit board to be engaged.
13. The method of claim 12, wherein the mounting the circuit board causes the plane of the circuit board to be offset with respect to the surface of the device housing by a distance that allows the first electrical connector to engage with the second electrical connector.
14. The method of claim 12, wherein the mounting the circuit board causes the circuit board to be positioned at a distance from the surface of the device housing that allows the two posts to pass through the notches as the modular component is attached to the surface.
15. An electronic device assembly, comprising:
a device housing having a cutout on a surface; and
a floating circuit board carrier comprising a bottom surface configured to hold a circuit board and at least three mounting surfaces that are elevated with respect to the bottom surface, wherein the at least three mounting surfaces are configured to attach to respective at least three adjacent edges of the cutout, and the floating circuit board carrier is configured to position the circuit board to align or substantially align two notches located on respective opposite edges of the circuit board with respective two holes located on the surface of the device housing.
16. The assembly of claim 15, wherein the surface of the device housing is configured to accept a modular component that mounts to the surface of the device housing over the cutout, two posts on the modular component are inserted through the two holes located on the surface of the device housing, and the two posts run through the two notches on the respective opposite edges of the circuit board.
17. The electronic device assembly of claim 16, wherein the floating circuit board carrier is configured to position the circuit board at a distance from the surface of the device housing that allows a first electrical connector of the circuit board to engage with a second electrical connector of the modular component when the modular component is mounted to the surface of the device housing.
18. The assembly of claim 15, wherein the surface comprises a removable adapter plate.
19. The assembly of claim 15, wherein the device housing comprises a bezel assembly for an operator interface device.
20. The assembly of claim 15, wherein the floating circuit board carrier is configured to hold the circuit board using at least one of attachment hardware, one or more snap connectors, or one or more spring-loaded connectors.

1. A method for manufacturing a semiconductor device using a salicide process, comprising:
forming a gate dielectric layer over a silicon substrate, said substrate defining a PMOS region and an NMOS region;
forming a first silicon pattern in the NMOS region and a second silicon pattern in the PMOS region, over the gate dielectric layer, the first and silicon patterns each defining side walls and a top surface;
forming a first mask pattern that covers the PMOS region and exposes the NMOS region;
doping n-type impurities into the first silicon pattern in the exposed NMOS region and an exposed first portion of the silicon substrate that is adjacent to the first silicon pattern;
forming a first metal layer that covers the side walls and the top surface of the first silicon pattern and the exposed first portion of the silicon substrate;
forming a doped first gate and a first junction by performing a first heat treatment to silicify the first silicon pattern and the exposed first portion of the silicon substrate;
forming a second mask pattern that covers the NMOS region and exposes the PMOS region;
doping p-type impurities into the second silicon pattern in the exposed PMOS region and an exposed second portion of the silicon substrate that is adjacent to the second silicon pattern;
forming a second metal layer that covers the side walls and the top surface of the second silicon pattern and the exposed second portion of the silicon substrate; and
forming a doped second gate and a second junction by performing a second heat treatment to completely silicify the second silicon pattern and the exposed second portion of the silicon substrate.
2. The method of claim 1, wherein the gate dielectric layer comprises a material having a high dielectric constant higher than the dielectric constant of silicon oxide.
3. The method of claim 1, comprising forming the first and second silicon patterns by:
depositing a silicon layer over the gate dielectric layer;
forming a partition pattern over the silicon layer, said partition pattern defining side walls;
attaching spacers to side walls of the partition pattern;
selectively removing the partition pattern to expose a portion of the silicon layer; and
forming the first and second silicon patterns by selectively removing the portion of the silicon layer exposed by the spacers.
4. The method of claim 3, comprising forming the silicon layer by depositing a polysilicon layer.
5. The method of claim 3, comprising forming the silicon layer by:
depositing a polysilicon layer as a seed over the gate dielectric layer;
and epitaxially growing silicon over the polysilicon layer.
6. The method of claim 3, comprising forming the partition pattern using a silicon oxide (SiO2) based material, and forming the spacer layer using a silicon nitride (Si3N4) layer or a nitride compound.
7. The method of claim 1, wherein the doped first gate has a work function different from that of the doped second gate.
8. The method of claim 1, comprising forming the first and second metal layers using an identical metal material or a metal nitride compound in each case.
9. The method of claim 8, comprising forming the first and second metal layers are formed including cobalt (Co), nickel (Ni), a cobalt nitride compound or a nickel nitride compound.
10. The method of claim 1, comprising forming the first and second metal layers using a different metal material or metal nitride compound in each case.
11. The method of claim 10, comprising forming at least one of the first and second metal layers from a metal or metal nitride compound selected from the group consisting of cobalt (Co), nickel (Ni), titanium (Ti), tungsten (W), copper (Cu), molybdenum (Mo), tantalum (Ta), zirconium (Zr), platinum (Pt), and nitride compounds thereof.
12. The method of claim 1, wherein the first or second mask pattern comprises a silicon nitride layer or a silicon oxide layer.
13. A method for manufacturing a semiconductor device using a salicide process, comprising:
forming a gate dielectric layer over a silicon substrate defining a PMOS region and an NMOS region;
forming a silicon layer over the dielectric layer;
forming a partition pattern over the silicon layer, said partition pattern defining side walls;
attaching spacers to side walls of the partition patterns;
selectively removing the partition pattern to expose a portion of the silicon layer;
forming a first silicon pattern in the NMOS region and a second silicon pattern in the PMOS region by selectively removing the portion of the silicon layer exposed by the spacers, the first and silicon patterns each defining side walls and a top surface;
forming a first mask pattern that covers the PMOS region and exposes the NMOS region;
doping n-type impurities into the first silicon pattern in the exposed NMOS region and a first exposed portion of the silicon substrate that is adjacent to the first silicon pattern;
forming a first metal layer that covers the side walls and the top surface of the first silicon pattern and the exposed first portion of the silicon substrate;
forming a first gate and a first junction by performing a first heat treatment to completely silicify the first silicon pattern and the exposed first portion of the silicon substrate;
forming a second mask pattern that covers the NMOS region and exposes the PMOS region;
doping p-type impurities into the second silicon pattern in the exposed PMOS region and an exposed second portion of the silicon substrate that is adjacent to the second silicon pattern;
forming a second metal layer that covers the side walls and the top surface of the second silicon pattern and the exposed second portion of the silicon substrate; and
forming a second gate and a second junction by performing a second heat treatment to completely silicify the second silicon pattern and the exposed second portion of the silicon substrate.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A poppet valve, comprising:
a valve body, said valve body having a central axis, a flow inlet, and a flow outlet;
a poppet guide disposed inside the valve body so as to form a first portion of a flow passage from the flow inlet to the flow outlet, said flow passage being formed between an inside surface of the valve body and an outside surface of the poppet guide and passing through at least one hole in the poppet guide;
a poppet shutter disposed inside the poppet guide so as to form a second portion of the flow passage between an outside surface of the poppet shutter and the inside surface of the valve body; and
a biasing member disposed inside an inner chamber of the poppet guide, said biasing member being configured to bias the poppet shutter toward an inside surface of the flow inlet so as to block the flow passage, wherein said poppet guide further includes at least one discharge hole placing the inner chamber of the poppet guide in flow communication with a region of low static pressure of the flow passage.
2. The poppet valve according to claim 1, wherein the at least one discharge hole connects to the flow passage at the at least one hole.
3. The poppet valve according to claim 1, wherein the region of low static pressure is a region of flow acceleration.
4. The poppet valve according to claim 3, wherein the amount of flow acceleration is controlled by a diameter of the at least one hole in the poppet guide.
5. The poppet valve according to claim 1, wherein the at least one discharge hole is inclined with respect to the central axis of the valve body.
6. The poppet valve according to claim 5, wherein an inclination angle of the at least one discharge hole varies between 10 and 25 degrees.
7. The poppet valve according to claim 6, wherein the inclination angle is approximately 19 degrees.
8. The poppet valve according to claim 1, wherein the at least one discharge hole is disposed in the poppet guide so as to reduce a pressure force acting against an inner surface of the poppet shutter toward the valve inlet.
9. The poppet valve according to claim 1, wherein said biasing member is a spring.
10. A hyper compressor comprising a poppet valve according to claim 1.
11. A method for reducing a closing pressure force acting on a poppet shutter of a poppet valve, said poppet valve having a valve body with a central axis, a flow inlet, and a flow outlet, said poppet valve including further a poppet guide and a biasing member configured to bias the poppet shutter disposed inside the poppet guide against the valve body so as to close the poppet valve, the method comprising:
accelerating the flow in a flow passage of the valve so as to reduce the static pressure in a region of the flow passage, said flow passage being disposed so as to place said flow inlet in flow communication with said flow outlet, a portion of said flow passage being formed between the poppet guide and the valve body; and
placing an inner chamber of the poppet guide in flow communication with the region of reduced static pressure of the flow passage so as to reduce a fluid pressure force acting on an inner surface of the poppet shutter toward an inner surface of the valve body to cause the poppet valve to close.
12. The method according to claim 11, wherein said accelerating the flow further comprises accelerating the flow through at least one hole in the poppet guide and said region of low static pressure is located in a portion of the flow passage where said at least one hole is located.
13. The method according to claim 11, wherein said placing in flow communication comprises placing the inner chamber of the poppet guide in flow communication with the region of the flow passage with the reduced static pressure via at least one discharge hole disposed in the poppet guide.
14. The method according to claim 13, wherein the at least one discharge hole is inclined with respect to the central axis of the valve body.
15. The method according to claim 14, wherein an inclination angle of the at least one discharge hole varies between 10 and 25 degrees.
16. The method according to claim 15, wherein the inclination angle is approximately 19 degrees.
17. A poppet valve, comprising:
a valve body, said valve body having a central axis, a flow inlet, and a flow outlet;
a poppet guide disposed inside the valve body so as to form a first portion of a flow passage from the flow inlet to the flow outlet, said flow passage being formed between an inside surface of the valve body and an outside surface of the poppet guide and passing through at least one hole in the poppet guide;
a poppet shutter disposed inside the poppet guide so as to form a second portion of the flow passage between an outside surface of the poppet shutter and the inside surface of the valve body;
a spring disposed inside an inner chamber of the poppet guide, said spring being configured to bias the poppet shutter toward an inside surface of the flow inlet so as to block the flow passage; and
a purge flow passage placing the inner chamber of the poppet guide in flow communication with a region of low static pressure of the first portion of the flow passage at the location of the at least one hole, said purge flow passage being sloped with respect to the central axis of the valve body.
18. The poppet valve according the claim 17, wherein a ratio of a diameter of the at least one hole to a diameter of the flow inlet ranges from about 0.36 to about 0.44.
19. The poppet valve according to claim 17, wherein an inclination angle of the at least one discharge hole varies from approximately 10 to approximately 25 degrees.
20. A hyper compressor comprising a poppet valve according to claim 17.