1460707118-3caa1dbf-d01f-4cf8-b714-14ad789a6089

1) A rotary viscous damper comprising a stator and a rotor defining between them a main chamber filled with a fluid, substantially radial paddles being disposed on each of said stator and rotor, said paddles dividing said main chamber into a plurality of chambers, and presenting means to create a fluid communication between the chambers, said damper further comprising at least one conical elastomeric bearing between the stator and the rotor.
2) A damper as claimed in claim 1, wherein is further provided another bearing between the stator and the rotor, for improving the guidance between the stator versus the rotor.
3) A damper as claimed in claim 1, wherein the said at least one conical elastomeric bearing comprises a metal-elastomer laminated material.
4) A damper as claimed in claim 3, wherein said metal-elastomer laminated material consists of multiple layers of elastomers with metallic shims in between every layer.
5) A damper as claimed in claim 4, wherein the said layers are conically converging to the center of the damper.
6) A damper as claimed in claim 4, wherein the said layers are conically diverging to the center of the damper.
7) A damper as claimed in claim 1, wherein it further comprises a volume compensation device.
8) A damper as claimed in claim 7, wherein the volume compensation device comprises an auxiliary chamber which communicates with said main chamber, said auxiliary chamber being defined between a substantially transverse wall of the rotor and a sealing diaphragm, which is elastically urged against the said wall.
9) A damper as claimed in claim 8, wherein the diaphragm is provided on a piston which is loaded by springs, in order to be axially movable in function of the temperature of the fluid in the main chamber.
10) A damper as claimed in claim 1, wherein at least one conduit is provided, with opened ends in fluid communication with entry holes of the stator, to create a fluid communication between two associated chambers.
11) A damper as claimed in claim 10, wherein the rotor presents a central bore in which is mounted a shaft, the said at least one conduit being provided on the external wall of said shaft.
12) A damper as claimed in claim 10, wherein the said at least one conduit is provided on the external wall of the main chamber.
13) A damper as claimed in claim 10, wherein it comprises the said at least one conduit is provided on the top, on the bottom or on top and bottom of the main chamber.
14) A damper as claimed in claim 10, wherein the length, cross-section and profile of said at least one conduit are determined to provide the required damping characteristics.
15) A damper as claimed in claim 1, wherein it includes relief valves for torque limitation purposes.
16) A damper as claimed in claim 15, wherein the relief valves are provided by pairs at each of their location.
17) A damper as claimed in claim 1, wherein an anti-wear coating is provided on dynamic surfaces subject to abrasion.
18) A damper as claimed in claim 1, wherein an autonomous pressure monitoring system is provided to make maintenance easier.
19) A damper as claimed in claim 1, wherein cooling fins are provided on the exterior of its housing.
20) A damper as claimed in claim 1, wherein a heating element is provided inside or outside its housing.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A manufacturing method of a thin film transistor comprising:
forming a sourcedrain electrode on a substrate;
forming low resistance conductive thin films on the sourcedrain electrode;
forming an oxide semiconductor thin film layer on the low resistance conductive thin films;
forming a first gate insulating film on the oxide semiconductor thin film layer;
etching the first gate insulating film, the low resistance conductive thin films, and the oxide semiconductor thin film layer such that (i) side surfaces of the first gate insulating films, corresponding side surfaces of the low resistance conductive thin films, and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of a channel of the thin film transistor, and (ii) a width of the first gate insulating film is wider than a width of the sourcedrain electrode in the channel width direction of the channel;
forming a second gate insulating film on the first gate insulating film; and
mounting a gate electrode over the second gate insulating film.
2. The method according to claim 1, wherein the oxide semiconductor thin film layer primarily comprises zinc oxide.
3. The method according to claim 1, wherein the etching is dry etching.
4. A manufacturing method of a thin film transistor comprising:
forming a gate electrode on a substrate;
forming a gate insulating film on the gate electrode and forming a sourcedrain electrode on the gate insulating film;
forming low resistance conductive thin films on the sourcedrain electrode;
forming an oxide semiconductor thin film layer on the low resistance conductive thin films;
forming a first overcoat insulating film on the oxide semiconductor thin film;
etching the first overcoat insulating film, the low resistance conductive thin films, and the oxide semiconductor thin film layer such that (i) side surfaces of the first overcoat insulating film, corresponding surfaces of the low resistance conductive thin films, and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of a channel of the thin film transistor, and (ii) a width of the first overcoat insulating film is wider than a width of the sourcedrain electrode in the channel width direction of the channel; and
forming a second overcoat insulating film on the first overcoat insulating film.
5. The method according to claim 4, wherein the oxide semiconductor thin film layer primarily comprises zinc oxide.
6. The method according to claim 4, wherein the etching is dry etching.
7. A manufacturing method of a thin film transistor comprising:
forming a predetermined number of pairs of sourcedrain electrodes, each said pair comprising a source electrode and a drain electrode defining a gap therebetween at an area corresponding to a channel of the thin film transistor, and each said pair being spaced apart from an adjacent pair by a spacing;
forming a pair of low resistance conductive thin films, which define a gap therebetween along the channel-corresponding area, such that one of the low resistance conductive thin films covers the source electrodes and another of the low resistance conductive thin films covers the drain electrodes;
forming an oxide semiconductor thin film layer on the pair of low resistance conductive thin films, on the channel-corresponding area, and on each said spacing; and
etching the oxide semiconductor thin film layer and the low resistance conductive thin films along each said spacing between adjacent pairs of the sourcedrain electrodes, to separate each of the oxide semiconductor thin film layer and the low resistance conductive thin films into a predetermined number of oxide semiconductor thin film layer pieces and a predetermined number of pairs of low resistance conductive thin film pieces corresponding respectively to the predetermined number of pairs of sourcedrain electrodes, such that at each said spacing side surfaces of each of the oxide semiconductor thin film layer pieces coincide with corresponding side surfaces of the pair of low resistance conductive thin film pieces corresponding to the oxide semiconductor thin film layer piece.
8. The method of according to claim 7, wherein the forming of the pair of low resistance conductive thin films comprises etching a low resistance conductive thin film to form the pair of low resistance conductive thin films to have outer ends that are positioned outside outer ends of a final shape of the low resistance conductive thin films.

1460707114-84650ef6-16f4-41dc-9ecd-9f0898c15d9c

1. A method of fabricating non-volatile memory, comprising the steps of:
providing a substrate at least divided into a memory cell region and a peripheral circuit region;
forming a plurality of first memory cells on the substrate in the memory cell region, wherein every pair of adjacent first memory cells has a gap;
forming a second composite layer over the substrate in the memory cell region, wherein the second composite layer includes a second charge storage layer;
forming a gate dielectric layer over the substrate in the peripheral circuit region;
forming a conductive layer over the second composite layer and the gate dielectric layer to cover the first memory cells and fill up the gaps;
forming a dielectric layer over the conductive layer;
removing a portion of the dielectric layer in the peripheral circuit region and the dielectric layer and removing a portion of the conductive layer in the memory cell region to form a plurality of second gates that fills the gaps, wherein the second gates and the second composite layer form a plurality of second memory cells, and the second memory cells and the first memory cells form a first memory cell column;
patterning the remaining dielectric layer and the conductive layer in the peripheral circuit region to form a plurality of gate structures in the peripheral circuit region; and
forming a sourcedrain region in the substrate on the respective sides of the first memory cell column.
2. The method of claim 1, wherein the removing step includes performing a first chemical-mechanical polishing process using the first memory cells as a polishing stop layer.
3. The method of claim 1, wherein the removing step further includes:
performing a second chemical-mechanical polishing process to planarize the dielectric layer; and
etching the remaining dielectric layer using the first memory cells as an etching stop layer.
4. The method of claim 1, wherein the process of forming the second composite layer over the substrate in the memory cell region and forming the gate dielectric layer over the substrate in the peripheral circuit region includes:
forming the second composite layer over the substrate;
forming a patterned photoresist layer to cover the second composite layer in the memory cell region;
removing the second composite layer in the peripheral circuit region using the patterned photoresist layer as a mask;
forming the gate dielectric over the substrate in the peripheral circuit region; and
removing the patterned photoresist layer.
5. The method of claim 1, wherein before forming the second composite layer, further includes forming spacers on the sidewalls of the first memory cells.
6. The method of claim 5, wherein after forming the first memory cells but before forming the spacers, further includes forming a liner oxide layer on the sidewalls of the first memory cells.
7. The method of claim 6, wherein the process of forming the liner oxide layer further includes performing a rapid thermal annealing process thereafter.
8. The method of claim 1, wherein the step of forming the sourcedrain region s in the substrate includes performing an ion implantation process.
9. The method of claim 1, further includes forming a second memory cell column on the substrate next to the first memory cell column.
10. The method of claim 9, wherein a distance between the first memory cell column and the second memory cell column is wider than the gap between any two adjacent first memory cells.
11. The method of claim 9, wherein one of the sourcedrain regions is formed in the substrate between the first memory cell column and the second memory cell column.
12. The method of claim 1, wherein the width of two outermost first memory cells in the first memory cell column is larger than the other first memory cells.
13. The method of claim 1, wherein the dielectric layer has a thickness of about 3000 \u212b.
14. The method of claim 1, wherein each memory cell comprises, from the substrate, a first composite layer, a first gate and a cap layer such that the first composite layer also includes a first charge storage layer.
15. The method of claim 14, wherein the material constituting the first gates includes doped polysilicon or polysilicon silicide (polycide).
16. The method of claim 14, wherein the material constituting the first charge storage layer and the second charge storage layer includes silicon nitride or doped polysilicon.
17. The method of claim 14, wherein the cap layer includes a silicon oxide layer, a silicon nitride layer or a stacked layer comprising a silicon oxide layer and a silicon nitride layer.
18. The method of claim 14, wherein the first composite layer and the second composite layer each comprises a bottom dielectric layer and a top dielectric layer.
19. The method of claim 18, wherein the material constituting the bottom dielectric layer and the top dielectric layer includes silicon oxide.
20. The method of claim 1, wherein the step of patterning the dielectric layer includes performing an anisotropic etching operation.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An exercise apparatus comprising:
an elongated tube having an inner channel and at least one end;
a handle including a strap, wherein a hole is defined in the strap, the hole for receiving the elongated tube;
a grommet disposed at the hole in the strap;
a gasket having a hole that receives the elongated tube, wherein the grommet is disposed about the gasket such that relative movement between the grommet and the gasket is substantially prevented when the elongated tube moves within the hole of the gasket; and
an insert that is arranged in the inner channel of the elongated tube near the at least one end, wherein the insert does not occupy part of the hole of the gasket and cannot pass through the hole in the gasket.
2. An exercise apparatus as recited in claim 1, wherein the gasket has at least one rim that restricts movement of the gasket relative to the grommet when the elongated tube moves within the hole of the gasket.
3. An exercise apparatus as recited in claim 1, wherein the grommet is at least coated with a rubberized or polymeric material.
4. An exercise apparatus as recited in claim 1, wherein the gasket has two rims that restrict movement of the gasket relative to the grommet when the elongated tube moves within the hole of the gasket.
5. An exercise apparatus as recited in claim 4, wherein the two rims of the gasket have diameters that are unequal.
6. An exercise apparatus as recited in claim 4, wherein the handle further comprises a handle grip disposed on the strap, wherein the hole in the strap extends through two overlapping ends of the strap, the grommet securing the two overlapping ends of the strap at the hole.
7. An exercise apparatus as recited in claim 4, wherein the insert has a cross-section that is larger than a diameter of the inner channel in a neutral state, the elongated tube being deformed to place the insert within the inner channel of the elongated tube.
8. An exercise apparatus as recited in claim 4, wherein the handle further comprises a first loop and a second loop formed by the strap, wherein a hand grip is disposed on the strap forming the first loop, wherein the second loop is disposed about the at least one end of the elongated tube, the second loop cooperating with the at least one end of the elongated tube to reduce movement between the gasket and the grommet.
9. An exercise apparatus as recited in claim 8, wherein a diameter of the hole of the gasket is constant along a length of the gasket.
10. An exercise apparatus for resistance training, the exercise apparatus comprising:
an elongated tube having an inner channel and at least one open end;
a handle including a strap, wherein a hole is formed through overlapping ends of the strap;
a grommet disposed at the hole in the strap of the handle, the grommet securing the overlapping ends of the strap to one another;
a gasket having a hole that receives the elongated tube near the at least one open end, wherein the grommet is disposed about the gasket; and
an insert that is arranged in the inner channel of the elongated tube near the at least one end, wherein a segment of the elongated tube disposed about the insert is positioned adjacent to the gasket, wherein the insert has a larger cross section than the hole in the gasket, wherein the insert does not occupy the hole of the gasket;
wherein at least the gasket and the insert operate to prevent the handle from separating from the elongated tube.
11. An exercise apparatus as recited in claim 10, wherein the grommet has two rims that restrict movement of the grommet in at least two directions.
12. An exercise apparatus as recited in claim 10, wherein the grommet is formed of or at least coated with a rubberized or polymeric material.
13. An exercise apparatus as recited in claim 10, wherein the gasket has at least one rim that restricts movement of the gasket relative to the grommet when the elongated tube moves within the hole of the gasket.
14. An exercise apparatus as recited in claim 13, wherein the gasket has two rims, at least one of which is disposed near a middle of the gasket.
15. An exercise apparatus as recited in claim 13, wherein the handle further comprises a first loop and a second loop formed by the strap, wherein a hand grip is disposed on the strap forming the first loop, wherein the second loop is disposed about the at least one end of the elongated tube, the second loop cooperating with the at least one end of the elongated tube to reduce movement between the grommet and the gasket.
16. An exercise apparatus as recited in claim 15, wherein the insert has a cross-section that is larger than a diameter of the inner channel in a neutral state, the elongated tube being deformed to place the insert within the inner channel of the elongated tube.
17. An exercise apparatus as recited in claim 15, further comprising a second handle, a second grommet, a second gasket, and a second insert disposed near a second open end of the elongated tube.
18. A method for assembling an exercise apparatus having an elongated tube and a handle disposed near an end of the elongated tube, the method comprising:
joining two ends of a strap in an overlapping arrangement;
forming a hole in the two ends of the strap at the overlapping arrangement;
securing a grommet to the hole in the two ends of the strap, the grommet securing the two ends of the strap to one another;
arranging the grommet about a gasket;
inserting the end of the elongated tube through a hole in the gasket;
expanding a segment of the elongated tube near the end of the elongated tube; and
placing the insert within the elongated tube.
19. A method of assembling the exercise apparatus as recited in claim 18, wherein the step of placing the insert within the elongated tube further comprises arranging the insert adjacent to the gasket.
20. A method of assembling the exercise apparatus as recited in claim 18, further comprising a step of forming a first loop and a second loop from the strap, wherein at least one of the first and second loops cooperates with the end of the elongated tube to prevent the grommet from moving along the gasket.