All The Claims

1. An opto-electronic system comprising:
an optoelectronic module including a housing with an optical connector, a groove and a first electrical connector, and
a cage assembly for mounting on a host printed circuit board, the cage assembly including:
a faceplate having an opening through which the opto-electronic module passes,
a cage forming a cavity for receiving the opto-electronic module therein with the optical connector extending outwardly therefrom, and
a second electrical connector for mating with the first electrical connector,

wherein the cage assembly includes a stop extending into the opening for receipt in the groove during insertion of the opto-electronic module into the cage, enabling the opto-electronic module to pass into the cage unobstructed, the cage assembly further includes a stop projection for preventing other non-compatible opto-electronic modules with similar cross-sectional dimensions to the optoelectronic module, but without the groove, from becoming fully inserted into said cage assembly.
2. The opto-electronic system according to claim 1, wherein the stop extends from the faceplate.
3. The opto-electronic system according to claim 1, wherein the stop extends from the cage.
4. The opto-electronic system according to claim 1, wherein the stop extends from the host printed circuit board.
5. The opto-electronic system according to claim 1, wherein the stop extends from the second electrical connector.
6. The opto-electronic system according to claim 1, wherein the groove extends from a front end to a rear end of the opto-electronic module housing.
7. The opto-electronic system according to claim 6, wherein the groove extends along a corner of the opto-electronic module at an intersection of two perpendicular surfaces thereof.
8. The opto-electronic system according to claim 1, further comprising a finger extending from the housing for abutting said cage assembly, thereby preventing the opto-electronic module from becoming fully inserted into said cage assembly without displacing said finger away from said cage assembly.
9. The optoelectronic system according to claim 8, further comprising a camming surface on said finger, and a tab on said cage assembly for engaging said camming surface during insertion of the opto-electronic module into said cage assembly, thereby pivoting the finger away from said cage assembly.
10. The opto-electronic system according to claim 8, wherein the finger comprises a spring finger biased outwardly from the housing with an abutment surface on an outer free end thereof.
11. An opto-electronic system comprising:
an opto-electronic module including a housing and a first electrical connector, the housing including a first camming surface; and
a cage assembly for mounting on a host printed circuit board, the cage assembly including a faceplate, a cage forming a cavity with an opening for receiving the opto-electronic module, and a second electrical connector for mating with the first electrical connector, the cage assembly including a second camming surface extending therefrom into the cavity or the opening for engaging the first camming surface, whereby the first or second camming surface is rotated relative to the housing to a module insertion position enabling the opto-electronic module to be fully inserted into the cage assembly, thereby preventing non-compatible opto-electronic modules with similar cross-sectional dimensions to the opto-electronic module, but without the first camming surface, from becoming fully inserted into said cage assembly, in which the cage assembly includes a stop extending therefrom into the cavity to prevent non-compatible opto-electronic modules with similar cross-sectional dimensions to the opto-electronic module from being fully inserted into the cage assembly unless the second camming surface is rotated relative to the housing.
12. The opto-electronic system according to claim 11, wherein the first or second camming surface comprises a spring finger extendable between said opto-electronic module and said cage assembly.
13. The opto-electronic system according to claim 12, wherein the spring finger includes an abutment surface on an outer free end thereof for engaging cage assemblies or modules without the first or second camming surface, respectively.
14. The opto-electronic system according to claim 12, wherein the second camming surface comprises a ramp for engaging the first camming surface and gradually rotating the spring finger.
15. The opto-electronic system according to claim 12, wherein the spring finger includes the second camming surface and extends from said housing for abutting cage assemblies without the first camming surface.
16. The opto-electronic system according to claim 15, wherein the second camming surface comprises a ramp formed in the spring finger adjacent to the abutment surface for engaging the first camming surface and gradually rotating the spring finger away from the cage assembly.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A memory device, comprising:
a plurality of row lines and a plurality of column lines; and
a memory cell coupled to one of the plurality of column lines and to one of the plurality of row lines, the memory cell including:
a capacitor with a first plate coupled to a storage node of the memory cell; and
a CMOS-compatible non-volatile storage element comprising a first node coupled to the storage node, wherein the CMOS-compatible non-volatile storage element is configured to hold a charge corresponding to a binary value, and

wherein the CMOS-compatible non-volatile storage element is coupled to a control line; and
access circuitry coupled to the plurality of row lines, the plurality of column lines, and the control line, wherein the access circuitry is configured to toggle the control line to a control voltage during a read operation, and wherein the CMOS-compatible non-volatile storage element is configured to set, in response to the control voltage, a voltage on the storage node that is dependent on a value of the charge.
2. The memory device of claim 1, wherein the memory cell further comprises an access transistor including a word line gate, a first node, and a second node, wherein the word line gate is coupled to the one of the plurality of row lines, the first node is coupled to a second plate of the capacitor, and wherein the second node is coupled to the one of the plurality of column lines.
3. The memory device of claim 2, further comprising a voltage-dependent element arranged in series with the second node of the access transistor, wherein the plurality of column lines are configured to be pre-charged to a voltage level, with the pre-charge voltage allocated to the voltage-dependent element and to the capacitor in the memory cell, and wherein the allocation is based, at least in part, on the relative capacitances of the voltage-dependent element and the capacitor.
4. The memory device of claim 3, wherein the voltage-dependent element is the one of the plurality of column lines.
5. The memory device of claim 4, wherein the capacitance of the voltage-dependent element is inversely proportional to the pre-charge voltage allocated to the voltage-dependent element.
6. The memory device of claim 4, wherein at least one of the plurality of column lines is a diffused junction capacitor.
7. The memory device of claim 1, wherein the CMOS-compatible non-volatile storage element is a floating-gate transistor including a control gate coupled to the control line.
8. The memory device of claim 7, wherein a floating gate of the floating-gate transistor is configured to hold the charge, wherein the floating gate is further configured to cause, in response to the control voltage during the read operation, current to flow to the storage node, and wherein a level of the current is dependent on the charge.
9. The memory device of claim 1, wherein the CMOS-compatible non-volatile storage element is one of a Magnetoresistive Random Access Memory (MRAM) cell or a Phase-Change Memory (PCM) cell.
10. The memory device of claim 1, wherein the binary value comprises n bits and the resulting voltage is one of 2n possible voltages, where n is an integer.
11. A method of operating digital memory, the method comprising:
toggling, by access circuitry of a digital memory device during a read operation:
a control gate of a floating-gate transistor to a control voltage of a memory cell in the digital memory device, wherein the floating-gate transistor is configured to hold a charge corresponding to a binary value and to set, in response to the control voltage, a storage node of the memory cell to a voltage that is dependent on a value of the charge held on the floating-gate transistor, wherein the floating-gate transistor is coupled in series to a storage capacitor, wherein a first node of the floating-gate transistor is coupled to a first plate of the storage capacitor and wherein a second node of the floating gate transistor is coupled to a drain line;
a row line coupled to a word line gate of an access transistor of the memory cell to a select voltage, wherein the access transistor includes a first node coupled to a second plate of the storage capacitor and a second node coupled to a column line; and
the drain line to a supply voltage; and
sensing, by the access circuitry, a voltage resulting from said toggling, and
determining, based on the sensed voltage, the binary value.
12. The method of claim 11, wherein the binary value comprises n bits, where n is an integer.
13. An apparatus, comprising:
means for toggling, during a read operation:
a control line of a memory cell in a digital memory device to a control voltage;
a row line coupled to the memory cell to a select voltage; and
a drain line coupled to the memory cell to a supply voltage; and

means for sensing a voltage on a column line resulting from the toggling of the control, row, and drain lines;
wherein the memory cell further comprises a CMOS-compatible non-volatile storage element configured to toggle, in response to the control voltage, the voltage on a storage node of the memory cell, and wherein the voltage is dependent on a value of a held charge.
14. The apparatus of claim 13, wherein the voltage corresponds to a binary value comprising n bits, where n is an integer.
15. A system, comprising:
a digital memory controller configured to issue access commands to a digital memory device; and
the digital memory device, coupled to the controller, and including:
a plurality of row lines and a plurality of column lines;
a memory cell coupled to one of the plurality of column lines, to one of the plurality of row lines, and to a control line, wherein the memory cell comprises:
a capacitor with a first plate coupled to a storage node; and
a CMOS-compatible non-volatile storage element including a first node coupled to the storage node and configured to hold a charge corresponding to a binary value; and

access circuitry coupled to the plurality of row lines, the plurality of column lines, and the control line, wherein the access circuitry is configured to toggle the control line to a control voltage during a read operation, and wherein the CMOS-compatible non-volatile storage element is configured to toggle, in response to the control voltage, the storage node to a voltage that is dependent on a value of the charge.
16. The system of claim 15, wherein the memory cell further comprises an access transistor including a word line gate, a first node, and a second node, wherein the word line gate is coupled to the one of the plurality of row lines, wherein the first node is coupled to a second plate of the capacitor, and wherein the second node is coupled to the one of the plurality of column lines.
17. The system of claim 16, further comprising a voltage- dependent element arranged in series with the second node of the access transistor, wherein the access circuitry is further configured to precharge the plurality of column lines to a precharge voltage level, with a pre-charge voltage allocated to the voltage-dependent element and to the capacitor, and wherein the allocation is based, at least in part, on the relative capacitances of the voltage-dependent element and the capacitor.
18. The system of claim 17, wherein the voltage-dependent element is the one of the plurality of column lines.
19. The system of claim 18, wherein the capacitance of the voltage-dependent element is inversely proportional to the voltage allocated to the voltage-dependent element.
20. The system of claim 18, wherein at least one of the plurality of column lines is a diffused junction capacitor.
21. The system of claim 15, wherein the CMOS-compatible non-volatile storage element is a floating-gate transistor.
22. The system of claim 21, wherein a floating gate of the floating-gate transistor is configured to hold the charge, wherein the floating gate is further configured to cause, in response to the control voltage during the read operation, current to flow to the storage node, and wherein a level of the current is dependent on the charge.
23. The system of claim 15, wherein the CMOS-compatible non-volatile storage element is one of a Magnetoresistive Random Access Memory (MRAM) cell or a Phase-Change Memory (PCM) cell.
24. The system of claim 15, wherein the binary value comprises n bits, where n is an integer.
25. An article of manufacture, comprising a non-transitory computer-readable medium including a plurality of computer-readable hardware design language instructions, or compilation of the hardware design language instructions, wherein the hardware design language instructions specify an implementation of the memory device as set forth in claim 1 as an integrated circuit.
26. The article of manufacture of claim 25, wherein a hardware design language of the hardware design language instructions comprises either VHDL or Verilog.

1. A method of injecting a liquid crystal material, comprising the steps of:
disposing a liquid crystal material on one substrate (S1) for constituting a pair of substrates; and
disposing another substrate (S2) for constituting the pair of substrate above the substrate (S1), and attaching the pair of substrates S1 and S2 with each other;
wherein, at the time of the attachment of the pair of substrates S1 and S2 together, a closed space B is formed by reservoir means so that the space B is communicated with a space A for liquid crystal display defined by the pair of substrates S1 and S2; and
the liquid crystal material is disposed on the substrate S1 so that the mass of the liquid crystal material provides a volume not larger than the total volume of the spaces (A+B) at the time of the injection of the liquid crystal material.
2. A method of injecting a liquid crystal material according to claim 1, wherein the spaces A and B are isolated from each other after the pair of substrates S1 and S2 are attached to each other.
3. A method of injecting a liquid crystal material according to claim 1, wherein the temperature at the time of the injection of the liquid crystal material is higher than room temperature (25\xb0 C.).
4. A method of injecting a liquid crystal material according to claim 4, wherein the temperature at the time of the injection of the liquid crystal material is not lower than 100\xb0 C.
5. A method of injecting a liquid crystal material according to claim 1, wherein the liquid crystal material is heated so as to be disposed between the pair of substrates S1 and S2, and, thereafter, the temperature of the liquid crystal material is lowered.
6. A method of injecting a liquid crystal material according to claim 5, wherein the liquid crystal material is heated to show an isotropic phase so as to be disposed between the pairs of substrates S1 and S2.
7. A method of injecting a liquid crystal material according to claim 1, wherein the spaces A and B are defined by a patterned seal member disposed on the pair of substrates S1 andor S2.
8. A method of injecting a liquid crystal material according to claim 7, wherein, in the seal pattern, a seal portion corresponding to the space A and a seal portion corresponding to the space B comprise seal members having different curing mechanisms.
9. A method of injecting a liquid crystal material according to claim 8, wherein the seal portion corresponding to the space A comprises a UV-curable seal member, and the seal portion corresponding to the space B comprises a thermosetting seal member.
10. A method of injecting a liquid crystal material according to claim 7, wherein, in the seal pattern, a seal portion corresponding to the space A and a seal portion corresponding to the space B comprise seal members having the same curing mechanism.
11. A method of injecting a liquid crystal material according to claim 10, wherein a seal portion corresponding to the space A and a seal portion corresponding to the space B comprise a UV-curable seal member.
12. A method of injecting a liquid crystal material according to claim 10, wherein a seal portion corresponding to the space A and a seal portion corresponding to the space B comprise a thermosetting seal member.
13. A method of injecting a liquid crystal material according to claim 11, wherein after the pair of substrates S1 and S2 are attached to each other, a seal portion corresponding to the space A is selectively cured in the seal pattern by using a photo-mask and after the liquid crystal material has exhibited a phase suitable for display, a seal portion corresponding to the space B is cured.
14. A method of injecting a liquid crystal material according to claim 11, wherein a seal portion corresponding to the space A is partially cured at first, and the pair of substrates S1 and S2 are attached to each other and, after the liquid crystal material has exhibited a phase suitable for display, a seal portion corresponding to the space B is cured.
15. A method of injecting a liquid crystal material according to claim 11, wherein a liquid crystal material showing a smectic phase at room temperature is used as the liquid crystal material, a seal portion corresponding to the space A is partially cured at first, and the pair of substrates S1 and S2 are attached to each other and, after the liquid crystal material has exhibited a cholesteric phase or a smectic phase, a seal portion corresponding to the space B is cured.
16. A method of injecting a liquid crystal material according to claim 12, wherein thermosetting seal members constituting the seal portion corresponding to the space A and the seal portion corresponding to the space B have different cure-starting temperatures.
17. A method of injecting a liquid crystal material according to claim 12, wherein thermosetting seal members constituting the seal portion corresponding to the space A and the seal portion corresponding to the space B have different curing times.
18. A patterned seal member, which is patterned in accordance with a pattern to be disposed on a liquid crystal display substrate and which, when another substrate is attached to each other so as to constitute a pair of substrates, exhibits a function for maintaining a gap between the pair of substrates, wherein, when the pair of substrates are attached to each other, the seal member defines a space A for liquid crystal display between the pair of substrates and a space B to be communicated with the space A.
19. A patterned seal member according to claim 18, wherein the pattern includes a seal portion that provides the space A and at least one seal portion that provides an hole andor a projecting portion corresponding to the space B.
20. A patterned seal member according to claim 18, which is disposed on a substrate for liquid crystal display.
21. A patterned seal member according to claim 18, wherein a seal portion corresponding to the space A and a seal portion corresponding to the space B comprise resins of different kinds.
22. A patterned seal member according to claim 18, wherein a seal portion corresponding to the space A and a seal portion corresponding to the space B comprise seal members having different curing mechanisms.
23. A patterned seal member according to claim 22, wherein a seal portion corresponding to the space A comprises a UV-curable seal member and a seal portion corresponding to the space B comprises a thermosetting seal member.
24. A patterned seal member according to claim 18, wherein a seal portion corresponding to the space A and a seal portion corresponding to the space B comprise seal members having different curing temperatures.
25. A patterned seal member according to claim 18, wherein a seal portion corresponding to the space A, a seal portion corresponding to the hole and a seal portion corresponding to the space B comprise seal members having curing rates different from one another.
26. A patterned seal member according to claim 21, wherein a seal portion corresponding to the space A comprises a UV-curable seal member and a seal portion corresponding to the space B comprises a cure-retarding UV-curable seal member andor a thermosetting seal member.
27. An apparatus for injecting a liquid crystal material, comprising:
a chamber for providing a reduced pressure state therein;
a pair of surface plates disposed in the chamber, respectively for being in contact with a pair of the substrates for liquid crystal display;
liquid crystal material-supplying means for disposing a liquid crystal material in a space between the pair of substrates for liquid crystal display; and
temperature control means for controlling the temperature of the pair of surface plates;
wherein at least portion of the pair of surface plates being in contact with the substrates comprise a heat sink material.
28. An apparatus for injecting a liquid crystal material according to claim 27, wherein the heat sink material is a silicone rubber.
29. An apparatus for injecting a liquid crystal material according to claim 27, wherein the heat sink material contains a liquid heat medium therein.
30. An apparatus for injecting a liquid crystal material according to claim 27, wherein the heat sink material contains means for circulating a liquid heat medium therein.
31. An apparatus for injecting a liquid crystal material according to claim 30, wherein the liquid heat medium is at least a kind of highly heat resistant liquid selected from the group consisting of: ethylene glycol and synthetic engine oil.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An apparatus comprising:
a stereoscopic three-dimensional display device;
a graphics unit in communication with the stereoscopic three-dimensional display device,
the graphics unit configured to
create a three-dimensional (3-D) wagering game space including a first group of objects;
create a second group of objects that are a copy of the first group of objects, wherein the second group of objects includes invisible objects;
capture a stereoscopic 3-D image in the 3-D wagering game space, wherein the first image includes some objects from the first group of objects;
capture a two-dimensional (2-D) image in the 3-D wagering game space, wherein the second image does not include the invisible objects such that a region in the second image is transparent;
create a composite image wherein the stereoscopic 3-D image appears in the region of the 2-D image;
present the composite image on the stereoscopic 3-D display device;

a wagering game unit configured to provide results of wagering games to the graphics unit for presentation on the stereoscopic 3-D display device.
2. The apparatus of claim 1, wherein the graphics unit creates a first group of virtual cameras to create the stereoscopic 3-D image.
3. The apparatus of claim 1, wherein the graphics unit creates a second group of virtual cameras to create the stereoscopic 3-D image.
4. The apparatus of claim 1, wherein the first group of objects are elements of a wagering game, wherein the elements indicate a result of the wagering game.
5. The apparatus of claim 4, wherein the invisible objects are also elements of the wagering game.
6. A method comprising:
creating a first virtual three-dimensional (3-D) wagering game space including a first group of objects;
creating a second virtual 3-D wagering game space including a second group of objects, wherein the second group of objects is identical to the first group of objects, and wherein some of the second group of objects are marked as invisible;
making the first virtual 3-D wagering game space visible to a pair of virtual cameras;
making the second virtual 3-D wagering game space visible to a single virtual camera;
rendering a stereoscopic 3-D image to a graphics buffer, wherein the rendering the stereoscopic 3-D image is based on data captured by the pair of virtual cameras;
rendering a two-dimensional (2-D) image to the graphics buffer, wherein the rendering the 2-D image is based on data captured by the single virtual camera;
presenting the graphics buffer on a stereoscopic 3-D display device.
7. The method of claim 6, wherein the graphics buffer includes a composite image including the 2-D image and the stereoscopic 3-D image.
8. The method of claim 6, wherein the rendering the 2-D image includes:
performing rendering computations for some of the second group of objects that have not been marked invisible;
avoiding rendering computations for the ones of the second group of objects that are marked invisible.
9. The method of claim 6 further comprising:
making the second virtual 3-D wagering game space visible to a second pair virtual cameras;
rendering another stereoscopic 3-D image to the graphics buffer, wherein the rendering the other stereoscopic 3-D image is based on data captured by the second pair of virtual cameras;
10. The method of claim 6, wherein the first and second groups of objects represent game elements in a wagering game.
11. A method comprising:
creating a first virtual three-dimensional (3-D) wagering game space including a first group of game elements, wherein all game elements in the first group are visible to a first group of virtual cameras;
creating a second virtual 3-D wagering game space including a second group of game elements, wherein the second group of game elements is identical to the first group of game elements, and wherein some of the second group of game elements are invisible to the second group of virtual cameras;
rendering, to a graphics buffer, a stereoscopic 3-D image based on images captured by the first group of cameras, wherein the images include one or more of the first group of game elements;
rendering, to the graphics buffer, a 2-D image based on an image captured by the second group of cameras, wherein the image does not include any of the second group of game elements that are invisible to the second group of cameras; and
presenting the graphics buffer on a stereoscopic 3-D display device.
12. The method of claim 11, wherein the first and second groups of game elements are part of a wagering game.
13. The method of claim 11, wherein presentation of the graphics buffer results in a composite image including the stereoscopic 3-D image and the 2-D image.
14. The method of claim 11, wherein the rendering, to the graphics buffer, the 2-D image does not include computations for the game elements in the second group that are invisible to the second group of cameras.
15. One or more machine-readable storage media including instructions which when executed by one or more processors cause the one or more processors to perform operations comprising:
creating a virtual 3-D wagering game space including a region and a plurality of objects;
labeling the region invisible and an object of the plurality of objects invisible;
capturing, by a first pair of virtual cameras, a first image in the virtual 3-D wagering game space, wherein the first image includes objects other than the object labeled invisible;
capturing, by a second virtual camera, a second image in the virtual 3-D wagering game space, wherein the second image includes the region and the objected labeled invisible, and wherein the region and object labeled invisible are transparent in the second image;
rendering, based on the first image, a stereoscopic 3-D image to a graphics buffer;
rendering, based on the second image, a 2-D image to the graphics buffer;
presenting the graphics buffer on a stereoscopic 3-D display device.
16. The machine-readable storage media of claim 15, wherein the objects represent elements in a wagering game.
17. The machine-readable storage media of claim 16, wherein the presenting the graphics buffer presents a result for the wagering game.
18. The machine-readable storage media of claim 15, wherein the first pair of virtual cameras and the second virtual camera have settings including one or more of: field of view, depth of focus, aperture size, and depth of field.
19. The machine-readable storage media of claim 15, wherein the stereoscopic 3-D display displays the graphics buffer in autostereoscopic 3-D.
20. The machine-readable storage media of claim 15, wherein presentation of the graphics buffer results in a composite image including the stereoscopic 3-D image and the 2-D image.
21. An apparatus comprising:
means for creating a first virtual three-dimensional (3-D) wagering game space including a first group of objects;
means for creating a second virtual 3-D wagering game space including a second group of objects, wherein the second group of objects is identical to the first group of objects, and wherein some of the second group of objects are marked as invisible;
means for making the first virtual 3-D wagering game space visible to a pair of virtual cameras;
means for making the second virtual 3-D wagering game space visible to a single virtual camera;
means for rendering a stereoscopic 3-D image to a graphics buffer, wherein the rendering the stereoscopic 3-D image is based on data captured by the pair of virtual cameras;
means for rendering a two-dimensional (2-D) image to the graphics buffer, wherein the rendering the 2-D image is based on data captured by the single virtual camera;
means for presenting the graphics buffer on a stereoscopic 3-D display device.
22. The apparatus of claim 21, wherein the graphics buffer includes a composite image including the 2-D image and the stereoscopic 3-D image.
23. The apparatus of claim 21, wherein means for the rendering the 2-D image includes:
means for performing rendering computations for some of the second group of objects that have not been marked invisible;
means for avoiding rendering computations for the ones of the second group of objects that are marked invisible.
24. The apparatus of claim 21 further comprising:
means for making the second virtual 3-D wagering game space visible to a second pair virtual cameras;
means for rendering another stereoscopic 3-D image to the graphics buffer, wherein the rendering the other stereoscopic 3-D image is based on data captured by the second pair of virtual cameras;
25. The apparatus of claim 25, wherein the first and second groups of objects represent game elements in a wagering game.