1461166949-c28461e4-4e25-484d-8e00-aa613907f62f

1. A liquid crystal display (LCD) device comprising a TFT (thin-film-transistor) substrate mounting thereon a plurality of TFTS, a counter substrate mounting thereon a black matrix, a liquid crystal layer sandwiched between said TFT substrate and said counter substrate, and a backlight unit disposed at a rear side of said TFT substrate for irradiating said TFT substrate with backlight, each of said TFTs having a channel in a semiconductor layer, said channel having a channel length larger at an edge portion of said channel than at a central portion thereof.
2. The LCD device according to claim 1, wherein said channel length is larger at both edge portions of said channel than at said central portion thereof.
3. The LCD device according to claim 1, wherein said TFT includes a gate electrode disposed between said channel and said backlight unit, said gate electrode having a function of shielding said channel against said backlight.
4. The LCD device according to claim 1, wherein said semiconductor layer is made of an amorphous silicon film or a polysilicon film.
5. The LCD device according to claim 1, wherein said TFT includes source and drain electrodes opposing said gate electrode with an intervention of said semiconductor layer.
6. The LCD device according to claim 1, wherein said TFT includes an ohmic contact layer between said semiconductor layer and said source and drain electrodes.
7. The LCD device according to claim 1, wherein said source and drain electrodes of said TFT overlie said semiconductor layer.
8. A method for fabricating a TFT in an LCD device, comprising the steps of:
consecutively forming a gate electrode, a gate insulation film, a semiconductor layer and an ohmic contact layer of the TFT;
patterning said ohmic contact layer and said semiconductor layer;
forming a source electrode and a drain electrode of the TFT on said patterned ohmic contact layer; and
etching a portion of said patterned ohmic contact layer between said source electrode and said drain electrode by using said source electrode and said drain electrode as a mask to thereby expose a portion of said semiconductor layer as a channel, said channel having a channel length larger at an edge portion of said channel than at a central portion thereof.
9. A method for fabricating a TFT in an LCD device, comprising the steps of:
consecutively forming a gate electrode, a gate insulation film, a semiconductor layer and an ohmic contact layer of the TFT and a metallic film;
forming a photoresist film on said metallic film and exposing said photoresist film to exposure light having a specific wavelength through a photomask having a source electrode pattern, a drain electrode pattern and an intermediate pattern sandwiched between said source electrode pattern and said drain electrode pattern, said intermediate pattern having a width smaller than a limit of a resolution by said exposure light, to thereby form a photoresist mask pattern having a thickness larger at a region corresponding to said source and drain electrode patterns than at a region corresponding to a gap between said source electrode pattern and said drain electrode pattern;
patterning said metallic film, said ohmic contact layer and said semiconductor layer by using said photoresist mask pattern as a mask;
removing said photoresist mask pattern to leave a portion of said photoresist mask pattern having a specific thickness;
patterning said metallic film by using said portion of said photoresist mask pattern to form a source electrode and a drain electrode of the TFT; and
etching a portion of said patterned ohmic contact layer between said source electrode and said drain electrode by using said source electrode and said drain electrode as a mask to thereby expose a portion of said semiconductor layer as a channel, said channel having a channel length larger at an edge portion of said channel than at a central portion thereof.
10. The method according to claim 9, wherein said intermediate pattern is one or more slit pattern having said width smaller than said limit of resolution.
11. The method according to claim 9, wherein said intermediate pattern includes a plurality of stripe patterns arranged in an extending direction of said channel and each having dimensions smaller than said limit of resolution.
12. The method according to claim 9, wherein said intermediate pattern includes a plurality of dot patterns arranged in a matrix and having dimensions smaller than said limit of resolution.
13. The method according to claim 9, wherein said photoresist mask pattern removing step uses a reactive-ion-etching system.
14. The method according to claim 9, wherein said photoresist mask pattern removing step uses a UV ashing system.
15. The method according to claim 9, wherein said channel length is larger at both end portions of said channel than at said central portion thereof.
16. The method according to claim 9, wherein said semiconductor layer is made of an amorphous silicon film.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A storage controller, comprising:
a first inputoutput port that provides an interface to a host computer;
a second inputoutput port that provides an interface to a storage device;
a processor that receives inputoutput requests generated by the host computer and, in response to the inputoutput requests, generates and transmits inputoutput requests to the storage device; and
a memory module communicatively connected to the processor and comprising logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to:
receive, from the host computer, a write inputoutput request that identifies a logical volume;
compare an amount of storage space available in the logical volume with an amount of storage space required to complete the write operation; and
allocate additional storage space to the logical volume when the amount of storage space available in the logical volume is insufficient to complete the write operation.
2. The storage controller of claim 1, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to update meta data associated with the logical volume to reflect an allocation of additional storage space to the logical volume.
3. The storage controller of claim 1, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to dispatch the write operation to the logical volume
4. The storage controller of claim 1, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to compare an amount of storage space allocated to the logical volume with sum of the amount of data currently stored in the logical and the amount of data specified in the write operation.
5. A storage controller, comprising:
a first inputoutput port that provides an interface to a host computer;
a second inputoutput port that provides an interface to a storage device;
a processor that receives inputoutput requests generated by the host computer and, in response to the inputoutput requests, generates and transmits inputoutput requests to the storage device; and
a memory module communicatively connected to the processor and comprising logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to:
receive, from the host computer, a pre-allocate command that identifies a logical volume;
validate the pre-allocate command; and
allocate data from a free storage space to the logical volume identified in the pre-allocate command.
6. The storage controller of claim 5, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to validate the identity of the logical volume identified in the pre-allocate command.
7. The storage controller of claim 5, wherein:
the pre-allocate command specifies an amount of memory to pre-allocate to the logical volume; and
the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to verify that the free storage space includes sufficient space to allocate the amount of memory to the logical volume.
8. The storage controller of claim 5, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to transmit a response to a host computer when a specific bit is set in the pre-allocate command.
9. The storage controller of claim 5, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to update meta data associated with the logical volume to reflect an allocation of additional storage space to the logical volume.
10. The storage controller of claim 5, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to transmit a response to a host computer when the space is allocated to the logical volume.
11. A storage controller, comprising:
a first inputoutput port that provides an interface to a host computer;
a second inputoutput port that provides an interface to a storage device;
a processor that receives inputoutput requests generated by the host computer and, in response to the inputoutput requests, generates and transmits inputoutput requests to the storage device; and
a memory module communicatively connected to the processor and comprising logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to:
receive, from the host computer, a de-allocate command that identifies a logical volume;
validate the de-allocate command; and
de-allocate data from the logical volume identified in the de-allocate command.
12. The storage controller of claim 11, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to validate the identity of the logical volume identified in the de-allocate command.
13. The storage controller of claim 11, wherein:
the de-allocate command specifies an amount of memory to de-allocate from the logical volume; and
the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to verify that the logical volume includes sufficient space to de-allocate the amount from the logical volume.
14. The storage controller of claim 11, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to transmit a response to a host computer when a specific bit is set in the de-allocate command.
15. The storage controller of claim 11, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to update meta data associated with the logical volume to reflect a de-allocation of additional storage space to the logical volume.
16. The storage controller of claim 11, wherein the memory module further comprises logic instructions stored in a computer-readable medium which, when executed by the processor, configure the processor to transmit a response to a host computer when the space is de-allocated from the logical volume.

1461166939-f10a5a06-46df-4e08-97d1-7a1a3bec8b2f

What is claimed is:

1. A method of handling comminuted cellulosic fibrous material in a cylindrical vessel having a first diameter, a discharge having a second diameter at least 20% less than the first diameter, and a discharge agitator having a power requirement, said method comprising:
(a) storing or treating the material in the vessel at the first diameter portion thereof;
(b) passing the material through a transition from the first diameter to the second diameter;
(c) agitating the material with the discharge agitator while in the transition;
(d) discharging the material from the vessel through the discharge; and
practicing (b) and (c) so that the power requirement of the discharge agitator is at least 10% less than the power requirement without the transition.
2. A method as recited in claim 1 wherein (b) is practiced using a substantially smooth interior surface, substantially frusto-conical, transition.
3. A method as recited in claim 2 wherein (b) is further practiced using a substantially frusto-conical transition having an interior surface with a slope angle of between about 40-50 degrees to an imaginary line substantially perpendicular to the direction of flow of material through the transition.
4. A method as recited in claim 2 wherein the transition comprises a first transition; and further comprising (e) passing the material through a single-convergent second transition prior to passing the material through the first transition, and wherein (b) and (c) are practiced so that the power requirement is at least 20% less.
5. A method as recited in claim 4 wherein (e) is practiced by passing the material through a change in cross-section from substantially circular to substantially race-track-oval, and from substantially race-track-oval back to substantially circular.
6. A method as recited in claim 2 wherein (c) is practiced by rotating an agitator, having at least two arms with paddles, about an axis substantially parallel to and substantially concentric with the direction of flow of material through the transition, and wherein (b) and (c) are practiced so that the power requirement is at least 20% less.
7. A method as recited in claim 6 wherein (c) is further practiced by rotating an agitator having a deflector cone.
8. A method as recited in claim 1 wherein the vessel initially does not have the transition; and comprising the further step (e) of retrofitting the transition into the vessel prior to the practice of (b) and (c).
9. A method as recited in claim 1 wherein (a) is practiced by digesting or impregnating the material.
10. A method as recited in claim 9 wherein (a) is further practiced by removing liquid from the vessel through a screen assembly just before the transition in the direction of movement of the material through the discharge.
11. A method as recited in claim 2 comprising the further step (e) of moving the transition during the practice of (b).
12. A vessel assembly for handling comminuted cellulosic fibrous material, comprising:
a substantially cylindrical substantially upright vessel having a first diameter material storing or treating portion above a second diameter discharge, said second diameter at least 20% less than said first diameter; and
a substantially smooth interior surface, substantially frusto-conical transition between said first and second diameter portions.
13. An assembly as recited in claim 12 wherein said transition interior surface comprises polished stainless steel.
14. An assembly as recited in claim 12 wherein said transition interior surface has a slope angle of between about 5-50 degrees to the vertical, the first diameter is at least about 10 feet, and the second diameter is at least about 2 feet.
15. An assembly as recited in claim 12 further comprising an agitator disposed in said discharge and said transition which agitates material in said transition.
16. An assembly as recited in claim 15 wherein said transition interior surface slope angle is between about 40-50 degrees to the horizontal.
17. An assembly as recited in claim 16 wherein said vessel comprises a digester or impregnation vessel; and further comprising a withdrawal screen assembly located in said vessel just above said transition.
18. An assembly as recited in claim 12 wherein said transition comprises a first transition; and further comprising a single-convergent second transition disposed above said first transition.
19. An assembly as recited in claim 18 wherein said second transition changes in cross-section, from most remote from said first transition toward said first transition, from substantially circular to substantially race-track-oval, and from substantially race-track-oval back to substantially circular.
20. An assembly as recited in claim 15 wherein said agitator has at least two arms with paddles, and is mounted for rotation about a substantially vertical axis substantially concentric with said second diameter.
21. A method of handling comminuted cellulosic fibrous material in a cylindrical vessel having a first diameter, a discharge having a second diameter at least 20% less than the first diameter, said method comprising:
(a) storing or treating the material in the vessel at the first diameter portion thereof;
(b) passing the material through a substantially smooth interior surface, substantially frusto-conical transition from the first diameter to the second diameter; and
(c) discharging the material from the vessel through the discharge.
22. A method as recited in claim 21 wherein (b) is further practiced without agitating the material within the transition, and using a substantially frusto-conical transition having an interior surface with a slope angle of between about 5-20 degrees to an imaginary line substantially parallel to the direction of flow of material through the transition.
23. A method as recited in claim 22 wherein the transition comprises a first transition; and further comprising (d) passing the material through a single-convergent second transition prior to passing the material through the first transition.
24. A method as recited in claim 23 wherein (d) is practiced by passing the material through a change in cross-section from substantially circular to substantially race-track-oval, and from substantially race-track-oval back to substantially circular.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A radio access network system having a synchronous server and at least one node, wherein
the synchronous server comprises:
a clock generator configured to periodically generate a clock; and
a synchronous message transmitter configured to generate a synchronous message for notifying information regarding the generated clock, and to transmit the generated synchronous message to the node using an IP packet; and
the node comprises:
a time calculator configured to obtain a time of receiving the synchronous message; and
a clock correction processor configured to calculate a clock correction value in accordance with the time of receiving the synchronous message and the information regarding the clock notified by the synchronous message, and to correct a generated timing of a clock in the node in accordance with the clock correction value.
2. A radio communication method in a radio access network system having a synchronous server and at least one node, the method comprising the steps of:
generating a clock periodically in the synchronous server;
generating a synchronous message for notifying information regarding the generated clock in the synchronous server;
transmitting the generated synchronous message to the node using an IP packet in the synchronous server;
calculating a clock correction value in accordance with a time of receiving the synchronous message and the information regarding the clock notified by the synchronous message in the node; and
correcting a generated timing of a clock in accordance with the clock correction value in the node.
3. A synchronous server in a radio access network system having at least one node, the server comprising:
a clock generator configured to periodically generate a clock; and
a synchronous message transmitter configured to generate a synchronous message for notifying information regarding the generated clock, and to transmit the generated synchronous message to the node using an IP packet.
4. The synchronous server according to claim 3, wherein the synchronous message transmitter sets a time of transmitting the synchronous message as the information regarding the clock in the synchronous message.
5. A node in a radio access network system having a synchronous server, the node comprising:
a receiver configured to receive a synchronous message for notifying information regarding a clock generated in the synchronous server;
a time calculator configured to obtain a time of receiving the synchronous message; and
a clock correction processor configured to calculate a clock correction value in accordance with the time of receiving the synchronous message and the information regarding the clock notified by the synchronous message, and to correct a generated timing of a clock in the node in accordance with the clock correction value.
6. The node according to claim 5, wherein the time calculator measures a reception interval of the synchronous message, and calculates the clock correction value without using the synchronous message when the reception interval of the synchronous message is more than a predetermined threshold.
7. The node according to claim 5, the node further comprising a memory configured to associate a time of transmitting set in the synchronous message with the time of receiving the synchronous message in the node, upon receiving the synchronous message.
8. The node according to claim 7, wherein the time calculator obtains the time of transmitting the synchronous message and the time of receiving the synchronous message from the memory, calculates a transmission interval of the synchronous message and a reception interval of the synchronous message, and calculates the clock correction value in accordance with a comparison between the transmission interval and the reception interval.