1. A voltage regulator, comprising:
an output transistor operable to adjust an output voltage of the voltage regulator;
a first stage amplifier operable to amplify and output a first stage output signal representing a difference between a reference voltage and a divided voltage obtained by dividing the output voltage; and
a second stage amplifier comprising a transistor coupled in series with a cascode amplifier circuit, the second stage amplifier operable to receive the first stage output signal and generate a second stage output signal to control the output transistor as a function of the first stage output signal,
wherein the first stage amplifier comprises:
a first high breakdown voltage NMOS transistor as an input transistor; and
an NMOS transistor as a tail current source, and
wherein the cascode amplifier circuit comprises a second high breakdown voltage NMOS transistor as a cascode transistor.
2. The voltage regulator of claim 1, wherein the reference voltage is supplied to the first stage amplifier and the cascode amplifier circuit.
3. The voltage regulator of claim 1, wherein the first high breakdown voltage NMOS transistor comprises a plurality of first high breakdown voltage NMOS transistors, and the reference voltage is supplied to a gate of at least one of the first high breakdown voltage NMOS transistors.
4. The voltage regulator of claim 1, wherein the reference voltage is supplied to a gate of the first high breakdown voltage NMOS transistor and a gate of the second high breakdown voltage NMOS transistor.
5. The voltage regulator of claim 1, wherein the transistor is a PMOS transistor.
6. The voltage regulator of claim 1, wherein the cascode amplifier circuit further comprises an NMOS transistor coupled between the second high breakdown voltage NMOS transistor and a ground connection.
7. The voltage regulator of claim 1, wherein a structure of the first high breakdown voltage NMOS transistor and a structure of the second high breakdown voltage NMOS transistor are substantially identical.
8. A voltage regulator, comprising:
a reference voltage supply terminal;
a first stage amplifier coupled with the reference voltage supply terminal;
a second stage amplifier comprising a transistor coupled with an output of the first stage amplifier, and a cascode amplifier circuit coupled with the reference voltage supply terminal;
an output transistor coupled with an output of the second stage amplifier;
an output terminal coupled with the output transistor, the output terminal providing an output voltage of the voltage regulator;
a voltage divider operable to divide the output voltage, the voltage divider coupled with the output terminal and the first stage amplifier, the first stage amplifier operable to provide, as the output of the first stage amplifier, a difference between the reference voltage and the divided output voltage, and the second stage amplifier is operable to control the output transistor to adjust the output voltage based on the output of the first stage amplifier.
9. The voltage regulator of claim 8, wherein the first stage amplifier comprises a first high breakdown voltage NMOS transistor operable as an input transistor, and an NMOS transistor operable as a tail current source; and
wherein the cascode amplifier circuit comprises an NMOS transistor and a second high breakdown voltage NMOS transistor operable as a cascode transistor.
10. The voltage regulator of claim 9, wherein the first high breakdown voltage NMOS transistor and the second high breakdown voltage NMOS transistor have a similar structure.
11. The voltage regulator of claim 9, wherein a gate of the first high breakdown voltage NMOS transistor and a gate of the second high breakdown voltage NMOS transistor are both coupled with the reference voltage supply terminal.
12. The voltage regulator of claim 9, wherein the second high breakdown voltage NMOS transistor is structured to have lower driveability and higher breakdown voltage than the NMOS transistor.
13. The voltage regulator of claim 8, wherein the output transistor is a PMOS transistor coupled between a power supply terminal and the output terminal, and the voltage divider is coupled between the output terminal and a ground terminal.
14. The voltage regulator of claim 8, wherein the output of the second stage amplifier is coupled with a gate of the output transistor.
15. A voltage regulator, comprising:
an output terminal coupled with an output transistor, an output voltage of the voltage regulator provided on the output terminal;
a voltage divider coupled with the output terminal, the voltage divider operable to divide the output voltage;
a first stage amplifier coupled with voltage divider and a reference voltage supply terminal, an output of the first stage amplifier being a difference signal representative of a difference between the divided output voltage and a reference voltage present on the reference voltage supply terminal; and
a second stage amplifier coupled to the output of the first stage amplifier and the output transistor, the second stage amplifier comprising a cascode amplifier circuit coupled with the reference voltage terminal, the second stage amplifier operable to generate an output signal based on the difference signal to control the output transistor to adjust the output voltage.
16. The voltage regulator of claim 15, wherein the cascode amplifier circuit comprises a high breakdown voltage NMOS transistor coupled with an NMOS transistor, the high breakdown voltage NMOS transistor structured with a lower driveability and a higher breakdown voltage than the NMOS transistor.
17. The voltage regulator of claim 16, wherein the first stage amplifier comprises another high breakdown voltage NMOS transistor coupled with another NMOS transistor, the another NMOS transistor operable as a tail current source of the first stage amplifier, and structured to have higher driveability and lower breakdown voltage than the another high breakdown voltage NMOS transistor.
18. The voltage regulator of claim 15, wherein the first stage amplifier comprises a plurality of high breakdown voltage NMOS transistors operable as input transistors, and the cascode amplifier circuit comprises a high breakdown voltage NMOS transistor, and wherein all of the high breakdown voltage NMOS transistors have a similar structure.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of providing inline sterile freeze drying of a product containing solid matter and a solvent, which comprises:
i. filling the product into a plurality of trays accommodated in at least one trolley in a filling station;
ii. reducing the temperature of the product;
iii. bringing the product to a pressure and a temperature below the triple point of the solvent in a freeze dryer unit;
iv. maintaining the lowered pressure and thereby provide a freeze dried product by removing the solvent as vapor in the freeze dryer unit;
v. bringing the freeze dried product to a temperature and pressure above the triple point;
vi. emptying the product from the plurality of trays;
vii. sterilizing the at least one trolley with the plurality of trays; and
viii. bringing the at least one trolley with the plurality of trays to the filling station.
2. The method according to claim 1, which further comprises cooling the at least one trolley with the plurality of trays before step i.
3. The method according to claim 1, which further comprises bringing the at least one trolley with the plurality of trays to a freeze storage after step i.
4. The method according to claim 2, which further comprises cooling the at least one trolley with the plurality of trays in a freeze storage before step i.
5. The method according to claim 3, which further comprises bringing the at least one trolley with the plurality of trays to a supplemental freeze storage before step i.
6. The method according to claim 1, which further comprises sterilizing the filling station before step i.
7. The method according to claim 1, which further comprises sterilizing the freeze dryer unit before one of step iii. and step iv.
8. The method according to claim 5, which further comprises sterilizing at least one of the freeze storage and the supplemental freeze storage before step i.
9. The method according to claim 1, which further comprises carrying out steps i. to viii. in a clean-room.
10. The method according to claim 1, which further comprises carrying out freeze drying in the freeze drying unit at a pressure of between at least one of:
0.1-0.25 mbar; and
0.1-0.2 mbar.
11. The method according to claim 1, which further comprises carrying out freeze drying in the freeze drying unit at a mean sublimation rate equal to or above 0.5 kgm2h.
12. The method according claim 1, which further comprises carrying out step vii. in a cleaning and sterilizing unit.
13. A system for carrying out the method according to claim 1, comprising:
a filling station having an inlet end and an outlet end;
a freeze storage;
a freeze dryer unit;
an emptying station having an inlet end and an outlet end;
at least one trolley;
a plurality of trays shaped to be accommodated in the at least one trolley; and
a cleaning and sterilizing unit operatively connected between the outlet end of the emptying station and the inlet end of the filling station.
14. The system according to claim 13, wherein:
the freeze storage has an outlet end; and
the freeze dryer unit has:
an inlet end operatively connected with the outlet end of the freeze storage; and
an outlet end operatively connected with the inlet end of the emptying station.
15. The system according to claim 14, wherein the outlet end of the freeze storage is selectively connected to the inlet end of the filling station.
16. The system according to claim 13, further comprising a supplemental freeze storage between the cleaning and sterilizing unit and the filling station.
17. The system according to claim 13, further comprising a trolley storage between the outlet end of the emptying station and the cleaning and sterilizing unit.
18. The system according to claim 13, wherein the cleaning and sterilizing unit has:
an inlet end operatively connected with the outlet end of the emptying station; and
an outlet end.
19. The system according to claim 18, wherein:
the trolley storage has an outlet end; and
the inlet end of the cleaning and sterilizing unit is operatively connected with the outlet end of the trolley storage.
20. The system according to claim 18, wherein the outlet end of the cleaning and sterilizing unit is operatively connected with the inlet end of the filling station.
21. The system according to claim 18, wherein:
the supplemental freeze storage has an inlet end; and
the outlet end of the cleaning and sterilizing unit is operatively connected with the inlet end of the supplemental freeze storage.
22. The system according to claim 13, wherein the cleaning and sterilizing unit is sized to accommodate one of:
between one and six trolleys; and
between two and four trolleys.
23. The system according to claim 13, wherein the freeze dryer unit is sized to accommodate one of:
between one and six trolleys; and
between two and four trolleys.
24. The system according to claim 13, wherein the freeze storage is sized to accommodate one of:
between one and six trolleys; and
between two and four trolleys.
25. The system according to claim 13, wherein:
a pass-through section of the system is defined between a first line and a second line extending on either side of the freeze dryer unit and the cleaning and sterilizing unit;
a filling section is defined between the second line and a third line; and
an emptying section is defined between the first line and a fourth line.
26. The system according to claim 25, wherein the pass-through section, the filling section and the emptying section are located in a clean-room.
27. The method according to claim 1, wherein the product is selected from probiotic bacteria, lactic bacteria, whey derivatives, yeast bacteria, andor bacterial cultures.
28. The system according to claim 13, wherein:
the filling station comprises a docking station; and
the emptying station comprises a docking station.
29. The method according to claim 1, wherein the solvent is water.